net/ntnic: add MTU configuration

Add supporting API rte_eth_dev_set_mtu

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

net/ntnic: add flow aging event

Port thread was extended with new age event callback handler.
LRN, INF, STA registers getter setter was added.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com

net/ntnic: add flow aging event

Port thread was extended with new age event callback handler.
LRN, INF, STA registers getter setter was added.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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net/ntnic: add flow statistics

xstats was extended with flow statistics support.

Additional counters that shows learn, unlearn, lps, aps and other.

Signed-off-by: Danylo Vodopianov <dvo-plv@napate

net/ntnic: add flow statistics

xstats was extended with flow statistics support.

Additional counters that shows learn, unlearn, lps, aps and other.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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net/ntnic: learn flow queue handling

Implements thread for handling flow learn queue

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

net/ntnic: add FLM RCP module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions

net/ntnic: add FLM RCP module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions of flows.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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net/ntnic: add FLM module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions of

net/ntnic: add FLM module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions of flows.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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net/ntnic: add TPE module

The TX Packet Editor is a software abstraction module, that keeps track
of the handful of FPGA modules
that are used to edit packets in the TX pipeline.

Signed-off-by: Dan

net/ntnic: add TPE module

The TX Packet Editor is a software abstraction module, that keeps track
of the handful of FPGA modules
that are used to edit packets in the TX pipeline.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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net/ntnic: add hash module

The Hasher module calculates a configurable hash value to be used
internally by the FPGA.
The module support both Toeplitz and NT-hash.

Signed-off-by: Danylo Vodopianov <

net/ntnic: add hash module

The Hasher module calculates a configurable hash value to be used
internally by the FPGA.
The module support both Toeplitz and NT-hash.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add KM module

The Key Matcher module checks the values of individual fields of a
packet.
It supports both exact match which is implemented with a CAM, and
wildcards which is implemented w

net/ntnic: add KM module

The Key Matcher module checks the values of individual fields of a
packet.
It supports both exact match which is implemented with a CAM, and
wildcards which is implemented with a TCAM.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add QSL module

The Queue Selector module directs packets to a given destination which
includes host queues, physical ports, exceptions paths, and discard.

Signed-off-by: Danylo Vodopiano

net/ntnic: add QSL module

The Queue Selector module directs packets to a given destination which
includes host queues, physical ports, exceptions paths, and discard.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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net/ntnic: add PDB module

The Packet Description Builder module creates packet meta-data for
example virtio-net headers.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Ili

net/ntnic: add PDB module

The Packet Description Builder module creates packet meta-data for
example virtio-net headers.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add SLC LR module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is configured to add

net/ntnic: add SLC LR module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is configured to add a new head in the
packet.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add CAT module

The Categorizer module’s main purpose is to is select the behavior
of other modules in the FPGA pipeline depending on a protocol check.

Signed-off-by: Danylo Vodopianov <d

net/ntnic: add CAT module

The Categorizer module’s main purpose is to is select the behavior
of other modules in the FPGA pipeline depending on a protocol check.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add Tx Packet Editor (TPE) FPGA module

The TX Packet Editor is a software abstraction module,
that keeps track of the handful of FPGA modules
that are used to edit packets in the TX pipel

net/ntnic: add Tx Packet Editor (TPE) FPGA module

The TX Packet Editor is a software abstraction module,
that keeps track of the handful of FPGA modules
that are used to edit packets in the TX pipeline.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add packet descriptor builder (PDB) FPGA module

The Packet Description Builder module creates packet meta-data
for example virtio-net headers.

Signed-off-by: Oleksandr Kolomeiets <okl-pl

net/ntnic: add packet descriptor builder (PDB) FPGA module

The Packet Description Builder module creates packet meta-data
for example virtio-net headers.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add slicer (SLC LR) FPGA module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is con

net/ntnic: add slicer (SLC LR) FPGA module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is configured
to add a new head in the packet.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add queue select (QSL) FPGA module

The Queue Selector module directs packets to a given destination which
includes host queues, physical ports, exceptions paths, and discard.

Signed-off-

net/ntnic: add queue select (QSL) FPGA module

The Queue Selector module directs packets to a given destination which
includes host queues, physical ports, exceptions paths, and discard.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add hasher (HSH) FPGA module

The Hasher module calculates a configurable hash value
to be used internally by the FPGA.
The module support both Toeplitz and NT-hash.

Signed-off-by: Oleksa

net/ntnic: add hasher (HSH) FPGA module

The Hasher module calculates a configurable hash value
to be used internally by the FPGA.
The module support both Toeplitz and NT-hash.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add flow matcher (FLM) FPGA module

The Flow Matcher module is a high-performance stateful SDRAM lookup
and programming engine which supported exact match lookup
in line-rate of up to hund

net/ntnic: add flow matcher (FLM) FPGA module

The Flow Matcher module is a high-performance stateful SDRAM lookup
and programming engine which supported exact match lookup
in line-rate of up to hundreds of millions of flows.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add key match (KM) FPGA module

The Key Matcher module checks the values of individual fields of a
packet.
It supports both exact match which is implemented with a CAM,
and wildcards which

net/ntnic: add key match (KM) FPGA module

The Key Matcher module checks the values of individual fields of a
packet.
It supports both exact match which is implemented with a CAM,
and wildcards which is implemented with a TCAM.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add categorizer (CAT) FPGA module

The Categorizer module’s main purpose is to is select the behavior
of other modules in the FPGA pipeline depending on a protocol check.

Signed-off-by: O

net/ntnic: add categorizer (CAT) FPGA module

The Categorizer module’s main purpose is to is select the behavior
of other modules in the FPGA pipeline depending on a protocol check.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...

net/ntnic: add base init and deinit flow backend

Add basic implementation of the NT flow backend API

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@n

net/ntnic: add base init and deinit flow backend

Add basic implementation of the NT flow backend API

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...