1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (C) IBM Corporation 2016. 4 */ 5 6 #include <stdalign.h> 7 8 #include "acl_run.h" 9 #include "acl_vect.h" 10 11 alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const { 12 rte_xmm_t xmm_shuffle_input; 13 rte_xmm_t xmm_index_mask; 14 rte_xmm_t xmm_ones_16; 15 rte_xmm_t range_base; 16 } altivec_acl_const = { 17 { 18 .u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c} 19 }, 20 { 21 .u32 = {RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX, 22 RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX} 23 }, 24 { 25 .u16 = {1, 1, 1, 1, 1, 1, 1, 1} 26 }, 27 { 28 .u32 = {0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c} 29 }, 30 }; 31 32 /* 33 * Resolve priority for multiple results (altivec version). 34 * This consists comparing the priority of the current traversal with the 35 * running set of results for the packet. 36 * For each result, keep a running array of the result (rule number) and 37 * its priority for each category. 38 */ 39 static inline void 40 resolve_priority_altivec(uint64_t transition, int n, 41 const struct rte_acl_ctx *ctx, struct parms *parms, 42 const struct rte_acl_match_results *p, uint32_t categories) 43 { 44 uint32_t x; 45 xmm_t results, priority, results1, priority1; 46 __vector __bool int selector; 47 xmm_t *saved_results, *saved_priority; 48 49 for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) { 50 51 saved_results = (xmm_t *)(&parms[n].cmplt->results[x]); 52 saved_priority = 53 (xmm_t *)(&parms[n].cmplt->priority[x]); 54 55 /* get results and priorities for completed trie */ 56 results = *(const xmm_t *)&p[transition].results[x]; 57 priority = *(const xmm_t *)&p[transition].priority[x]; 58 59 /* if this is not the first completed trie */ 60 if (parms[n].cmplt->count != ctx->num_tries) { 61 62 /* get running best results and their priorities */ 63 results1 = *saved_results; 64 priority1 = *saved_priority; 65 66 /* select results that are highest priority */ 67 selector = vec_cmpgt(priority1, priority); 68 results = vec_sel(results, results1, selector); 69 priority = vec_sel(priority, priority1, 70 selector); 71 } 72 73 /* save running best results and their priorities */ 74 *saved_results = results; 75 *saved_priority = priority; 76 } 77 } 78 79 /* 80 * Check for any match in 4 transitions 81 */ 82 static __rte_always_inline uint32_t 83 check_any_match_x4(uint64_t val[]) 84 { 85 return (val[0] | val[1] | val[2] | val[3]) & RTE_ACL_NODE_MATCH; 86 } 87 88 static __rte_always_inline void 89 acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms, 90 struct acl_flow_data *flows, uint64_t transitions[]) 91 { 92 while (check_any_match_x4(transitions)) { 93 transitions[0] = acl_match_check(transitions[0], slot, ctx, 94 parms, flows, resolve_priority_altivec); 95 transitions[1] = acl_match_check(transitions[1], slot + 1, ctx, 96 parms, flows, resolve_priority_altivec); 97 transitions[2] = acl_match_check(transitions[2], slot + 2, ctx, 98 parms, flows, resolve_priority_altivec); 99 transitions[3] = acl_match_check(transitions[3], slot + 3, ctx, 100 parms, flows, resolve_priority_altivec); 101 } 102 } 103 104 /* 105 * Process 4 transitions (in 2 XMM registers) in parallel 106 */ 107 static __rte_always_inline xmm_t 108 transition4(xmm_t next_input, const uint64_t *trans, 109 xmm_t *indices1, xmm_t *indices2) 110 { 111 xmm_t addr, tr_lo, tr_hi; 112 xmm_t in, node_type, r, t; 113 xmm_t dfa_ofs, quad_ofs; 114 xmm_t *index_mask, *tp; 115 __vector __bool int dfa_msk; 116 __vector signed char zeroes = {}; 117 union { 118 uint64_t d64[2]; 119 uint32_t d32[4]; 120 } v; 121 122 /* Move low 32 into tr_lo and high 32 into tr_hi */ 123 tr_lo = (xmm_t){(*indices1)[0], (*indices1)[2], 124 (*indices2)[0], (*indices2)[2]}; 125 tr_hi = (xmm_t){(*indices1)[1], (*indices1)[3], 126 (*indices2)[1], (*indices2)[3]}; 127 128 /* Calculate the address (array index) for all 4 transitions. */ 129 index_mask = (xmm_t *)&altivec_acl_const.xmm_index_mask.u32; 130 t = vec_xor(*index_mask, *index_mask); 131 in = vec_perm(next_input, (xmm_t){}, 132 *(__vector unsigned char *)&altivec_acl_const.xmm_shuffle_input); 133 134 /* Calc node type and node addr */ 135 node_type = vec_and(vec_nor(*index_mask, *index_mask), tr_lo); 136 addr = vec_and(tr_lo, *index_mask); 137 138 /* mask for DFA type(0) nodes */ 139 dfa_msk = vec_cmpeq(node_type, t); 140 141 /* DFA calculations. */ 142 r = vec_sr(in, (__vector unsigned int){30, 30, 30, 30}); 143 tp = (xmm_t *)&altivec_acl_const.range_base.u32; 144 r = vec_add(r, *tp); 145 t = vec_sr(in, (__vector unsigned int){24, 24, 24, 24}); 146 r = vec_perm(tr_hi, (xmm_t){(uint16_t)0 << 16}, 147 (__vector unsigned char)r); 148 149 dfa_ofs = vec_sub(t, r); 150 151 /* QUAD/SINGLE calculations. */ 152 t = (xmm_t)vec_cmpgt((__vector signed char)in, (__vector signed char)tr_hi); 153 t = (xmm_t)vec_sel( 154 vec_sel( 155 (__vector signed char)vec_sub( 156 zeroes, (__vector signed char)t), 157 (__vector signed char)t, 158 vec_cmpgt((__vector signed char)t, zeroes)), 159 zeroes, 160 vec_cmpeq((__vector signed char)t, zeroes)); 161 162 t = (xmm_t)vec_msum((__vector signed char)t, 163 (__vector unsigned char)t, (xmm_t){}); 164 quad_ofs = (xmm_t)vec_msum((__vector signed short)t, 165 *(__vector signed short *)&altivec_acl_const.xmm_ones_16.u16, 166 (xmm_t){}); 167 168 /* blend DFA and QUAD/SINGLE. */ 169 t = vec_sel(quad_ofs, dfa_ofs, dfa_msk); 170 171 /* calculate address for next transitions. */ 172 addr = vec_add(addr, t); 173 174 v.d64[0] = (uint64_t)trans[addr[0]]; 175 v.d64[1] = (uint64_t)trans[addr[1]]; 176 *indices1 = (xmm_t){v.d32[0], v.d32[1], v.d32[2], v.d32[3]}; 177 v.d64[0] = (uint64_t)trans[addr[2]]; 178 v.d64[1] = (uint64_t)trans[addr[3]]; 179 *indices2 = (xmm_t){v.d32[0], v.d32[1], v.d32[2], v.d32[3]}; 180 181 return vec_sr(next_input, 182 (__vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT}); 183 } 184 185 /* 186 * Execute trie traversal with 8 traversals in parallel 187 */ 188 static inline int 189 search_altivec_8(const struct rte_acl_ctx *ctx, const uint8_t **data, 190 uint32_t *results, uint32_t total_packets, uint32_t categories) 191 { 192 int n; 193 struct acl_flow_data flows; 194 uint64_t index_array[MAX_SEARCHES_ALTIVEC8]; 195 struct completion cmplt[MAX_SEARCHES_ALTIVEC8]; 196 struct parms parms[MAX_SEARCHES_ALTIVEC8]; 197 xmm_t input0, input1; 198 199 acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results, 200 total_packets, categories, ctx->trans_table); 201 202 for (n = 0; n < MAX_SEARCHES_ALTIVEC8; n++) { 203 cmplt[n].count = 0; 204 index_array[n] = acl_start_next_trie(&flows, parms, n, ctx); 205 } 206 207 /* Check for any matches. */ 208 acl_match_check_x4(0, ctx, parms, &flows, (uint64_t *)&index_array[0]); 209 acl_match_check_x4(4, ctx, parms, &flows, (uint64_t *)&index_array[4]); 210 211 while (flows.started > 0) { 212 213 /* Gather 4 bytes of input data for each stream. */ 214 input0 = (xmm_t){GET_NEXT_4BYTES(parms, 0), 215 GET_NEXT_4BYTES(parms, 1), 216 GET_NEXT_4BYTES(parms, 2), 217 GET_NEXT_4BYTES(parms, 3)}; 218 219 input1 = (xmm_t){GET_NEXT_4BYTES(parms, 4), 220 GET_NEXT_4BYTES(parms, 5), 221 GET_NEXT_4BYTES(parms, 6), 222 GET_NEXT_4BYTES(parms, 7)}; 223 224 /* Process the 4 bytes of input on each stream. */ 225 226 input0 = transition4(input0, flows.trans, 227 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 228 input1 = transition4(input1, flows.trans, 229 (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]); 230 231 input0 = transition4(input0, flows.trans, 232 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 233 input1 = transition4(input1, flows.trans, 234 (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]); 235 236 input0 = transition4(input0, flows.trans, 237 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 238 input1 = transition4(input1, flows.trans, 239 (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]); 240 241 input0 = transition4(input0, flows.trans, 242 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 243 input1 = transition4(input1, flows.trans, 244 (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]); 245 246 /* Check for any matches. */ 247 acl_match_check_x4(0, ctx, parms, &flows, 248 (uint64_t *)&index_array[0]); 249 acl_match_check_x4(4, ctx, parms, &flows, 250 (uint64_t *)&index_array[4]); 251 } 252 253 return 0; 254 } 255 256 /* 257 * Execute trie traversal with 4 traversals in parallel 258 */ 259 static inline int 260 search_altivec_4(const struct rte_acl_ctx *ctx, const uint8_t **data, 261 uint32_t *results, int total_packets, uint32_t categories) 262 { 263 int n; 264 struct acl_flow_data flows; 265 uint64_t index_array[MAX_SEARCHES_ALTIVEC4]; 266 struct completion cmplt[MAX_SEARCHES_ALTIVEC4]; 267 struct parms parms[MAX_SEARCHES_ALTIVEC4]; 268 xmm_t input; 269 270 acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results, 271 total_packets, categories, ctx->trans_table); 272 273 for (n = 0; n < MAX_SEARCHES_ALTIVEC4; n++) { 274 cmplt[n].count = 0; 275 index_array[n] = acl_start_next_trie(&flows, parms, n, ctx); 276 } 277 278 /* Check for any matches. */ 279 acl_match_check_x4(0, ctx, parms, &flows, index_array); 280 281 while (flows.started > 0) { 282 283 /* Gather 4 bytes of input data for each stream. */ 284 input = (xmm_t){GET_NEXT_4BYTES(parms, 0), 285 GET_NEXT_4BYTES(parms, 1), 286 GET_NEXT_4BYTES(parms, 2), 287 GET_NEXT_4BYTES(parms, 3)}; 288 289 /* Process the 4 bytes of input on each stream. */ 290 input = transition4(input, flows.trans, 291 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 292 input = transition4(input, flows.trans, 293 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 294 input = transition4(input, flows.trans, 295 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 296 input = transition4(input, flows.trans, 297 (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]); 298 299 /* Check for any matches. */ 300 acl_match_check_x4(0, ctx, parms, &flows, index_array); 301 } 302 303 return 0; 304 } 305