1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2018 Intel Corporation 3 */ 4 5 #define OPAE_HW_DEBUG 6 7 #include "opae_hw_api.h" 8 #include "opae_debug.h" 9 10 void opae_manager_dump(struct opae_manager *mgr) 11 { 12 opae_log("=====%s=====\n", __func__); 13 opae_log("OPAE Manger %s\n", mgr->name); 14 opae_log("OPAE Manger OPs = %p\n", mgr->ops); 15 opae_log("OPAE Manager Private Data = %p\n", mgr->data); 16 opae_log("OPAE Adapter(parent) = %p\n", mgr->adapter); 17 opae_log("==========================\n"); 18 } 19 20 void opae_bridge_dump(struct opae_bridge *br) 21 { 22 opae_log("=====%s=====\n", __func__); 23 opae_log("OPAE Bridge %s\n", br->name); 24 opae_log("OPAE Bridge ID = %d\n", br->id); 25 opae_log("OPAE Bridge OPs = %p\n", br->ops); 26 opae_log("OPAE Bridge Private Data = %p\n", br->data); 27 opae_log("OPAE Accelerator(under this bridge) = %p\n", br->acc); 28 opae_log("==========================\n"); 29 } 30 31 void opae_accelerator_dump(struct opae_accelerator *acc) 32 { 33 opae_log("=====%s=====\n", __func__); 34 opae_log("OPAE Accelerator %s\n", acc->name); 35 opae_log("OPAE Accelerator Index = %d\n", acc->index); 36 opae_log("OPAE Accelerator OPs = %p\n", acc->ops); 37 opae_log("OPAE Accelerator Private Data = %p\n", acc->data); 38 opae_log("OPAE Bridge (upstream) = %p\n", acc->br); 39 opae_log("OPAE Manager (upstream) = %p\n", acc->mgr); 40 opae_log("==========================\n"); 41 42 if (acc->br) 43 opae_bridge_dump(acc->br); 44 } 45 46 static void opae_adapter_data_dump(void *data) 47 { 48 struct opae_adapter_data *d = data; 49 struct opae_adapter_data_pci *d_pci; 50 struct opae_reg_region *r; 51 int i; 52 53 opae_log("=====%s=====\n", __func__); 54 55 switch (d->type) { 56 case OPAE_FPGA_PCI: 57 d_pci = (struct opae_adapter_data_pci *)d; 58 59 opae_log("OPAE Adapter Type = PCI\n"); 60 opae_log("PCI Device ID: 0x%04x\n", d_pci->device_id); 61 opae_log("PCI Vendor ID: 0x%04x\n", d_pci->vendor_id); 62 opae_log("PCI bus: 0x%04x\n", d_pci->bus); 63 opae_log("PCI devid: 0x%04x\n", d_pci->devid); 64 opae_log("PCI function: 0x%04x\n", d_pci->function); 65 66 for (i = 0; i < PCI_MAX_RESOURCE; i++) { 67 r = &d_pci->region[i]; 68 opae_log("PCI Bar %d: phy(%llx) len(%llx) addr(%p)\n", 69 i, (unsigned long long)r->phys_addr, 70 (unsigned long long)r->len, r->addr); 71 } 72 break; 73 case OPAE_FPGA_NET: 74 break; 75 } 76 77 opae_log("==========================\n"); 78 } 79 80 void opae_adapter_dump(struct opae_adapter *adapter, int verbose) 81 { 82 struct opae_accelerator *acc; 83 84 if (verbose) { 85 opae_log("=====%s=====\n", __func__); 86 opae_log("OPAE Adapter %s\n", adapter->name); 87 opae_log("OPAE Adapter OPs = %p\n", adapter->ops); 88 opae_log("OPAE Adapter Private Data = %p\n", adapter->data); 89 opae_log("OPAE Manager (downstream) = %p\n", adapter->mgr); 90 91 if (adapter->mgr) 92 opae_manager_dump(adapter->mgr); 93 94 opae_adapter_for_each_acc(adapter, acc) 95 opae_accelerator_dump(acc); 96 97 if (adapter->data) 98 opae_adapter_data_dump(adapter->data); 99 100 opae_log("==========================\n"); 101 } 102 } 103