1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2023 Napatech A/S 4 */ 5 6 #ifndef _HW_MOD_BACKEND_H_ 7 #define _HW_MOD_BACKEND_H_ 8 9 #include <stdbool.h> 10 #include <string.h> 11 12 #include "ntlog.h" 13 14 #include "hw_mod_cat_v18.h" 15 #include "hw_mod_cat_v21.h" 16 #include "hw_mod_flm_v25.h" 17 #include "hw_mod_km_v7.h" 18 #include "hw_mod_qsl_v7.h" 19 #include "hw_mod_pdb_v9.h" 20 #include "hw_mod_slc_lr_v2.h" 21 #include "hw_mod_hsh_v5.h" 22 #include "hw_mod_tpe_v3.h" 23 24 #define MAX_PHYS_ADAPTERS 8 25 26 #define VER_MAJOR(ver) (((ver) >> 16) & 0xffff) 27 #define VER_MINOR(ver) ((ver) & 0xffff) 28 29 struct flow_api_backend_s; 30 struct common_func_s; 31 32 void *callocate_mod(struct common_func_s *mod, int sets, ...); 33 void zero_module_cache(struct common_func_s *mod); 34 35 #define ALL_ENTRIES -1000 36 #define ALL_BANK_ENTRIES -1001 37 38 #define INDEX_TOO_LARGE (-2) 39 #define INDEX_TOO_LARGE_LOG NT_LOG(INF, FILTER, "ERROR:%s: Index too large", __func__) 40 41 #define WORD_OFF_TOO_LARGE (-3) 42 #define WORD_OFF_TOO_LARGE_LOG NT_LOG(INF, FILTER, "ERROR:%s: Word offset too large", __func__) 43 44 #define UNSUP_FIELD (-5) 45 #define UNSUP_FIELD_LOG \ 46 NT_LOG(INF, FILTER, "ERROR:%s: Unsupported field in NIC module", __func__) 47 48 #define UNSUP_VER (-4) 49 #define UNSUP_VER_LOG \ 50 NT_LOG(INF, FILTER, "ERROR:%s: Unsupported NIC module: %s ver %i.%i", __func__, _MOD_, \ 51 VER_MAJOR(_VER_), VER_MINOR(_VER_)) 52 53 #define COUNT_ERROR (-4) 54 #define COUNT_ERROR_LOG(_RESOURCE_) \ 55 NT_LOG(INF, FILTER, \ 56 "ERROR:%s: Insufficient resource [ %s ] : NIC module: %s ver %i.%i", __func__, \ 57 #_RESOURCE_, _MOD_, VER_MAJOR(_VER_), VER_MINOR(_VER_)) \ 58 59 #define NOT_FOUND 0xffffffff 60 61 enum { 62 EXTRA_INDEXES 63 }; 64 65 #define GET(cached_val, val) ({ *(val) = *(cached_val); }) 66 67 #define SET(cached_val, val) ({ *(cached_val) = *(val); }) 68 69 #define GET_SET(cached_val, val) \ 70 do { \ 71 uint32_t *temp_val = (val); \ 72 typeof(cached_val) *temp_cached_val = &(cached_val); \ 73 if (get) \ 74 GET(temp_cached_val, temp_val); \ 75 else \ 76 SET(temp_cached_val, temp_val); \ 77 } while (0) 78 79 #define GET_SIGNED(cached_val, val) ({ *(val) = (uint32_t)(*(cached_val)); }) 80 81 #define SET_SIGNED(cached_val, val) ({ *(cached_val) = (int32_t)(*(val)); }) 82 83 #define GET_SET_SIGNED(cached_val, val) \ 84 do { \ 85 uint32_t *temp_val = (val); \ 86 typeof(cached_val) *temp_cached_val = &(cached_val); \ 87 if (get) \ 88 GET_SIGNED(temp_cached_val, temp_val); \ 89 else \ 90 SET_SIGNED(temp_cached_val, temp_val); \ 91 } while (0) 92 93 #define FIND_EQUAL_INDEX(be_module_reg, type, idx, start, nb_elements) \ 94 do { \ 95 typeof(be_module_reg) *temp_be_module = \ 96 (typeof(be_module_reg) *)be_module_reg; \ 97 typeof(idx) tmp_idx = (idx); \ 98 typeof(nb_elements) tmp_nb_elements = (nb_elements); \ 99 unsigned int start_idx = (unsigned int)(start); \ 100 *value = NOT_FOUND; \ 101 for (unsigned int i = start_idx; i < tmp_nb_elements; i++) { \ 102 if ((unsigned int)(tmp_idx) == i) \ 103 continue; \ 104 if (memcmp(&temp_be_module[tmp_idx], &temp_be_module[i], sizeof(type)) == \ 105 0) { \ 106 *value = i; \ 107 break; \ 108 } \ 109 } \ 110 } while (0) 111 112 #define DO_COMPARE_INDEXS(be_module_reg, type, idx, cmp_idx) \ 113 do { \ 114 typeof(be_module_reg) *temp_be_module = &(be_module_reg); \ 115 typeof(idx) tmp_idx = (idx); \ 116 typeof(cmp_idx) tmp_cmp_idx = (cmp_idx); \ 117 if ((unsigned int)(tmp_idx) != (unsigned int)(tmp_cmp_idx)) { \ 118 (void)memcmp(temp_be_module + tmp_idx, &temp_be_module[tmp_cmp_idx], \ 119 sizeof(type)); \ 120 } \ 121 } while (0) 122 123 static inline int is_non_zero(const void *addr, size_t n) 124 { 125 size_t i = 0; 126 const uint8_t *p = (const uint8_t *)addr; 127 128 for (i = 0; i < n; i++) 129 if (p[i] != 0) 130 return 1; 131 132 return 0; 133 } 134 135 enum frame_offs_e { 136 DYN_L2 = 1, 137 DYN_FIRST_VLAN = 2, 138 DYN_L3 = 4, 139 DYN_L4 = 7, 140 DYN_L4_PAYLOAD = 8, 141 DYN_TUN_L3 = 13, 142 DYN_TUN_L4 = 16, 143 DYN_TUN_L4_PAYLOAD = 17, 144 }; 145 146 /* Sideband info bit indicator */ 147 148 enum km_flm_if_select_e { 149 KM_FLM_IF_FIRST = 0, 150 KM_FLM_IF_SECOND = 1 151 }; 152 153 #define FIELD_START_INDEX 100 154 155 #define COMMON_FUNC_INFO_S \ 156 int ver; \ 157 void *base; \ 158 unsigned int alloced_size; \ 159 int debug 160 161 enum { 162 PROT_OTHER = 0, 163 PROT_L2_ETH2 = 1, 164 }; 165 166 enum { 167 PROT_L3_IPV4 = 1, 168 PROT_L3_IPV6 = 2 169 }; 170 171 enum { 172 PROT_L4_TCP = 1, 173 PROT_L4_UDP = 2, 174 PROT_L4_SCTP = 3, 175 PROT_L4_ICMP = 4 176 }; 177 178 enum { 179 PROT_TUN_GTPV1U = 6, 180 }; 181 182 enum { 183 PROT_TUN_L3_OTHER = 0, 184 PROT_TUN_L3_IPV4 = 1, 185 PROT_TUN_L3_IPV6 = 2 186 }; 187 188 enum { 189 PROT_TUN_L4_OTHER = 0, 190 PROT_TUN_L4_TCP = 1, 191 PROT_TUN_L4_UDP = 2, 192 PROT_TUN_L4_SCTP = 3, 193 PROT_TUN_L4_ICMP = 4 194 }; 195 196 197 enum { 198 CPY_SELECT_DSCP_IPV4 = 0, 199 CPY_SELECT_DSCP_IPV6 = 1, 200 CPY_SELECT_RQI_QFI = 2, 201 CPY_SELECT_IPV4 = 3, 202 CPY_SELECT_PORT = 4, 203 CPY_SELECT_TEID = 5, 204 }; 205 206 struct common_func_s { 207 COMMON_FUNC_INFO_S; 208 }; 209 210 struct cat_func_s { 211 COMMON_FUNC_INFO_S; 212 uint32_t nb_cat_funcs; 213 uint32_t nb_flow_types; 214 uint32_t nb_pm_ext; 215 uint32_t nb_len; 216 uint32_t kcc_size; 217 uint32_t cts_num; 218 uint32_t kcc_banks; 219 uint32_t kcc_id_bit_size; 220 uint32_t kcc_records; 221 uint32_t km_if_count; 222 int32_t km_if_m0; 223 int32_t km_if_m1; 224 225 union { 226 struct hw_mod_cat_v18_s v18; 227 struct hw_mod_cat_v21_s v21; 228 }; 229 }; 230 enum hw_cat_e { 231 /* 232 * functions initial CAT v18 233 */ 234 /* 00 */ HW_CAT_CFN_SET_ALL_DEFAULTS = 0, 235 /* 01 */ HW_CAT_CFN_PRESET_ALL, 236 /* 02 */ HW_CAT_CFN_COMPARE, 237 /* 03 */ HW_CAT_CFN_FIND, 238 /* 04 */ HW_CAT_CFN_COPY_FROM, 239 /* 05 */ HW_CAT_COT_PRESET_ALL, 240 /* 06 */ HW_CAT_COT_COMPARE, 241 /* 07 */ HW_CAT_COT_FIND, 242 /* 08 */ HW_CAT_COT_COPY_FROM, 243 /* fields */ 244 /* 00 */ HW_CAT_CFN_ENABLE = FIELD_START_INDEX, 245 /* 01 */ HW_CAT_CFN_INV, 246 /* 02 */ HW_CAT_CFN_PTC_INV, 247 /* 03 */ HW_CAT_CFN_PTC_ISL, 248 /* 04 */ HW_CAT_CFN_PTC_CFP, 249 /* 05 */ HW_CAT_CFN_PTC_MAC, 250 /* 06 */ HW_CAT_CFN_PTC_L2, 251 /* 07 */ HW_CAT_CFN_PTC_VNTAG, 252 /* 08 */ HW_CAT_CFN_PTC_VLAN, 253 /* 09 */ HW_CAT_CFN_PTC_MPLS, 254 /* 10 */ HW_CAT_CFN_PTC_L3, 255 /* 11 */ HW_CAT_CFN_PTC_FRAG, 256 /* 12 */ HW_CAT_CFN_PTC_IP_PROT, 257 /* 13 */ HW_CAT_CFN_PTC_L4, 258 /* 14 */ HW_CAT_CFN_PTC_TUNNEL, 259 /* 15 */ HW_CAT_CFN_PTC_TNL_L2, 260 /* 16 */ HW_CAT_CFN_PTC_TNL_VLAN, 261 /* 17 */ HW_CAT_CFN_PTC_TNL_MPLS, 262 /* 18 */ HW_CAT_CFN_PTC_TNL_L3, 263 /* 19 */ HW_CAT_CFN_PTC_TNL_FRAG, 264 /* 20 */ HW_CAT_CFN_PTC_TNL_IP_PROT, 265 /* 21 */ HW_CAT_CFN_PTC_TNL_L4, 266 /* 22 */ HW_CAT_CFN_ERR_INV, 267 /* 23 */ HW_CAT_CFN_ERR_CV, 268 /* 24 */ HW_CAT_CFN_ERR_FCS, 269 /* 25 */ HW_CAT_CFN_ERR_TRUNC, 270 /* 26 */ HW_CAT_CFN_ERR_L3_CS, 271 /* 27 */ HW_CAT_CFN_ERR_L4_CS, 272 /* 28 */ HW_CAT_CFN_MAC_PORT, 273 /* 29 */ HW_CAT_CFN_PM_CMP, 274 /* 30 */ HW_CAT_CFN_PM_DCT, 275 /* 31 */ HW_CAT_CFN_PM_EXT_INV, 276 /* 32 */ HW_CAT_CFN_PM_CMB, 277 /* 33 */ HW_CAT_CFN_PM_AND_INV, 278 /* 34 */ HW_CAT_CFN_PM_OR_INV, 279 /* 35 */ HW_CAT_CFN_PM_INV, 280 /* 36 */ HW_CAT_CFN_LC, 281 /* 37 */ HW_CAT_CFN_LC_INV, 282 /* 38 */ HW_CAT_CFN_KM0_OR, 283 /* 39 */ HW_CAT_CFN_KM1_OR, 284 /* 40 */ HW_CAT_KCE_ENABLE_BM, 285 /* 41 */ HW_CAT_KCS_CATEGORY, 286 /* 42 */ HW_CAT_FTE_ENABLE_BM, 287 /* 43 */ HW_CAT_CTE_ENABLE_BM, 288 /* 44 */ HW_CAT_CTS_CAT_A, 289 /* 45 */ HW_CAT_CTS_CAT_B, 290 /* 46 */ HW_CAT_COT_COLOR, 291 /* 47 */ HW_CAT_COT_KM, 292 /* 48 */ HW_CAT_CCT_COLOR, 293 /* 49 */ HW_CAT_CCT_KM, 294 /* 50 */ HW_CAT_KCC_KEY, 295 /* 51 */ HW_CAT_KCC_CATEGORY, 296 /* 52 */ HW_CAT_KCC_ID, 297 /* 53 */ HW_CAT_EXO_DYN, 298 /* 54 */ HW_CAT_EXO_OFS, 299 /* 55 */ HW_CAT_RCK_DATA, 300 /* 56 */ HW_CAT_LEN_LOWER, 301 /* 57 */ HW_CAT_LEN_UPPER, 302 /* 58 */ HW_CAT_LEN_DYN1, 303 /* 59 */ HW_CAT_LEN_DYN2, 304 /* 60 */ HW_CAT_LEN_INV, 305 /* 61 */ HW_CAT_CFN_ERR_TNL_L3_CS, 306 /* 62 */ HW_CAT_CFN_ERR_TNL_L4_CS, 307 /* 63 */ HW_CAT_CFN_ERR_TTL_EXP, 308 /* 64 */ HW_CAT_CFN_ERR_TNL_TTL_EXP, 309 }; 310 311 bool hw_mod_cat_present(struct flow_api_backend_s *be); 312 int hw_mod_cat_alloc(struct flow_api_backend_s *be); 313 void hw_mod_cat_free(struct flow_api_backend_s *be); 314 int hw_mod_cat_reset(struct flow_api_backend_s *be); 315 int hw_mod_cat_cfn_flush(struct flow_api_backend_s *be, int start_idx, int count); 316 int hw_mod_cat_cfn_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, int word_off, 317 uint32_t value); 318 /* KCE/KCS/FTE KM */ 319 int hw_mod_cat_fte_km_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 320 int start_idx, int count); 321 int hw_mod_cat_fte_km_set(struct flow_api_backend_s *be, enum hw_cat_e field, 322 enum km_flm_if_select_e if_num, int index, uint32_t value); 323 int hw_mod_cat_fte_km_get(struct flow_api_backend_s *be, enum hw_cat_e field, 324 enum km_flm_if_select_e if_num, int index, uint32_t *value); 325 /* KCE/KCS/FTE FLM */ 326 int hw_mod_cat_fte_flm_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 327 int start_idx, int count); 328 int hw_mod_cat_fte_flm_set(struct flow_api_backend_s *be, enum hw_cat_e field, 329 enum km_flm_if_select_e if_num, int index, uint32_t value); 330 int hw_mod_cat_fte_flm_get(struct flow_api_backend_s *be, enum hw_cat_e field, 331 enum km_flm_if_select_e if_num, int index, uint32_t *value); 332 333 int hw_mod_cat_cte_flush(struct flow_api_backend_s *be, int start_idx, int count); 334 int hw_mod_cat_cte_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 335 uint32_t value); 336 337 int hw_mod_cat_cts_flush(struct flow_api_backend_s *be, int start_idx, int count); 338 int hw_mod_cat_cts_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 339 uint32_t value); 340 341 int hw_mod_cat_cot_flush(struct flow_api_backend_s *be, int start_idx, int count); 342 int hw_mod_cat_cot_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 343 uint32_t value); 344 345 int hw_mod_cat_cct_flush(struct flow_api_backend_s *be, int start_idx, int count); 346 347 int hw_mod_cat_kcc_flush(struct flow_api_backend_s *be, int start_idx, int count); 348 349 int hw_mod_cat_exo_flush(struct flow_api_backend_s *be, int start_idx, int count); 350 int hw_mod_cat_rck_flush(struct flow_api_backend_s *be, int start_idx, int count); 351 int hw_mod_cat_len_flush(struct flow_api_backend_s *be, int start_idx, int count); 352 353 struct km_func_s { 354 COMMON_FUNC_INFO_S; 355 uint32_t nb_categories; 356 uint32_t nb_cam_banks; 357 uint32_t nb_cam_record_words; 358 uint32_t nb_cam_records; 359 uint32_t nb_tcam_banks; 360 uint32_t nb_tcam_bank_width; 361 /* not read from backend, but rather set using version */ 362 uint32_t nb_km_rcp_mask_a_word_size; 363 /* --- || --- */ 364 uint32_t nb_km_rcp_mask_b_word_size; 365 union { 366 struct hw_mod_km_v7_s v7; 367 }; 368 }; 369 enum hw_km_e { 370 /* functions */ 371 HW_KM_RCP_PRESET_ALL = 0, 372 HW_KM_CAM_PRESET_ALL, 373 /* to sync and reset hw with cache - force write all entries in a bank */ 374 HW_KM_TCAM_BANK_RESET, 375 /* fields */ 376 HW_KM_RCP_QW0_DYN = FIELD_START_INDEX, 377 HW_KM_RCP_QW0_OFS, 378 HW_KM_RCP_QW0_SEL_A, 379 HW_KM_RCP_QW0_SEL_B, 380 HW_KM_RCP_QW4_DYN, 381 HW_KM_RCP_QW4_OFS, 382 HW_KM_RCP_QW4_SEL_A, 383 HW_KM_RCP_QW4_SEL_B, 384 HW_KM_RCP_DW8_DYN, 385 HW_KM_RCP_DW8_OFS, 386 HW_KM_RCP_DW8_SEL_A, 387 HW_KM_RCP_DW8_SEL_B, 388 HW_KM_RCP_DW10_DYN, 389 HW_KM_RCP_DW10_OFS, 390 HW_KM_RCP_DW10_SEL_A, 391 HW_KM_RCP_DW10_SEL_B, 392 HW_KM_RCP_SWX_CCH, 393 HW_KM_RCP_SWX_SEL_A, 394 HW_KM_RCP_SWX_SEL_B, 395 HW_KM_RCP_MASK_A, 396 HW_KM_RCP_MASK_B, 397 HW_KM_RCP_DUAL, 398 HW_KM_RCP_PAIRED, 399 HW_KM_RCP_EL_A, 400 HW_KM_RCP_EL_B, 401 HW_KM_RCP_INFO_A, 402 HW_KM_RCP_INFO_B, 403 HW_KM_RCP_FTM_A, 404 HW_KM_RCP_FTM_B, 405 HW_KM_RCP_BANK_A, 406 HW_KM_RCP_BANK_B, 407 HW_KM_RCP_KL_A, 408 HW_KM_RCP_KL_B, 409 HW_KM_RCP_KEYWAY_A, 410 HW_KM_RCP_KEYWAY_B, 411 HW_KM_RCP_SYNERGY_MODE, 412 HW_KM_RCP_DW0_B_DYN, 413 HW_KM_RCP_DW0_B_OFS, 414 HW_KM_RCP_DW2_B_DYN, 415 HW_KM_RCP_DW2_B_OFS, 416 HW_KM_RCP_SW4_B_DYN, 417 HW_KM_RCP_SW4_B_OFS, 418 HW_KM_RCP_SW5_B_DYN, 419 HW_KM_RCP_SW5_B_OFS, 420 HW_KM_CAM_W0, 421 HW_KM_CAM_W1, 422 HW_KM_CAM_W2, 423 HW_KM_CAM_W3, 424 HW_KM_CAM_W4, 425 HW_KM_CAM_W5, 426 HW_KM_CAM_FT0, 427 HW_KM_CAM_FT1, 428 HW_KM_CAM_FT2, 429 HW_KM_CAM_FT3, 430 HW_KM_CAM_FT4, 431 HW_KM_CAM_FT5, 432 HW_KM_TCAM_T, 433 HW_KM_TCI_COLOR, 434 HW_KM_TCI_FT, 435 HW_KM_TCQ_BANK_MASK, 436 HW_KM_TCQ_QUAL 437 }; 438 bool hw_mod_km_present(struct flow_api_backend_s *be); 439 int hw_mod_km_alloc(struct flow_api_backend_s *be); 440 void hw_mod_km_free(struct flow_api_backend_s *be); 441 int hw_mod_km_reset(struct flow_api_backend_s *be); 442 int hw_mod_km_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 443 int hw_mod_km_cam_flush(struct flow_api_backend_s *be, int start_bank, int start_record, 444 int count); 445 int hw_mod_km_tcam_flush(struct flow_api_backend_s *be, int start_bank, int count); 446 int hw_mod_km_tcam_set(struct flow_api_backend_s *be, enum hw_km_e field, int bank, int byte, 447 int byte_val, uint32_t *value_set); 448 int hw_mod_km_tci_flush(struct flow_api_backend_s *be, int start_bank, int start_record, 449 int count); 450 int hw_mod_km_tcq_flush(struct flow_api_backend_s *be, int start_bank, int start_record, 451 int count); 452 453 struct flm_func_s { 454 COMMON_FUNC_INFO_S; 455 uint32_t nb_categories; 456 uint32_t nb_size_mb; 457 uint32_t nb_entry_size; 458 uint32_t nb_variant; 459 uint32_t nb_prios; 460 uint32_t nb_pst_profiles; 461 uint32_t nb_scrub_profiles; 462 uint32_t nb_rpp_clock_in_ps; 463 uint32_t nb_load_aps_max; 464 union { 465 struct hw_mod_flm_v25_s v25; 466 }; 467 }; 468 enum hw_flm_e { 469 /* functions */ 470 HW_FLM_CONTROL_PRESET_ALL = 0, 471 HW_FLM_RCP_PRESET_ALL, 472 HW_FLM_FLOW_LRN_DATA, 473 HW_FLM_FLOW_INF_STA_DATA, 474 /* Control fields */ 475 HW_FLM_CONTROL_ENABLE = FIELD_START_INDEX, 476 HW_FLM_CONTROL_INIT, 477 HW_FLM_CONTROL_LDS, 478 HW_FLM_CONTROL_LFS, 479 HW_FLM_CONTROL_LIS, 480 HW_FLM_CONTROL_UDS, 481 HW_FLM_CONTROL_UIS, 482 HW_FLM_CONTROL_RDS, 483 HW_FLM_CONTROL_RIS, 484 HW_FLM_CONTROL_PDS, 485 HW_FLM_CONTROL_PIS, 486 HW_FLM_CONTROL_CRCWR, 487 HW_FLM_CONTROL_CRCRD, 488 HW_FLM_CONTROL_RBL, 489 HW_FLM_CONTROL_EAB, 490 HW_FLM_CONTROL_SPLIT_SDRAM_USAGE, 491 HW_FLM_STATUS_CALIB_SUCCESS, 492 HW_FLM_STATUS_CALIB_FAIL, 493 HW_FLM_STATUS_INITDONE, 494 HW_FLM_STATUS_IDLE, 495 HW_FLM_STATUS_CRITICAL, 496 HW_FLM_STATUS_PANIC, 497 HW_FLM_STATUS_CRCERR, 498 HW_FLM_STATUS_EFT_BP, 499 HW_FLM_STATUS_CACHE_BUFFER_CRITICAL, 500 HW_FLM_LOAD_BIN, 501 HW_FLM_LOAD_LPS, 502 HW_FLM_LOAD_APS, 503 HW_FLM_PRIO_LIMIT0, 504 HW_FLM_PRIO_FT0, 505 HW_FLM_PRIO_LIMIT1, 506 HW_FLM_PRIO_FT1, 507 HW_FLM_PRIO_LIMIT2, 508 HW_FLM_PRIO_FT2, 509 HW_FLM_PRIO_LIMIT3, 510 HW_FLM_PRIO_FT3, 511 HW_FLM_PST_PRESET_ALL, 512 HW_FLM_PST_BP, 513 HW_FLM_PST_PP, 514 HW_FLM_PST_TP, 515 HW_FLM_RCP_LOOKUP, 516 HW_FLM_RCP_QW0_DYN, 517 HW_FLM_RCP_QW0_OFS, 518 HW_FLM_RCP_QW0_SEL, 519 HW_FLM_RCP_QW4_DYN, 520 HW_FLM_RCP_QW4_OFS, 521 HW_FLM_RCP_SW8_DYN, 522 HW_FLM_RCP_SW8_OFS, 523 HW_FLM_RCP_SW8_SEL, 524 HW_FLM_RCP_SW9_DYN, 525 HW_FLM_RCP_SW9_OFS, 526 HW_FLM_RCP_MASK, 527 HW_FLM_RCP_KID, 528 HW_FLM_RCP_OPN, 529 HW_FLM_RCP_IPN, 530 HW_FLM_RCP_BYT_DYN, 531 HW_FLM_RCP_BYT_OFS, 532 HW_FLM_RCP_TXPLM, 533 HW_FLM_RCP_AUTO_IPV4_MASK, 534 HW_FLM_BUF_CTRL_LRN_FREE, 535 HW_FLM_BUF_CTRL_INF_AVAIL, 536 HW_FLM_BUF_CTRL_STA_AVAIL, 537 HW_FLM_STAT_LRN_DONE, 538 HW_FLM_STAT_LRN_IGNORE, 539 HW_FLM_STAT_LRN_FAIL, 540 HW_FLM_STAT_UNL_DONE, 541 HW_FLM_STAT_UNL_IGNORE, 542 HW_FLM_STAT_REL_DONE, 543 HW_FLM_STAT_REL_IGNORE, 544 HW_FLM_STAT_PRB_DONE, 545 HW_FLM_STAT_PRB_IGNORE, 546 HW_FLM_STAT_AUL_DONE, 547 HW_FLM_STAT_AUL_IGNORE, 548 HW_FLM_STAT_AUL_FAIL, 549 HW_FLM_STAT_TUL_DONE, 550 HW_FLM_STAT_FLOWS, 551 HW_FLM_STAT_STA_DONE, /* module ver 0.20 */ 552 HW_FLM_STAT_INF_DONE, /* module ver 0.20 */ 553 HW_FLM_STAT_INF_SKIP, /* module ver 0.20 */ 554 HW_FLM_STAT_PCK_HIT, /* module ver 0.20 */ 555 HW_FLM_STAT_PCK_MISS, /* module ver 0.20 */ 556 HW_FLM_STAT_PCK_UNH, /* module ver 0.20 */ 557 HW_FLM_STAT_PCK_DIS, /* module ver 0.20 */ 558 HW_FLM_STAT_CSH_HIT, /* module ver 0.20 */ 559 HW_FLM_STAT_CSH_MISS, /* module ver 0.20 */ 560 HW_FLM_STAT_CSH_UNH, /* module ver 0.20 */ 561 HW_FLM_STAT_CUC_START, /* module ver 0.20 */ 562 HW_FLM_STAT_CUC_MOVE, /* module ver 0.20 */ 563 HW_FLM_SCAN_I, /* module ver 0.22 */ 564 HW_FLM_SCRUB_PRESET_ALL, 565 HW_FLM_SCRUB_T, /* module ver 0.22 */ 566 HW_FLM_SCRUB_R, /* module ver 0.24 */ 567 HW_FLM_SCRUB_DEL, /* module ver 0.24 */ 568 HW_FLM_SCRUB_INF, /* module ver 0.24 */ 569 }; 570 571 bool hw_mod_flm_present(struct flow_api_backend_s *be); 572 int hw_mod_flm_alloc(struct flow_api_backend_s *be); 573 void hw_mod_flm_free(struct flow_api_backend_s *be); 574 int hw_mod_flm_reset(struct flow_api_backend_s *be); 575 576 int hw_mod_flm_control_flush(struct flow_api_backend_s *be); 577 int hw_mod_flm_control_set(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t value); 578 579 int hw_mod_flm_scan_flush(struct flow_api_backend_s *be); 580 581 int hw_mod_flm_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 582 583 int hw_mod_flm_scrub_flush(struct flow_api_backend_s *be, int start_idx, int count); 584 585 struct hsh_func_s { 586 COMMON_FUNC_INFO_S; 587 uint32_t nb_rcp;/* number of HSH recipes supported by FPGA */ 588 /* indication if Toeplitz is supported by FPGA, i.e. 0 - unsupported, 1 - supported */ 589 uint32_t toeplitz; 590 union { 591 struct hw_mod_hsh_v5_s v5; 592 }; 593 }; 594 enum hw_hsh_e { 595 /* functions */ 596 HW_HSH_RCP_PRESET_ALL = 0, 597 HW_HSH_RCP_COMPARE, 598 HW_HSH_RCP_FIND, 599 /* fields */ 600 HW_HSH_RCP_LOAD_DIST_TYPE = FIELD_START_INDEX, 601 HW_HSH_RCP_MAC_PORT_MASK, 602 HW_HSH_RCP_SORT, 603 HW_HSH_RCP_QW0_PE, 604 HW_HSH_RCP_QW0_OFS, 605 HW_HSH_RCP_QW4_PE, 606 HW_HSH_RCP_QW4_OFS, 607 HW_HSH_RCP_W8_PE, 608 HW_HSH_RCP_W8_OFS, 609 HW_HSH_RCP_W8_SORT, 610 HW_HSH_RCP_W9_PE, 611 HW_HSH_RCP_W9_OFS, 612 HW_HSH_RCP_W9_SORT, 613 HW_HSH_RCP_W9_P, 614 HW_HSH_RCP_P_MASK, 615 HW_HSH_RCP_WORD_MASK, 616 HW_HSH_RCP_SEED, 617 HW_HSH_RCP_TNL_P, 618 HW_HSH_RCP_HSH_VALID, 619 HW_HSH_RCP_HSH_TYPE, 620 HW_HSH_RCP_TOEPLITZ, 621 HW_HSH_RCP_K, 622 HW_HSH_RCP_AUTO_IPV4_MASK 623 }; 624 bool hw_mod_hsh_present(struct flow_api_backend_s *be); 625 int hw_mod_hsh_alloc(struct flow_api_backend_s *be); 626 void hw_mod_hsh_free(struct flow_api_backend_s *be); 627 int hw_mod_hsh_reset(struct flow_api_backend_s *be); 628 int hw_mod_hsh_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 629 630 struct qsl_func_s { 631 COMMON_FUNC_INFO_S; 632 uint32_t nb_rcp_categories; 633 uint32_t nb_qst_entries; 634 union { 635 struct hw_mod_qsl_v7_s v7; 636 }; 637 }; 638 enum hw_qsl_e { 639 /* functions */ 640 HW_QSL_RCP_PRESET_ALL = 0, 641 HW_QSL_RCP_COMPARE, 642 HW_QSL_RCP_FIND, 643 HW_QSL_QST_PRESET_ALL, 644 /* fields */ 645 HW_QSL_RCP_DISCARD = FIELD_START_INDEX, 646 HW_QSL_RCP_DROP, 647 HW_QSL_RCP_TBL_LO, 648 HW_QSL_RCP_TBL_HI, 649 HW_QSL_RCP_TBL_IDX, 650 HW_QSL_RCP_TBL_MSK, 651 HW_QSL_RCP_LR, 652 HW_QSL_RCP_TSA, 653 HW_QSL_RCP_VLI, 654 HW_QSL_QST_QUEUE, 655 HW_QSL_QST_EN, /* Alias: HW_QSL_QST_QEN */ 656 HW_QSL_QST_TX_PORT, 657 HW_QSL_QST_LRE, 658 HW_QSL_QST_TCI, 659 HW_QSL_QST_VEN, 660 HW_QSL_QEN_EN, 661 HW_QSL_UNMQ_DEST_QUEUE, 662 HW_QSL_UNMQ_EN, 663 }; 664 bool hw_mod_qsl_present(struct flow_api_backend_s *be); 665 int hw_mod_qsl_alloc(struct flow_api_backend_s *be); 666 void hw_mod_qsl_free(struct flow_api_backend_s *be); 667 int hw_mod_qsl_reset(struct flow_api_backend_s *be); 668 int hw_mod_qsl_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 669 int hw_mod_qsl_rcp_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 670 uint32_t value); 671 int hw_mod_qsl_qst_flush(struct flow_api_backend_s *be, int start_idx, int count); 672 int hw_mod_qsl_qst_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 673 uint32_t value); 674 int hw_mod_qsl_qen_flush(struct flow_api_backend_s *be, int start_idx, int count); 675 int hw_mod_qsl_qen_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 676 uint32_t value); 677 int hw_mod_qsl_qen_get(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 678 uint32_t *value); 679 int hw_mod_qsl_unmq_flush(struct flow_api_backend_s *be, int start_idx, int count); 680 int hw_mod_qsl_unmq_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 681 uint32_t value); 682 683 struct slc_lr_func_s { 684 COMMON_FUNC_INFO_S; 685 union { 686 struct hw_mod_slc_lr_v2_s v2; 687 }; 688 }; 689 enum hw_slc_lr_e { 690 /* functions */ 691 HW_SLC_LR_RCP_PRESET_ALL = 0, 692 HW_SLC_LR_RCP_COMPARE, 693 HW_SLC_LR_RCP_FIND, 694 /* fields */ 695 HW_SLC_LR_RCP_HEAD_SLC_EN = FIELD_START_INDEX, 696 HW_SLC_LR_RCP_HEAD_DYN, 697 HW_SLC_LR_RCP_HEAD_OFS, 698 HW_SLC_LR_RCP_TAIL_SLC_EN, 699 HW_SLC_LR_RCP_TAIL_DYN, 700 HW_SLC_LR_RCP_TAIL_OFS, 701 HW_SLC_LR_RCP_PCAP 702 }; 703 bool hw_mod_slc_lr_present(struct flow_api_backend_s *be); 704 int hw_mod_slc_lr_alloc(struct flow_api_backend_s *be); 705 void hw_mod_slc_lr_free(struct flow_api_backend_s *be); 706 int hw_mod_slc_lr_reset(struct flow_api_backend_s *be); 707 int hw_mod_slc_lr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 708 int hw_mod_slc_lr_rcp_set(struct flow_api_backend_s *be, enum hw_slc_lr_e field, uint32_t index, 709 uint32_t value); 710 711 struct pdb_func_s { 712 COMMON_FUNC_INFO_S; 713 uint32_t nb_pdb_rcp_categories; 714 715 union { 716 struct hw_mod_pdb_v9_s v9; 717 }; 718 }; 719 enum hw_pdb_e { 720 /* functions */ 721 HW_PDB_RCP_PRESET_ALL = 0, 722 HW_PDB_RCP_COMPARE, 723 HW_PDB_RCP_FIND, 724 /* fields */ 725 HW_PDB_RCP_DESCRIPTOR = FIELD_START_INDEX, 726 HW_PDB_RCP_DESC_LEN, 727 HW_PDB_RCP_TX_PORT, 728 HW_PDB_RCP_TX_IGNORE, 729 HW_PDB_RCP_TX_NOW, 730 HW_PDB_RCP_CRC_OVERWRITE, 731 HW_PDB_RCP_ALIGN, 732 HW_PDB_RCP_OFS0_DYN, 733 HW_PDB_RCP_OFS0_REL, 734 HW_PDB_RCP_OFS1_DYN, 735 HW_PDB_RCP_OFS1_REL, 736 HW_PDB_RCP_OFS2_DYN, 737 HW_PDB_RCP_OFS2_REL, 738 HW_PDB_RCP_IP_PROT_TNL, 739 HW_PDB_RCP_PPC_HSH, 740 HW_PDB_RCP_DUPLICATE_EN, 741 HW_PDB_RCP_DUPLICATE_BIT, 742 HW_PDB_RCP_PCAP_KEEP_FCS, 743 HW_PDB_CONFIG_TS_FORMAT, 744 HW_PDB_CONFIG_PORT_OFS, 745 }; 746 bool hw_mod_pdb_present(struct flow_api_backend_s *be); 747 int hw_mod_pdb_alloc(struct flow_api_backend_s *be); 748 void hw_mod_pdb_free(struct flow_api_backend_s *be); 749 int hw_mod_pdb_reset(struct flow_api_backend_s *be); 750 int hw_mod_pdb_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 751 int hw_mod_pdb_rcp_set(struct flow_api_backend_s *be, enum hw_pdb_e field, uint32_t index, 752 uint32_t value); 753 754 int hw_mod_pdb_config_flush(struct flow_api_backend_s *be); 755 756 struct tpe_func_s { 757 COMMON_FUNC_INFO_S; 758 uint32_t nb_rcp_categories; 759 uint32_t nb_ifr_categories; 760 uint32_t nb_cpy_writers; 761 uint32_t nb_rpl_depth; 762 uint32_t nb_rpl_ext_categories; 763 union { 764 struct hw_mod_tpe_v3_s v3; 765 }; 766 }; 767 enum hw_tpe_e { 768 /* functions */ 769 HW_TPE_PRESET_ALL = 0, 770 HW_TPE_FIND, 771 HW_TPE_COMPARE, 772 /* Control fields */ 773 HW_TPE_RPP_RCP_EXP = FIELD_START_INDEX, 774 HW_TPE_IFR_RCP_IPV4_EN, 775 HW_TPE_IFR_RCP_IPV4_DF_DROP, 776 HW_TPE_IFR_RCP_IPV6_EN, 777 HW_TPE_IFR_RCP_IPV6_DROP, 778 HW_TPE_IFR_RCP_MTU, 779 HW_TPE_INS_RCP_DYN, 780 HW_TPE_INS_RCP_OFS, 781 HW_TPE_INS_RCP_LEN, 782 HW_TPE_RPL_RCP_DYN, 783 HW_TPE_RPL_RCP_OFS, 784 HW_TPE_RPL_RCP_LEN, 785 HW_TPE_RPL_RCP_RPL_PTR, 786 HW_TPE_RPL_RCP_EXT_PRIO, 787 HW_TPE_RPL_RCP_ETH_TYPE_WR, 788 HW_TPE_RPL_EXT_RPL_PTR, 789 HW_TPE_RPL_EXT_META_RPL_LEN, /* SW only */ 790 HW_TPE_RPL_RPL_VALUE, 791 HW_TPE_CPY_RCP_READER_SELECT, 792 HW_TPE_CPY_RCP_DYN, 793 HW_TPE_CPY_RCP_OFS, 794 HW_TPE_CPY_RCP_LEN, 795 HW_TPE_HFU_RCP_LEN_A_WR, 796 HW_TPE_HFU_RCP_LEN_A_OUTER_L4_LEN, 797 HW_TPE_HFU_RCP_LEN_A_POS_DYN, 798 HW_TPE_HFU_RCP_LEN_A_POS_OFS, 799 HW_TPE_HFU_RCP_LEN_A_ADD_DYN, 800 HW_TPE_HFU_RCP_LEN_A_ADD_OFS, 801 HW_TPE_HFU_RCP_LEN_A_SUB_DYN, 802 HW_TPE_HFU_RCP_LEN_B_WR, 803 HW_TPE_HFU_RCP_LEN_B_POS_DYN, 804 HW_TPE_HFU_RCP_LEN_B_POS_OFS, 805 HW_TPE_HFU_RCP_LEN_B_ADD_DYN, 806 HW_TPE_HFU_RCP_LEN_B_ADD_OFS, 807 HW_TPE_HFU_RCP_LEN_B_SUB_DYN, 808 HW_TPE_HFU_RCP_LEN_C_WR, 809 HW_TPE_HFU_RCP_LEN_C_POS_DYN, 810 HW_TPE_HFU_RCP_LEN_C_POS_OFS, 811 HW_TPE_HFU_RCP_LEN_C_ADD_DYN, 812 HW_TPE_HFU_RCP_LEN_C_ADD_OFS, 813 HW_TPE_HFU_RCP_LEN_C_SUB_DYN, 814 HW_TPE_HFU_RCP_TTL_WR, 815 HW_TPE_HFU_RCP_TTL_POS_DYN, 816 HW_TPE_HFU_RCP_TTL_POS_OFS, 817 HW_TPE_CSU_RCP_OUTER_L3_CMD, 818 HW_TPE_CSU_RCP_OUTER_L4_CMD, 819 HW_TPE_CSU_RCP_INNER_L3_CMD, 820 HW_TPE_CSU_RCP_INNER_L4_CMD, 821 }; 822 bool hw_mod_tpe_present(struct flow_api_backend_s *be); 823 int hw_mod_tpe_alloc(struct flow_api_backend_s *be); 824 void hw_mod_tpe_free(struct flow_api_backend_s *be); 825 int hw_mod_tpe_reset(struct flow_api_backend_s *be); 826 827 int hw_mod_tpe_rpp_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 828 829 int hw_mod_tpe_rpp_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 830 831 int hw_mod_tpe_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 832 833 int hw_mod_tpe_ins_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 834 835 int hw_mod_tpe_rpl_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 836 837 int hw_mod_tpe_rpl_ext_flush(struct flow_api_backend_s *be, int start_idx, int count); 838 839 int hw_mod_tpe_rpl_rpl_flush(struct flow_api_backend_s *be, int start_idx, int count); 840 841 int hw_mod_tpe_cpy_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 842 843 int hw_mod_tpe_hfu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 844 845 int hw_mod_tpe_csu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 846 847 enum debug_mode_e { 848 FLOW_BACKEND_DEBUG_MODE_NONE = 0x0000, 849 FLOW_BACKEND_DEBUG_MODE_WRITE = 0x0001 850 }; 851 852 struct flow_api_backend_ops { 853 int version; 854 int (*set_debug_mode)(void *dev, enum debug_mode_e mode); 855 int (*get_nb_phy_port)(void *dev); 856 int (*get_nb_rx_port)(void *dev); 857 int (*get_ltx_avail)(void *dev); 858 int (*get_nb_cat_funcs)(void *dev); 859 int (*get_nb_categories)(void *dev); 860 int (*get_nb_cat_km_if_cnt)(void *dev); 861 int (*get_nb_cat_km_if_m0)(void *dev); 862 int (*get_nb_cat_km_if_m1)(void *dev); 863 864 int (*get_nb_queues)(void *dev); 865 int (*get_nb_km_flow_types)(void *dev); 866 int (*get_nb_pm_ext)(void *dev); 867 int (*get_nb_len)(void *dev); 868 int (*get_kcc_size)(void *dev); 869 int (*get_kcc_banks)(void *dev); 870 int (*get_nb_km_categories)(void *dev); 871 int (*get_nb_km_cam_banks)(void *dev); 872 int (*get_nb_km_cam_record_words)(void *dev); 873 int (*get_nb_km_cam_records)(void *dev); 874 int (*get_nb_km_tcam_banks)(void *dev); 875 int (*get_nb_km_tcam_bank_width)(void *dev); 876 int (*get_nb_flm_categories)(void *dev); 877 int (*get_nb_flm_size_mb)(void *dev); 878 int (*get_nb_flm_entry_size)(void *dev); 879 int (*get_nb_flm_variant)(void *dev); 880 int (*get_nb_flm_prios)(void *dev); 881 int (*get_nb_flm_pst_profiles)(void *dev); 882 int (*get_nb_flm_scrub_profiles)(void *dev); 883 int (*get_nb_flm_load_aps_max)(void *dev); 884 int (*get_nb_qsl_categories)(void *dev); 885 int (*get_nb_qsl_qst_entries)(void *dev); 886 int (*get_nb_pdb_categories)(void *dev); 887 int (*get_nb_roa_categories)(void *dev); 888 int (*get_nb_tpe_categories)(void *dev); 889 int (*get_nb_tx_cpy_writers)(void *dev); 890 int (*get_nb_tx_cpy_mask_mem)(void *dev); 891 int (*get_nb_tx_rpl_depth)(void *dev); 892 int (*get_nb_tx_rpl_ext_categories)(void *dev); 893 int (*get_nb_tpe_ifr_categories)(void *dev); 894 int (*get_nb_rpp_per_ps)(void *dev); 895 int (*get_nb_hsh_categories)(void *dev); 896 int (*get_nb_hsh_toeplitz)(void *dev); 897 898 int (*alloc_rx_queue)(void *dev, int queue_id); 899 int (*free_rx_queue)(void *dev, int hw_queue); 900 901 /* CAT */ 902 bool (*get_cat_present)(void *dev); 903 uint32_t (*get_cat_version)(void *dev); 904 int (*cat_cfn_flush)(void *dev, const struct cat_func_s *cat, int cat_func, int cnt); 905 int (*cat_kce_flush)(void *dev, const struct cat_func_s *cat, int km_if_idx, int index, 906 int cnt); 907 int (*cat_kcs_flush)(void *dev, const struct cat_func_s *cat, int km_if_idx, int cat_func, 908 int cnt); 909 int (*cat_fte_flush)(void *dev, const struct cat_func_s *cat, int km_if_idx, int index, 910 int cnt); 911 int (*cat_cte_flush)(void *dev, const struct cat_func_s *cat, int cat_func, int cnt); 912 int (*cat_cts_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 913 int (*cat_cot_flush)(void *dev, const struct cat_func_s *cat, int cat_func, int cnt); 914 int (*cat_cct_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 915 int (*cat_exo_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 916 int (*cat_rck_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 917 int (*cat_len_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 918 int (*cat_kcc_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 919 920 /* KM */ 921 bool (*get_km_present)(void *dev); 922 uint32_t (*get_km_version)(void *dev); 923 int (*km_rcp_flush)(void *dev, const struct km_func_s *km, int category, int cnt); 924 int (*km_cam_flush)(void *dev, const struct km_func_s *km, int bank, int record, int cnt); 925 int (*km_tcam_flush)(void *dev, const struct km_func_s *km, int bank, int byte, int value, 926 int cnt); 927 int (*km_tci_flush)(void *dev, const struct km_func_s *km, int bank, int record, int cnt); 928 int (*km_tcq_flush)(void *dev, const struct km_func_s *km, int bank, int record, int cnt); 929 930 /* FLM */ 931 bool (*get_flm_present)(void *dev); 932 uint32_t (*get_flm_version)(void *dev); 933 int (*flm_control_flush)(void *dev, const struct flm_func_s *flm); 934 int (*flm_status_flush)(void *dev, const struct flm_func_s *flm); 935 int (*flm_status_update)(void *dev, const struct flm_func_s *flm); 936 int (*flm_scan_flush)(void *dev, const struct flm_func_s *flm); 937 int (*flm_load_bin_flush)(void *dev, const struct flm_func_s *flm); 938 int (*flm_prio_flush)(void *dev, const struct flm_func_s *flm); 939 int (*flm_pst_flush)(void *dev, const struct flm_func_s *flm, int index, int cnt); 940 int (*flm_rcp_flush)(void *dev, const struct flm_func_s *flm, int index, int cnt); 941 int (*flm_scrub_flush)(void *dev, const struct flm_func_s *flm, int index, int cnt); 942 int (*flm_buf_ctrl_update)(void *dev, const struct flm_func_s *flm); 943 int (*flm_stat_update)(void *dev, const struct flm_func_s *flm); 944 int (*flm_lrn_data_flush)(void *be_dev, const struct flm_func_s *flm, 945 const uint32_t *lrn_data, uint32_t records, 946 uint32_t *handled_records, uint32_t words_per_record, 947 uint32_t *inf_word_cnt, uint32_t *sta_word_cnt); 948 int (*flm_inf_sta_data_update)(void *be_dev, const struct flm_func_s *flm, 949 uint32_t *inf_data, uint32_t inf_size, 950 uint32_t *inf_word_cnt, uint32_t *sta_data, 951 uint32_t sta_size, uint32_t *sta_word_cnt); 952 953 /* HSH */ 954 bool (*get_hsh_present)(void *dev); 955 uint32_t (*get_hsh_version)(void *dev); 956 int (*hsh_rcp_flush)(void *dev, const struct hsh_func_s *hsh, int category, int cnt); 957 958 /* QSL */ 959 bool (*get_qsl_present)(void *dev); 960 uint32_t (*get_qsl_version)(void *dev); 961 int (*qsl_rcp_flush)(void *dev, const struct qsl_func_s *qsl, int category, int cnt); 962 int (*qsl_qst_flush)(void *dev, const struct qsl_func_s *qsl, int entry, int cnt); 963 int (*qsl_qen_flush)(void *dev, const struct qsl_func_s *qsl, int entry, int cnt); 964 int (*qsl_unmq_flush)(void *dev, const struct qsl_func_s *qsl, int entry, int cnt); 965 966 /* SLC LR */ 967 bool (*get_slc_lr_present)(void *dev); 968 uint32_t (*get_slc_lr_version)(void *dev); 969 int (*slc_lr_rcp_flush)(void *dev, const struct slc_lr_func_s *slc_lr, int category, 970 int cnt); 971 972 /* PDB */ 973 bool (*get_pdb_present)(void *dev); 974 uint32_t (*get_pdb_version)(void *dev); 975 int (*pdb_rcp_flush)(void *dev, const struct pdb_func_s *pdb, int category, int cnt); 976 int (*pdb_config_flush)(void *dev, const struct pdb_func_s *pdb); 977 978 /* TPE */ 979 bool (*get_tpe_present)(void *dev); 980 uint32_t (*get_tpe_version)(void *dev); 981 int (*tpe_rpp_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 982 int (*tpe_rpp_ifr_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 983 int (*tpe_ifr_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 984 int (*tpe_ins_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 985 int (*tpe_rpl_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 986 int (*tpe_rpl_ext_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 987 int (*tpe_rpl_rpl_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 988 int (*tpe_cpy_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 989 int (*tpe_hfu_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 990 int (*tpe_csu_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 991 }; 992 993 struct flow_api_backend_s { 994 void *be_dev; 995 const struct flow_api_backend_ops *iface; 996 997 /* flow filter FPGA modules */ 998 struct cat_func_s cat; 999 struct km_func_s km; 1000 struct flm_func_s flm; 1001 struct hsh_func_s hsh; 1002 struct qsl_func_s qsl; 1003 struct slc_lr_func_s slc_lr; 1004 struct pdb_func_s pdb; 1005 struct tpe_func_s tpe; 1006 1007 /* NIC attributes */ 1008 unsigned int num_phy_ports; 1009 unsigned int num_rx_ports; 1010 1011 /* flow filter resource capacities */ 1012 unsigned int max_categories; 1013 unsigned int max_queues; 1014 }; 1015 1016 int flow_api_backend_init(struct flow_api_backend_s *dev, const struct flow_api_backend_ops *iface, 1017 void *be_dev); 1018 int flow_api_backend_done(struct flow_api_backend_s *dev); 1019 1020 #endif /* _HW_MOD_BACKEND_H_ */ 1021