History log of /dpdk/drivers/net/ntnic/include/hw_mod_backend.h (Results 1 – 25 of 42)
Revision Date Author Comments
# 6019656d 30-Oct-2024 Oleksandr Kolomeiets <okl-plv@napatech.com>

net/ntnic: add MTU configuration

Add supporting API rte_eth_dev_set_mtu

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>


# c0d44442 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow aging event

Port thread was extended with new age event callback handler.
LRN, INF, STA registers getter setter was added.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com

net/ntnic: add flow aging event

Port thread was extended with new age event callback handler.
LRN, INF, STA registers getter setter was added.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# e7e49ce6 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow statistics

xstats was extended with flow statistics support.

Additional counters that shows learn, unlearn, lps, aps and other.

Signed-off-by: Danylo Vodopianov <dvo-plv@napate

net/ntnic: add flow statistics

xstats was extended with flow statistics support.

Additional counters that shows learn, unlearn, lps, aps and other.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# 96c8249b 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: learn flow queue handling

Implements thread for handling flow learn queue

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>


# 866d8d06 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add FLM RCP module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions

net/ntnic: add FLM RCP module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions of flows.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# deda5e0f 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add FLM module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions of

net/ntnic: add FLM module

The Flow Matcher module is a high-performance stateful SDRAM lookup and
programming engine which supported exact match lookup in line-rate of up
to hundreds of millions of flows.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...


# 0b98e4c1 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add TPE module

The TX Packet Editor is a software abstraction module, that keeps track
of the handful of FPGA modules
that are used to edit packets in the TX pipeline.

Signed-off-by: Dan

net/ntnic: add TPE module

The TX Packet Editor is a software abstraction module, that keeps track
of the handful of FPGA modules
that are used to edit packets in the TX pipeline.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...


# 7fa0bf29 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add hash module

The Hasher module calculates a configurable hash value to be used
internally by the FPGA.
The module support both Toeplitz and NT-hash.

Signed-off-by: Danylo Vodopianov <

net/ntnic: add hash module

The Hasher module calculates a configurable hash value to be used
internally by the FPGA.
The module support both Toeplitz and NT-hash.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# 9bd46cf2 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add KM module

The Key Matcher module checks the values of individual fields of a
packet.
It supports both exact match which is implemented with a CAM, and
wildcards which is implemented w

net/ntnic: add KM module

The Key Matcher module checks the values of individual fields of a
packet.
It supports both exact match which is implemented with a CAM, and
wildcards which is implemented with a TCAM.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# 98e40f83 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add QSL module

The Queue Selector module directs packets to a given destination which
includes host queues, physical ports, exceptions paths, and discard.

Signed-off-by: Danylo Vodopiano

net/ntnic: add QSL module

The Queue Selector module directs packets to a given destination which
includes host queues, physical ports, exceptions paths, and discard.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# ef6e148b 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add PDB module

The Packet Description Builder module creates packet meta-data for
example virtio-net headers.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Ili

net/ntnic: add PDB module

The Packet Description Builder module creates packet meta-data for
example virtio-net headers.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...


# c4d1272b 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add SLC LR module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is configured to add

net/ntnic: add SLC LR module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is configured to add a new head in the
packet.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# 833962eb 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add CAT module

The Categorizer module’s main purpose is to is select the behavior
of other modules in the FPGA pipeline depending on a protocol check.

Signed-off-by: Danylo Vodopianov <d

net/ntnic: add CAT module

The Categorizer module’s main purpose is to is select the behavior
of other modules in the FPGA pipeline depending on a protocol check.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# c6821abf 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow items GTP and actions raw encap/decap

Add possibility to use
* RTE_FLOW_ITEM_TYPE_GTP
* RTE_FLOW_ITEM_TYPE_GTP_PSC
* RTE_FLOW_ACTION_TYPE_RAW_ENCAP
* RTE_FLOW_ACTION_TYPE_RAW_DEC

net/ntnic: add flow items GTP and actions raw encap/decap

Add possibility to use
* RTE_FLOW_ITEM_TYPE_GTP
* RTE_FLOW_ITEM_TYPE_GTP_PSC
* RTE_FLOW_ACTION_TYPE_RAW_ENCAP
* RTE_FLOW_ACTION_TYPE_RAW_DECAP

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# 339ca124 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow action modify field

Add possibility to use RTE_FLOW_ACTION_TYPE_MODIFY_FIELD.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech

net/ntnic: add flow action modify field

Add possibility to use RTE_FLOW_ACTION_TYPE_MODIFY_FIELD.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# b199509a 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow items IPv6 and ICMPv6

Add possibility to use
* RTE_FLOW_ITEM_TYPE_IPV6
* RTE_FLOW_ITEM_TYPE_ICMP6

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliush

net/ntnic: add flow items IPv6 and ICMPv6

Add possibility to use
* RTE_FLOW_ITEM_TYPE_IPV6
* RTE_FLOW_ITEM_TYPE_ICMP6

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

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# af7ae7aa 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow item SCTP

Add possibility to use RTE_FLOW_ITEM_TYPE_SCTP.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>


# 56232827 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow action VLAN

Add possibility to use RTE_FLOW_ITEM_TYPE_VLAN.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>


# a8fbe919 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow action TCP

Add possibility to use RTE_FLOW_ITEM_TYPE_TCP.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>


# e872a0c9 30-Oct-2024 Danylo Vodopianov <dvo-plv@napatech.com>

net/ntnic: add flow item UDP

Add possibility to use RTE_FLOW_ITEM_TYPE_UDP.

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>


# 29584e9d 30-Oct-2024 Serhii Iliushyk <sil-plv@napatech.com>

net/ntnic: add flow item eth

Add possibility to use RTE_FLOW_ITEM_TYPE_ETH.

Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>


# 6fec9a9a 30-Oct-2024 Serhii Iliushyk <sil-plv@napatech.com>

net/ntnic: add infrastructure for flow actions and items

Add entities(utilities, structures, etc) required for flow support

Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>


# 4d4e9018 10-Oct-2024 Oleksandr Kolomeiets <okl-plv@napatech.com>

net/ntnic: add Tx Packet Editor (TPE) FPGA module

The TX Packet Editor is a software abstraction module,
that keeps track of the handful of FPGA modules
that are used to edit packets in the TX pipel

net/ntnic: add Tx Packet Editor (TPE) FPGA module

The TX Packet Editor is a software abstraction module,
that keeps track of the handful of FPGA modules
that are used to edit packets in the TX pipeline.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...


# 87ad2151 10-Oct-2024 Oleksandr Kolomeiets <okl-plv@napatech.com>

net/ntnic: add packet descriptor builder (PDB) FPGA module

The Packet Description Builder module creates packet meta-data
for example virtio-net headers.

Signed-off-by: Oleksandr Kolomeiets <okl-pl

net/ntnic: add packet descriptor builder (PDB) FPGA module

The Packet Description Builder module creates packet meta-data
for example virtio-net headers.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...


# 7fadd2ba 10-Oct-2024 Oleksandr Kolomeiets <okl-plv@napatech.com>

net/ntnic: add slicer (SLC LR) FPGA module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is con

net/ntnic: add slicer (SLC LR) FPGA module

The Slicer for Local Retransmit module can cut of the head a packet
before the packet leaves the FPGA RX pipeline.
This is used when the TX pipeline is configured
to add a new head in the packet.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
Acked-by: Serhii Iliushyk <sil-plv@napatech.com>

show more ...


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