1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2023 Napatech A/S 4 */ 5 6 #ifndef _HW_MOD_BACKEND_H_ 7 #define _HW_MOD_BACKEND_H_ 8 9 #include <stdbool.h> 10 #include <string.h> 11 12 #include "ntlog.h" 13 14 #include "hw_mod_cat_v18.h" 15 #include "hw_mod_cat_v21.h" 16 #include "hw_mod_flm_v25.h" 17 #include "hw_mod_km_v7.h" 18 #include "hw_mod_qsl_v7.h" 19 #include "hw_mod_pdb_v9.h" 20 #include "hw_mod_slc_lr_v2.h" 21 #include "hw_mod_hsh_v5.h" 22 #include "hw_mod_tpe_v3.h" 23 24 #define MAX_PHYS_ADAPTERS 8 25 26 #define VER_MAJOR(ver) (((ver) >> 16) & 0xffff) 27 #define VER_MINOR(ver) ((ver) & 0xffff) 28 29 struct flow_api_backend_s; 30 struct common_func_s; 31 32 void *callocate_mod(struct common_func_s *mod, int sets, ...); 33 void zero_module_cache(struct common_func_s *mod); 34 35 #define ALL_ENTRIES -1000 36 #define ALL_BANK_ENTRIES -1001 37 38 #define INDEX_TOO_LARGE (-2) 39 #define INDEX_TOO_LARGE_LOG NT_LOG(INF, FILTER, "ERROR:%s: Index too large", __func__) 40 41 #define WORD_OFF_TOO_LARGE (-3) 42 #define WORD_OFF_TOO_LARGE_LOG NT_LOG(INF, FILTER, "ERROR:%s: Word offset too large", __func__) 43 44 #define UNSUP_FIELD (-5) 45 #define UNSUP_FIELD_LOG \ 46 NT_LOG(INF, FILTER, "ERROR:%s: Unsupported field in NIC module", __func__) 47 48 #define UNSUP_VER (-4) 49 #define UNSUP_VER_LOG \ 50 NT_LOG(INF, FILTER, "ERROR:%s: Unsupported NIC module: %s ver %i.%i", __func__, _MOD_, \ 51 VER_MAJOR(_VER_), VER_MINOR(_VER_)) 52 53 #define COUNT_ERROR (-4) 54 #define COUNT_ERROR_LOG(_RESOURCE_) \ 55 NT_LOG(INF, FILTER, \ 56 "ERROR:%s: Insufficient resource [ %s ] : NIC module: %s ver %i.%i", __func__, \ 57 #_RESOURCE_, _MOD_, VER_MAJOR(_VER_), VER_MINOR(_VER_)) \ 58 59 #define NOT_FOUND 0xffffffff 60 61 enum { 62 EXTRA_INDEXES 63 }; 64 65 #define GET(cached_val, val) ({ *(val) = *(cached_val); }) 66 67 #define SET(cached_val, val) ({ *(cached_val) = *(val); }) 68 69 #define GET_SET(cached_val, val) \ 70 do { \ 71 uint32_t *temp_val = (val); \ 72 typeof(cached_val) *temp_cached_val = &(cached_val); \ 73 if (get) \ 74 GET(temp_cached_val, temp_val); \ 75 else \ 76 SET(temp_cached_val, temp_val); \ 77 } while (0) 78 79 #define GET_SIGNED(cached_val, val) ({ *(val) = (uint32_t)(*(cached_val)); }) 80 81 #define SET_SIGNED(cached_val, val) ({ *(cached_val) = (int32_t)(*(val)); }) 82 83 #define GET_SET_SIGNED(cached_val, val) \ 84 do { \ 85 uint32_t *temp_val = (val); \ 86 typeof(cached_val) *temp_cached_val = &(cached_val); \ 87 if (get) \ 88 GET_SIGNED(temp_cached_val, temp_val); \ 89 else \ 90 SET_SIGNED(temp_cached_val, temp_val); \ 91 } while (0) 92 93 #define FIND_EQUAL_INDEX(be_module_reg, type, idx, start, nb_elements) \ 94 do { \ 95 typeof(be_module_reg) *temp_be_module = \ 96 (typeof(be_module_reg) *)be_module_reg; \ 97 typeof(idx) tmp_idx = (idx); \ 98 typeof(nb_elements) tmp_nb_elements = (nb_elements); \ 99 unsigned int start_idx = (unsigned int)(start); \ 100 *value = NOT_FOUND; \ 101 for (unsigned int i = start_idx; i < tmp_nb_elements; i++) { \ 102 if ((unsigned int)(tmp_idx) == i) \ 103 continue; \ 104 if (memcmp(&temp_be_module[tmp_idx], &temp_be_module[i], sizeof(type)) == \ 105 0) { \ 106 *value = i; \ 107 break; \ 108 } \ 109 } \ 110 } while (0) 111 112 #define DO_COMPARE_INDEXS(be_module_reg, type, idx, cmp_idx) \ 113 do { \ 114 typeof(be_module_reg) *temp_be_module = &(be_module_reg); \ 115 typeof(idx) tmp_idx = (idx); \ 116 typeof(cmp_idx) tmp_cmp_idx = (cmp_idx); \ 117 if ((unsigned int)(tmp_idx) != (unsigned int)(tmp_cmp_idx)) { \ 118 (void)memcmp(temp_be_module + tmp_idx, &temp_be_module[tmp_cmp_idx], \ 119 sizeof(type)); \ 120 } \ 121 } while (0) 122 123 static inline int is_non_zero(const void *addr, size_t n) 124 { 125 size_t i = 0; 126 const uint8_t *p = (const uint8_t *)addr; 127 128 for (i = 0; i < n; i++) 129 if (p[i] != 0) 130 return 1; 131 132 return 0; 133 } 134 135 /* Sideband info bit indicator */ 136 #define SWX_INFO (1 << 6) 137 138 enum km_flm_if_select_e { 139 KM_FLM_IF_FIRST = 0, 140 KM_FLM_IF_SECOND = 1 141 }; 142 143 #define FIELD_START_INDEX 100 144 145 #define COMMON_FUNC_INFO_S \ 146 int ver; \ 147 void *base; \ 148 unsigned int alloced_size; \ 149 int debug 150 151 enum frame_offs_e { 152 DYN_SOF = 0, 153 DYN_L2 = 1, 154 DYN_FIRST_VLAN = 2, 155 DYN_MPLS = 3, 156 DYN_L3 = 4, 157 DYN_ID_IPV4_6 = 5, 158 DYN_FINAL_IP_DST = 6, 159 DYN_L4 = 7, 160 DYN_L4_PAYLOAD = 8, 161 DYN_TUN_PAYLOAD = 9, 162 DYN_TUN_L2 = 10, 163 DYN_TUN_VLAN = 11, 164 DYN_TUN_MPLS = 12, 165 DYN_TUN_L3 = 13, 166 DYN_TUN_ID_IPV4_6 = 14, 167 DYN_TUN_FINAL_IP_DST = 15, 168 DYN_TUN_L4 = 16, 169 DYN_TUN_L4_PAYLOAD = 17, 170 DYN_EOF = 18, 171 DYN_L3_PAYLOAD_END = 19, 172 DYN_TUN_L3_PAYLOAD_END = 20, 173 SB_VNI = SWX_INFO | 1, 174 SB_MAC_PORT = SWX_INFO | 2, 175 SB_KCC_ID = SWX_INFO | 3 176 }; 177 178 enum { 179 QW0_SEL_EXCLUDE = 0, 180 QW0_SEL_FIRST32 = 1, 181 QW0_SEL_FIRST64 = 3, 182 QW0_SEL_ALL128 = 4, 183 }; 184 185 enum { 186 QW4_SEL_EXCLUDE = 0, 187 QW4_SEL_FIRST32 = 1, 188 QW4_SEL_FIRST64 = 2, 189 QW4_SEL_ALL128 = 3, 190 }; 191 192 enum { 193 DW8_SEL_EXCLUDE = 0, 194 DW8_SEL_FIRST32 = 3, 195 }; 196 197 enum { 198 DW10_SEL_EXCLUDE = 0, 199 DW10_SEL_FIRST32 = 2, 200 }; 201 202 enum { 203 SWX_SEL_EXCLUDE = 0, 204 SWX_SEL_ALL32 = 1, 205 }; 206 207 enum { 208 PROT_OTHER = 0, 209 PROT_L2_ETH2 = 1, 210 }; 211 212 enum { 213 PROT_L3_IPV4 = 1, 214 PROT_L3_IPV6 = 2 215 }; 216 217 enum { 218 PROT_L4_TCP = 1, 219 PROT_L4_UDP = 2, 220 PROT_L4_SCTP = 3, 221 PROT_L4_ICMP = 4 222 }; 223 224 enum { 225 PROT_TUN_GTPV1U = 6, 226 }; 227 228 enum { 229 PROT_TUN_L3_OTHER = 0, 230 PROT_TUN_L3_IPV4 = 1, 231 PROT_TUN_L3_IPV6 = 2 232 }; 233 234 enum { 235 PROT_TUN_L4_OTHER = 0, 236 PROT_TUN_L4_TCP = 1, 237 PROT_TUN_L4_UDP = 2, 238 PROT_TUN_L4_SCTP = 3, 239 PROT_TUN_L4_ICMP = 4 240 }; 241 242 243 enum { 244 HASH_HASH_NONE = 0, 245 HASH_5TUPLE = 8, 246 }; 247 248 enum { 249 CPY_SELECT_DSCP_IPV4 = 0, 250 CPY_SELECT_DSCP_IPV6 = 1, 251 CPY_SELECT_RQI_QFI = 2, 252 CPY_SELECT_IPV4 = 3, 253 CPY_SELECT_PORT = 4, 254 CPY_SELECT_TEID = 5, 255 }; 256 257 struct common_func_s { 258 COMMON_FUNC_INFO_S; 259 }; 260 261 struct cat_func_s { 262 COMMON_FUNC_INFO_S; 263 uint32_t nb_cat_funcs; 264 uint32_t nb_flow_types; 265 uint32_t nb_pm_ext; 266 uint32_t nb_len; 267 uint32_t kcc_size; 268 uint32_t cts_num; 269 uint32_t kcc_banks; 270 uint32_t kcc_id_bit_size; 271 uint32_t kcc_records; 272 uint32_t km_if_count; 273 int32_t km_if_m0; 274 int32_t km_if_m1; 275 276 union { 277 struct hw_mod_cat_v18_s v18; 278 struct hw_mod_cat_v21_s v21; 279 }; 280 }; 281 enum hw_cat_e { 282 /* 283 * functions initial CAT v18 284 */ 285 /* 00 */ HW_CAT_CFN_SET_ALL_DEFAULTS = 0, 286 /* 01 */ HW_CAT_CFN_PRESET_ALL, 287 /* 02 */ HW_CAT_CFN_COMPARE, 288 /* 03 */ HW_CAT_CFN_FIND, 289 /* 04 */ HW_CAT_CFN_COPY_FROM, 290 /* 05 */ HW_CAT_COT_PRESET_ALL, 291 /* 06 */ HW_CAT_COT_COMPARE, 292 /* 07 */ HW_CAT_COT_FIND, 293 /* 08 */ HW_CAT_COT_COPY_FROM, 294 /* fields */ 295 /* 00 */ HW_CAT_CFN_ENABLE = FIELD_START_INDEX, 296 /* 01 */ HW_CAT_CFN_INV, 297 /* 02 */ HW_CAT_CFN_PTC_INV, 298 /* 03 */ HW_CAT_CFN_PTC_ISL, 299 /* 04 */ HW_CAT_CFN_PTC_CFP, 300 /* 05 */ HW_CAT_CFN_PTC_MAC, 301 /* 06 */ HW_CAT_CFN_PTC_L2, 302 /* 07 */ HW_CAT_CFN_PTC_VNTAG, 303 /* 08 */ HW_CAT_CFN_PTC_VLAN, 304 /* 09 */ HW_CAT_CFN_PTC_MPLS, 305 /* 10 */ HW_CAT_CFN_PTC_L3, 306 /* 11 */ HW_CAT_CFN_PTC_FRAG, 307 /* 12 */ HW_CAT_CFN_PTC_IP_PROT, 308 /* 13 */ HW_CAT_CFN_PTC_L4, 309 /* 14 */ HW_CAT_CFN_PTC_TUNNEL, 310 /* 15 */ HW_CAT_CFN_PTC_TNL_L2, 311 /* 16 */ HW_CAT_CFN_PTC_TNL_VLAN, 312 /* 17 */ HW_CAT_CFN_PTC_TNL_MPLS, 313 /* 18 */ HW_CAT_CFN_PTC_TNL_L3, 314 /* 19 */ HW_CAT_CFN_PTC_TNL_FRAG, 315 /* 20 */ HW_CAT_CFN_PTC_TNL_IP_PROT, 316 /* 21 */ HW_CAT_CFN_PTC_TNL_L4, 317 /* 22 */ HW_CAT_CFN_ERR_INV, 318 /* 23 */ HW_CAT_CFN_ERR_CV, 319 /* 24 */ HW_CAT_CFN_ERR_FCS, 320 /* 25 */ HW_CAT_CFN_ERR_TRUNC, 321 /* 26 */ HW_CAT_CFN_ERR_L3_CS, 322 /* 27 */ HW_CAT_CFN_ERR_L4_CS, 323 /* 28 */ HW_CAT_CFN_MAC_PORT, 324 /* 29 */ HW_CAT_CFN_PM_CMP, 325 /* 30 */ HW_CAT_CFN_PM_DCT, 326 /* 31 */ HW_CAT_CFN_PM_EXT_INV, 327 /* 32 */ HW_CAT_CFN_PM_CMB, 328 /* 33 */ HW_CAT_CFN_PM_AND_INV, 329 /* 34 */ HW_CAT_CFN_PM_OR_INV, 330 /* 35 */ HW_CAT_CFN_PM_INV, 331 /* 36 */ HW_CAT_CFN_LC, 332 /* 37 */ HW_CAT_CFN_LC_INV, 333 /* 38 */ HW_CAT_CFN_KM0_OR, 334 /* 39 */ HW_CAT_CFN_KM1_OR, 335 /* 40 */ HW_CAT_KCE_ENABLE_BM, 336 /* 41 */ HW_CAT_KCS_CATEGORY, 337 /* 42 */ HW_CAT_FTE_ENABLE_BM, 338 /* 43 */ HW_CAT_CTE_ENABLE_BM, 339 /* 44 */ HW_CAT_CTS_CAT_A, 340 /* 45 */ HW_CAT_CTS_CAT_B, 341 /* 46 */ HW_CAT_COT_COLOR, 342 /* 47 */ HW_CAT_COT_KM, 343 /* 48 */ HW_CAT_CCT_COLOR, 344 /* 49 */ HW_CAT_CCT_KM, 345 /* 50 */ HW_CAT_KCC_KEY, 346 /* 51 */ HW_CAT_KCC_CATEGORY, 347 /* 52 */ HW_CAT_KCC_ID, 348 /* 53 */ HW_CAT_EXO_DYN, 349 /* 54 */ HW_CAT_EXO_OFS, 350 /* 55 */ HW_CAT_RCK_DATA, 351 /* 56 */ HW_CAT_LEN_LOWER, 352 /* 57 */ HW_CAT_LEN_UPPER, 353 /* 58 */ HW_CAT_LEN_DYN1, 354 /* 59 */ HW_CAT_LEN_DYN2, 355 /* 60 */ HW_CAT_LEN_INV, 356 /* 61 */ HW_CAT_CFN_ERR_TNL_L3_CS, 357 /* 62 */ HW_CAT_CFN_ERR_TNL_L4_CS, 358 /* 63 */ HW_CAT_CFN_ERR_TTL_EXP, 359 /* 64 */ HW_CAT_CFN_ERR_TNL_TTL_EXP, 360 }; 361 362 bool hw_mod_cat_present(struct flow_api_backend_s *be); 363 int hw_mod_cat_alloc(struct flow_api_backend_s *be); 364 void hw_mod_cat_free(struct flow_api_backend_s *be); 365 int hw_mod_cat_reset(struct flow_api_backend_s *be); 366 int hw_mod_cat_cfn_flush(struct flow_api_backend_s *be, int start_idx, int count); 367 int hw_mod_cat_cfn_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, int word_off, 368 uint32_t value); 369 /* KCE/KCS/FTE KM */ 370 int hw_mod_cat_kce_km_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 371 int start_idx, int count); 372 int hw_mod_cat_kce_km_set(struct flow_api_backend_s *be, enum hw_cat_e field, 373 enum km_flm_if_select_e if_num, int index, uint32_t value); 374 int hw_mod_cat_kce_km_get(struct flow_api_backend_s *be, enum hw_cat_e field, 375 enum km_flm_if_select_e if_num, int index, uint32_t *value); 376 int hw_mod_cat_kcs_km_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 377 int start_idx, int count); 378 int hw_mod_cat_kcs_km_set(struct flow_api_backend_s *be, enum hw_cat_e field, 379 enum km_flm_if_select_e if_num, int index, uint32_t value); 380 int hw_mod_cat_kcs_km_get(struct flow_api_backend_s *be, enum hw_cat_e field, 381 enum km_flm_if_select_e if_num, int index, uint32_t *value); 382 int hw_mod_cat_fte_km_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 383 int start_idx, int count); 384 int hw_mod_cat_fte_km_set(struct flow_api_backend_s *be, enum hw_cat_e field, 385 enum km_flm_if_select_e if_num, int index, uint32_t value); 386 int hw_mod_cat_fte_km_get(struct flow_api_backend_s *be, enum hw_cat_e field, 387 enum km_flm_if_select_e if_num, int index, uint32_t *value); 388 /* KCE/KCS/FTE FLM */ 389 int hw_mod_cat_kce_flm_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 390 int start_idx, int count); 391 int hw_mod_cat_kce_flm_set(struct flow_api_backend_s *be, enum hw_cat_e field, 392 enum km_flm_if_select_e if_num, int index, uint32_t value); 393 int hw_mod_cat_kce_flm_get(struct flow_api_backend_s *be, enum hw_cat_e field, 394 enum km_flm_if_select_e if_num, int index, uint32_t *value); 395 int hw_mod_cat_kcs_flm_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 396 int start_idx, int count); 397 int hw_mod_cat_kcs_flm_set(struct flow_api_backend_s *be, enum hw_cat_e field, 398 enum km_flm_if_select_e if_num, int index, uint32_t value); 399 int hw_mod_cat_kcs_flm_get(struct flow_api_backend_s *be, enum hw_cat_e field, 400 enum km_flm_if_select_e if_num, int index, uint32_t *value); 401 int hw_mod_cat_fte_flm_flush(struct flow_api_backend_s *be, enum km_flm_if_select_e if_num, 402 int start_idx, int count); 403 int hw_mod_cat_fte_flm_set(struct flow_api_backend_s *be, enum hw_cat_e field, 404 enum km_flm_if_select_e if_num, int index, uint32_t value); 405 int hw_mod_cat_fte_flm_get(struct flow_api_backend_s *be, enum hw_cat_e field, 406 enum km_flm_if_select_e if_num, int index, uint32_t *value); 407 408 int hw_mod_cat_cte_flush(struct flow_api_backend_s *be, int start_idx, int count); 409 int hw_mod_cat_cte_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 410 uint32_t value); 411 int hw_mod_cat_cte_get(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 412 uint32_t *value); 413 414 int hw_mod_cat_cts_flush(struct flow_api_backend_s *be, int start_idx, int count); 415 int hw_mod_cat_cts_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 416 uint32_t value); 417 int hw_mod_cat_cts_get(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 418 uint32_t *value); 419 420 int hw_mod_cat_cot_flush(struct flow_api_backend_s *be, int start_idx, int count); 421 int hw_mod_cat_cot_set(struct flow_api_backend_s *be, enum hw_cat_e field, int index, 422 uint32_t value); 423 424 int hw_mod_cat_cct_flush(struct flow_api_backend_s *be, int start_idx, int count); 425 426 int hw_mod_cat_kcc_flush(struct flow_api_backend_s *be, int start_idx, int count); 427 428 int hw_mod_cat_exo_flush(struct flow_api_backend_s *be, int start_idx, int count); 429 int hw_mod_cat_rck_flush(struct flow_api_backend_s *be, int start_idx, int count); 430 int hw_mod_cat_len_flush(struct flow_api_backend_s *be, int start_idx, int count); 431 432 struct km_func_s { 433 COMMON_FUNC_INFO_S; 434 uint32_t nb_categories; 435 uint32_t nb_cam_banks; 436 uint32_t nb_cam_record_words; 437 uint32_t nb_cam_records; 438 uint32_t nb_tcam_banks; 439 uint32_t nb_tcam_bank_width; 440 /* not read from backend, but rather set using version */ 441 uint32_t nb_km_rcp_mask_a_word_size; 442 /* --- || --- */ 443 uint32_t nb_km_rcp_mask_b_word_size; 444 union { 445 struct hw_mod_km_v7_s v7; 446 }; 447 }; 448 enum hw_km_e { 449 /* functions */ 450 HW_KM_RCP_PRESET_ALL = 0, 451 HW_KM_CAM_PRESET_ALL, 452 /* to sync and reset hw with cache - force write all entries in a bank */ 453 HW_KM_TCAM_BANK_RESET, 454 /* fields */ 455 HW_KM_RCP_QW0_DYN = FIELD_START_INDEX, 456 HW_KM_RCP_QW0_OFS, 457 HW_KM_RCP_QW0_SEL_A, 458 HW_KM_RCP_QW0_SEL_B, 459 HW_KM_RCP_QW4_DYN, 460 HW_KM_RCP_QW4_OFS, 461 HW_KM_RCP_QW4_SEL_A, 462 HW_KM_RCP_QW4_SEL_B, 463 HW_KM_RCP_DW8_DYN, 464 HW_KM_RCP_DW8_OFS, 465 HW_KM_RCP_DW8_SEL_A, 466 HW_KM_RCP_DW8_SEL_B, 467 HW_KM_RCP_DW10_DYN, 468 HW_KM_RCP_DW10_OFS, 469 HW_KM_RCP_DW10_SEL_A, 470 HW_KM_RCP_DW10_SEL_B, 471 HW_KM_RCP_SWX_CCH, 472 HW_KM_RCP_SWX_SEL_A, 473 HW_KM_RCP_SWX_SEL_B, 474 HW_KM_RCP_MASK_A, 475 HW_KM_RCP_MASK_B, 476 HW_KM_RCP_DUAL, 477 HW_KM_RCP_PAIRED, 478 HW_KM_RCP_EL_A, 479 HW_KM_RCP_EL_B, 480 HW_KM_RCP_INFO_A, 481 HW_KM_RCP_INFO_B, 482 HW_KM_RCP_FTM_A, 483 HW_KM_RCP_FTM_B, 484 HW_KM_RCP_BANK_A, 485 HW_KM_RCP_BANK_B, 486 HW_KM_RCP_KL_A, 487 HW_KM_RCP_KL_B, 488 HW_KM_RCP_KEYWAY_A, 489 HW_KM_RCP_KEYWAY_B, 490 HW_KM_RCP_SYNERGY_MODE, 491 HW_KM_RCP_DW0_B_DYN, 492 HW_KM_RCP_DW0_B_OFS, 493 HW_KM_RCP_DW2_B_DYN, 494 HW_KM_RCP_DW2_B_OFS, 495 HW_KM_RCP_SW4_B_DYN, 496 HW_KM_RCP_SW4_B_OFS, 497 HW_KM_RCP_SW5_B_DYN, 498 HW_KM_RCP_SW5_B_OFS, 499 HW_KM_CAM_W0, 500 HW_KM_CAM_W1, 501 HW_KM_CAM_W2, 502 HW_KM_CAM_W3, 503 HW_KM_CAM_W4, 504 HW_KM_CAM_W5, 505 HW_KM_CAM_FT0, 506 HW_KM_CAM_FT1, 507 HW_KM_CAM_FT2, 508 HW_KM_CAM_FT3, 509 HW_KM_CAM_FT4, 510 HW_KM_CAM_FT5, 511 HW_KM_TCAM_T, 512 HW_KM_TCI_COLOR, 513 HW_KM_TCI_FT, 514 HW_KM_TCQ_BANK_MASK, 515 HW_KM_TCQ_QUAL 516 }; 517 bool hw_mod_km_present(struct flow_api_backend_s *be); 518 int hw_mod_km_alloc(struct flow_api_backend_s *be); 519 void hw_mod_km_free(struct flow_api_backend_s *be); 520 int hw_mod_km_reset(struct flow_api_backend_s *be); 521 int hw_mod_km_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 522 int hw_mod_km_rcp_set(struct flow_api_backend_s *be, enum hw_km_e field, int index, int word_off, 523 uint32_t value); 524 int hw_mod_km_rcp_get(struct flow_api_backend_s *be, enum hw_km_e field, int index, int word_off, 525 uint32_t *value); 526 int hw_mod_km_cam_flush(struct flow_api_backend_s *be, int start_bank, int start_record, 527 int count); 528 int hw_mod_km_cam_set(struct flow_api_backend_s *be, enum hw_km_e field, int bank, int record, 529 uint32_t value); 530 531 int hw_mod_km_tcam_flush(struct flow_api_backend_s *be, int start_bank, int count); 532 int hw_mod_km_tcam_set(struct flow_api_backend_s *be, enum hw_km_e field, int bank, int byte, 533 int byte_val, uint32_t *value_set); 534 int hw_mod_km_tcam_get(struct flow_api_backend_s *be, enum hw_km_e field, int bank, int byte, 535 int byte_val, uint32_t *value_set); 536 int hw_mod_km_tci_flush(struct flow_api_backend_s *be, int start_bank, int start_record, 537 int count); 538 int hw_mod_km_tci_set(struct flow_api_backend_s *be, enum hw_km_e field, int bank, int record, 539 uint32_t value); 540 int hw_mod_km_tcq_flush(struct flow_api_backend_s *be, int start_bank, int start_record, 541 int count); 542 543 struct flm_func_s { 544 COMMON_FUNC_INFO_S; 545 uint32_t nb_categories; 546 uint32_t nb_size_mb; 547 uint32_t nb_entry_size; 548 uint32_t nb_variant; 549 uint32_t nb_prios; 550 uint32_t nb_pst_profiles; 551 uint32_t nb_scrub_profiles; 552 uint32_t nb_rpp_clock_in_ps; 553 uint32_t nb_load_aps_max; 554 union { 555 struct hw_mod_flm_v25_s v25; 556 }; 557 }; 558 enum hw_flm_e { 559 /* functions */ 560 HW_FLM_CONTROL_PRESET_ALL = 0, 561 HW_FLM_RCP_PRESET_ALL, 562 HW_FLM_FLOW_LRN_DATA, 563 HW_FLM_FLOW_INF_STA_DATA, 564 /* Control fields */ 565 HW_FLM_CONTROL_ENABLE = FIELD_START_INDEX, 566 HW_FLM_CONTROL_INIT, 567 HW_FLM_CONTROL_LDS, 568 HW_FLM_CONTROL_LFS, 569 HW_FLM_CONTROL_LIS, 570 HW_FLM_CONTROL_UDS, 571 HW_FLM_CONTROL_UIS, 572 HW_FLM_CONTROL_RDS, 573 HW_FLM_CONTROL_RIS, 574 HW_FLM_CONTROL_PDS, 575 HW_FLM_CONTROL_PIS, 576 HW_FLM_CONTROL_CRCWR, 577 HW_FLM_CONTROL_CRCRD, 578 HW_FLM_CONTROL_RBL, 579 HW_FLM_CONTROL_EAB, 580 HW_FLM_CONTROL_SPLIT_SDRAM_USAGE, 581 HW_FLM_STATUS_CALIB_SUCCESS, 582 HW_FLM_STATUS_CALIB_FAIL, 583 HW_FLM_STATUS_INITDONE, 584 HW_FLM_STATUS_IDLE, 585 HW_FLM_STATUS_CRITICAL, 586 HW_FLM_STATUS_PANIC, 587 HW_FLM_STATUS_CRCERR, 588 HW_FLM_STATUS_EFT_BP, 589 HW_FLM_STATUS_CACHE_BUFFER_CRITICAL, 590 HW_FLM_LOAD_BIN, 591 HW_FLM_LOAD_LPS, 592 HW_FLM_LOAD_APS, 593 HW_FLM_PRIO_LIMIT0, 594 HW_FLM_PRIO_FT0, 595 HW_FLM_PRIO_LIMIT1, 596 HW_FLM_PRIO_FT1, 597 HW_FLM_PRIO_LIMIT2, 598 HW_FLM_PRIO_FT2, 599 HW_FLM_PRIO_LIMIT3, 600 HW_FLM_PRIO_FT3, 601 HW_FLM_PST_PRESET_ALL, 602 HW_FLM_PST_BP, 603 HW_FLM_PST_PP, 604 HW_FLM_PST_TP, 605 HW_FLM_RCP_LOOKUP, 606 HW_FLM_RCP_QW0_DYN, 607 HW_FLM_RCP_QW0_OFS, 608 HW_FLM_RCP_QW0_SEL, 609 HW_FLM_RCP_QW4_DYN, 610 HW_FLM_RCP_QW4_OFS, 611 HW_FLM_RCP_SW8_DYN, 612 HW_FLM_RCP_SW8_OFS, 613 HW_FLM_RCP_SW8_SEL, 614 HW_FLM_RCP_SW9_DYN, 615 HW_FLM_RCP_SW9_OFS, 616 HW_FLM_RCP_MASK, 617 HW_FLM_RCP_KID, 618 HW_FLM_RCP_OPN, 619 HW_FLM_RCP_IPN, 620 HW_FLM_RCP_BYT_DYN, 621 HW_FLM_RCP_BYT_OFS, 622 HW_FLM_RCP_TXPLM, 623 HW_FLM_RCP_AUTO_IPV4_MASK, 624 HW_FLM_BUF_CTRL_LRN_FREE, 625 HW_FLM_BUF_CTRL_INF_AVAIL, 626 HW_FLM_BUF_CTRL_STA_AVAIL, 627 HW_FLM_STAT_LRN_DONE, 628 HW_FLM_STAT_LRN_IGNORE, 629 HW_FLM_STAT_LRN_FAIL, 630 HW_FLM_STAT_UNL_DONE, 631 HW_FLM_STAT_UNL_IGNORE, 632 HW_FLM_STAT_REL_DONE, 633 HW_FLM_STAT_REL_IGNORE, 634 HW_FLM_STAT_PRB_DONE, 635 HW_FLM_STAT_PRB_IGNORE, 636 HW_FLM_STAT_AUL_DONE, 637 HW_FLM_STAT_AUL_IGNORE, 638 HW_FLM_STAT_AUL_FAIL, 639 HW_FLM_STAT_TUL_DONE, 640 HW_FLM_STAT_FLOWS, 641 HW_FLM_STAT_STA_DONE, /* module ver 0.20 */ 642 HW_FLM_STAT_INF_DONE, /* module ver 0.20 */ 643 HW_FLM_STAT_INF_SKIP, /* module ver 0.20 */ 644 HW_FLM_STAT_PCK_HIT, /* module ver 0.20 */ 645 HW_FLM_STAT_PCK_MISS, /* module ver 0.20 */ 646 HW_FLM_STAT_PCK_UNH, /* module ver 0.20 */ 647 HW_FLM_STAT_PCK_DIS, /* module ver 0.20 */ 648 HW_FLM_STAT_CSH_HIT, /* module ver 0.20 */ 649 HW_FLM_STAT_CSH_MISS, /* module ver 0.20 */ 650 HW_FLM_STAT_CSH_UNH, /* module ver 0.20 */ 651 HW_FLM_STAT_CUC_START, /* module ver 0.20 */ 652 HW_FLM_STAT_CUC_MOVE, /* module ver 0.20 */ 653 HW_FLM_SCAN_I, /* module ver 0.22 */ 654 HW_FLM_SCRUB_PRESET_ALL, 655 HW_FLM_SCRUB_T, /* module ver 0.22 */ 656 HW_FLM_SCRUB_R, /* module ver 0.24 */ 657 HW_FLM_SCRUB_DEL, /* module ver 0.24 */ 658 HW_FLM_SCRUB_INF, /* module ver 0.24 */ 659 }; 660 661 bool hw_mod_flm_present(struct flow_api_backend_s *be); 662 int hw_mod_flm_alloc(struct flow_api_backend_s *be); 663 void hw_mod_flm_free(struct flow_api_backend_s *be); 664 int hw_mod_flm_reset(struct flow_api_backend_s *be); 665 666 int hw_mod_flm_control_flush(struct flow_api_backend_s *be); 667 int hw_mod_flm_control_set(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t value); 668 669 int hw_mod_flm_status_update(struct flow_api_backend_s *be); 670 int hw_mod_flm_status_get(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t *value); 671 672 int hw_mod_flm_scan_flush(struct flow_api_backend_s *be); 673 int hw_mod_flm_scan_set(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t value); 674 675 int hw_mod_flm_load_bin_flush(struct flow_api_backend_s *be); 676 int hw_mod_flm_load_bin_set(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t value); 677 678 int hw_mod_flm_prio_flush(struct flow_api_backend_s *be); 679 int hw_mod_flm_prio_set(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t value); 680 681 int hw_mod_flm_pst_flush(struct flow_api_backend_s *be, int start_idx, int count); 682 int hw_mod_flm_pst_set(struct flow_api_backend_s *be, enum hw_flm_e field, int index, 683 uint32_t value); 684 685 int hw_mod_flm_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 686 int hw_mod_flm_rcp_set_mask(struct flow_api_backend_s *be, enum hw_flm_e field, int index, 687 uint32_t *value); 688 int hw_mod_flm_rcp_set(struct flow_api_backend_s *be, enum hw_flm_e field, int index, 689 uint32_t value); 690 691 int hw_mod_flm_buf_ctrl_update(struct flow_api_backend_s *be); 692 int hw_mod_flm_buf_ctrl_get(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t *value); 693 694 int hw_mod_flm_stat_update(struct flow_api_backend_s *be); 695 int hw_mod_flm_stat_get(struct flow_api_backend_s *be, enum hw_flm_e field, uint32_t *value); 696 697 int hw_mod_flm_lrn_data_set_flush(struct flow_api_backend_s *be, enum hw_flm_e field, 698 const uint32_t *value, uint32_t records, 699 uint32_t *handled_records, uint32_t *inf_word_cnt, 700 uint32_t *sta_word_cnt); 701 int hw_mod_flm_inf_sta_data_update_get(struct flow_api_backend_s *be, enum hw_flm_e field, 702 uint32_t *inf_value, uint32_t inf_size, 703 uint32_t *inf_word_cnt, uint32_t *sta_value, 704 uint32_t sta_size, uint32_t *sta_word_cnt); 705 706 uint32_t hw_mod_flm_scrub_timeout_decode(uint32_t t_enc); 707 uint32_t hw_mod_flm_scrub_timeout_encode(uint32_t t); 708 int hw_mod_flm_scrub_flush(struct flow_api_backend_s *be, int start_idx, int count); 709 int hw_mod_flm_scrub_set(struct flow_api_backend_s *be, enum hw_flm_e field, int index, 710 uint32_t value); 711 712 struct hsh_func_s { 713 COMMON_FUNC_INFO_S; 714 uint32_t nb_rcp;/* number of HSH recipes supported by FPGA */ 715 /* indication if Toeplitz is supported by FPGA, i.e. 0 - unsupported, 1 - supported */ 716 uint32_t toeplitz; 717 union { 718 struct hw_mod_hsh_v5_s v5; 719 }; 720 }; 721 enum hw_hsh_e { 722 /* functions */ 723 HW_HSH_RCP_PRESET_ALL = 0, 724 HW_HSH_RCP_COMPARE, 725 HW_HSH_RCP_FIND, 726 /* fields */ 727 HW_HSH_RCP_LOAD_DIST_TYPE = FIELD_START_INDEX, 728 HW_HSH_RCP_MAC_PORT_MASK, 729 HW_HSH_RCP_SORT, 730 HW_HSH_RCP_QW0_PE, 731 HW_HSH_RCP_QW0_OFS, 732 HW_HSH_RCP_QW4_PE, 733 HW_HSH_RCP_QW4_OFS, 734 HW_HSH_RCP_W8_PE, 735 HW_HSH_RCP_W8_OFS, 736 HW_HSH_RCP_W8_SORT, 737 HW_HSH_RCP_W9_PE, 738 HW_HSH_RCP_W9_OFS, 739 HW_HSH_RCP_W9_SORT, 740 HW_HSH_RCP_W9_P, 741 HW_HSH_RCP_P_MASK, 742 HW_HSH_RCP_WORD_MASK, 743 HW_HSH_RCP_SEED, 744 HW_HSH_RCP_TNL_P, 745 HW_HSH_RCP_HSH_VALID, 746 HW_HSH_RCP_HSH_TYPE, 747 HW_HSH_RCP_TOEPLITZ, 748 HW_HSH_RCP_K, 749 HW_HSH_RCP_AUTO_IPV4_MASK 750 }; 751 bool hw_mod_hsh_present(struct flow_api_backend_s *be); 752 int hw_mod_hsh_alloc(struct flow_api_backend_s *be); 753 void hw_mod_hsh_free(struct flow_api_backend_s *be); 754 int hw_mod_hsh_reset(struct flow_api_backend_s *be); 755 int hw_mod_hsh_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 756 int hw_mod_hsh_rcp_set(struct flow_api_backend_s *be, enum hw_hsh_e field, uint32_t index, 757 uint32_t word_off, uint32_t value); 758 759 struct qsl_func_s { 760 COMMON_FUNC_INFO_S; 761 uint32_t nb_rcp_categories; 762 uint32_t nb_qst_entries; 763 union { 764 struct hw_mod_qsl_v7_s v7; 765 }; 766 }; 767 enum hw_qsl_e { 768 /* functions */ 769 HW_QSL_RCP_PRESET_ALL = 0, 770 HW_QSL_RCP_COMPARE, 771 HW_QSL_RCP_FIND, 772 HW_QSL_QST_PRESET_ALL, 773 /* fields */ 774 HW_QSL_RCP_DISCARD = FIELD_START_INDEX, 775 HW_QSL_RCP_DROP, 776 HW_QSL_RCP_TBL_LO, 777 HW_QSL_RCP_TBL_HI, 778 HW_QSL_RCP_TBL_IDX, 779 HW_QSL_RCP_TBL_MSK, 780 HW_QSL_RCP_LR, 781 HW_QSL_RCP_TSA, 782 HW_QSL_RCP_VLI, 783 HW_QSL_QST_QUEUE, 784 HW_QSL_QST_EN, /* Alias: HW_QSL_QST_QEN */ 785 HW_QSL_QST_TX_PORT, 786 HW_QSL_QST_LRE, 787 HW_QSL_QST_TCI, 788 HW_QSL_QST_VEN, 789 HW_QSL_QEN_EN, 790 HW_QSL_UNMQ_DEST_QUEUE, 791 HW_QSL_UNMQ_EN, 792 }; 793 bool hw_mod_qsl_present(struct flow_api_backend_s *be); 794 int hw_mod_qsl_alloc(struct flow_api_backend_s *be); 795 void hw_mod_qsl_free(struct flow_api_backend_s *be); 796 int hw_mod_qsl_reset(struct flow_api_backend_s *be); 797 int hw_mod_qsl_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 798 int hw_mod_qsl_rcp_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 799 uint32_t value); 800 int hw_mod_qsl_qst_flush(struct flow_api_backend_s *be, int start_idx, int count); 801 int hw_mod_qsl_qst_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 802 uint32_t value); 803 int hw_mod_qsl_qen_flush(struct flow_api_backend_s *be, int start_idx, int count); 804 int hw_mod_qsl_qen_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 805 uint32_t value); 806 int hw_mod_qsl_qen_get(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 807 uint32_t *value); 808 int hw_mod_qsl_unmq_flush(struct flow_api_backend_s *be, int start_idx, int count); 809 int hw_mod_qsl_unmq_set(struct flow_api_backend_s *be, enum hw_qsl_e field, uint32_t index, 810 uint32_t value); 811 812 struct slc_lr_func_s { 813 COMMON_FUNC_INFO_S; 814 union { 815 struct hw_mod_slc_lr_v2_s v2; 816 }; 817 }; 818 enum hw_slc_lr_e { 819 /* functions */ 820 HW_SLC_LR_RCP_PRESET_ALL = 0, 821 HW_SLC_LR_RCP_COMPARE, 822 HW_SLC_LR_RCP_FIND, 823 /* fields */ 824 HW_SLC_LR_RCP_HEAD_SLC_EN = FIELD_START_INDEX, 825 HW_SLC_LR_RCP_HEAD_DYN, 826 HW_SLC_LR_RCP_HEAD_OFS, 827 HW_SLC_LR_RCP_TAIL_SLC_EN, 828 HW_SLC_LR_RCP_TAIL_DYN, 829 HW_SLC_LR_RCP_TAIL_OFS, 830 HW_SLC_LR_RCP_PCAP 831 }; 832 bool hw_mod_slc_lr_present(struct flow_api_backend_s *be); 833 int hw_mod_slc_lr_alloc(struct flow_api_backend_s *be); 834 void hw_mod_slc_lr_free(struct flow_api_backend_s *be); 835 int hw_mod_slc_lr_reset(struct flow_api_backend_s *be); 836 int hw_mod_slc_lr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 837 int hw_mod_slc_lr_rcp_set(struct flow_api_backend_s *be, enum hw_slc_lr_e field, uint32_t index, 838 uint32_t value); 839 840 struct pdb_func_s { 841 COMMON_FUNC_INFO_S; 842 uint32_t nb_pdb_rcp_categories; 843 844 union { 845 struct hw_mod_pdb_v9_s v9; 846 }; 847 }; 848 enum hw_pdb_e { 849 /* functions */ 850 HW_PDB_RCP_PRESET_ALL = 0, 851 HW_PDB_RCP_COMPARE, 852 HW_PDB_RCP_FIND, 853 /* fields */ 854 HW_PDB_RCP_DESCRIPTOR = FIELD_START_INDEX, 855 HW_PDB_RCP_DESC_LEN, 856 HW_PDB_RCP_TX_PORT, 857 HW_PDB_RCP_TX_IGNORE, 858 HW_PDB_RCP_TX_NOW, 859 HW_PDB_RCP_CRC_OVERWRITE, 860 HW_PDB_RCP_ALIGN, 861 HW_PDB_RCP_OFS0_DYN, 862 HW_PDB_RCP_OFS0_REL, 863 HW_PDB_RCP_OFS1_DYN, 864 HW_PDB_RCP_OFS1_REL, 865 HW_PDB_RCP_OFS2_DYN, 866 HW_PDB_RCP_OFS2_REL, 867 HW_PDB_RCP_IP_PROT_TNL, 868 HW_PDB_RCP_PPC_HSH, 869 HW_PDB_RCP_DUPLICATE_EN, 870 HW_PDB_RCP_DUPLICATE_BIT, 871 HW_PDB_RCP_PCAP_KEEP_FCS, 872 HW_PDB_CONFIG_TS_FORMAT, 873 HW_PDB_CONFIG_PORT_OFS, 874 }; 875 bool hw_mod_pdb_present(struct flow_api_backend_s *be); 876 int hw_mod_pdb_alloc(struct flow_api_backend_s *be); 877 void hw_mod_pdb_free(struct flow_api_backend_s *be); 878 int hw_mod_pdb_reset(struct flow_api_backend_s *be); 879 int hw_mod_pdb_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 880 int hw_mod_pdb_rcp_set(struct flow_api_backend_s *be, enum hw_pdb_e field, uint32_t index, 881 uint32_t value); 882 883 int hw_mod_pdb_config_flush(struct flow_api_backend_s *be); 884 885 struct tpe_func_s { 886 COMMON_FUNC_INFO_S; 887 uint32_t nb_rcp_categories; 888 uint32_t nb_ifr_categories; 889 uint32_t nb_cpy_writers; 890 uint32_t nb_rpl_depth; 891 uint32_t nb_rpl_ext_categories; 892 union { 893 struct hw_mod_tpe_v3_s v3; 894 }; 895 }; 896 enum hw_tpe_e { 897 /* functions */ 898 HW_TPE_PRESET_ALL = 0, 899 HW_TPE_FIND, 900 HW_TPE_COMPARE, 901 /* Control fields */ 902 HW_TPE_RPP_RCP_EXP = FIELD_START_INDEX, 903 HW_TPE_IFR_RCP_IPV4_EN, 904 HW_TPE_IFR_RCP_IPV4_DF_DROP, 905 HW_TPE_IFR_RCP_IPV6_EN, 906 HW_TPE_IFR_RCP_IPV6_DROP, 907 HW_TPE_IFR_RCP_MTU, 908 HW_TPE_INS_RCP_DYN, 909 HW_TPE_INS_RCP_OFS, 910 HW_TPE_INS_RCP_LEN, 911 HW_TPE_RPL_RCP_DYN, 912 HW_TPE_RPL_RCP_OFS, 913 HW_TPE_RPL_RCP_LEN, 914 HW_TPE_RPL_RCP_RPL_PTR, 915 HW_TPE_RPL_RCP_EXT_PRIO, 916 HW_TPE_RPL_RCP_ETH_TYPE_WR, 917 HW_TPE_RPL_EXT_RPL_PTR, 918 HW_TPE_RPL_EXT_META_RPL_LEN, /* SW only */ 919 HW_TPE_RPL_RPL_VALUE, 920 HW_TPE_CPY_RCP_READER_SELECT, 921 HW_TPE_CPY_RCP_DYN, 922 HW_TPE_CPY_RCP_OFS, 923 HW_TPE_CPY_RCP_LEN, 924 HW_TPE_HFU_RCP_LEN_A_WR, 925 HW_TPE_HFU_RCP_LEN_A_OUTER_L4_LEN, 926 HW_TPE_HFU_RCP_LEN_A_POS_DYN, 927 HW_TPE_HFU_RCP_LEN_A_POS_OFS, 928 HW_TPE_HFU_RCP_LEN_A_ADD_DYN, 929 HW_TPE_HFU_RCP_LEN_A_ADD_OFS, 930 HW_TPE_HFU_RCP_LEN_A_SUB_DYN, 931 HW_TPE_HFU_RCP_LEN_B_WR, 932 HW_TPE_HFU_RCP_LEN_B_POS_DYN, 933 HW_TPE_HFU_RCP_LEN_B_POS_OFS, 934 HW_TPE_HFU_RCP_LEN_B_ADD_DYN, 935 HW_TPE_HFU_RCP_LEN_B_ADD_OFS, 936 HW_TPE_HFU_RCP_LEN_B_SUB_DYN, 937 HW_TPE_HFU_RCP_LEN_C_WR, 938 HW_TPE_HFU_RCP_LEN_C_POS_DYN, 939 HW_TPE_HFU_RCP_LEN_C_POS_OFS, 940 HW_TPE_HFU_RCP_LEN_C_ADD_DYN, 941 HW_TPE_HFU_RCP_LEN_C_ADD_OFS, 942 HW_TPE_HFU_RCP_LEN_C_SUB_DYN, 943 HW_TPE_HFU_RCP_TTL_WR, 944 HW_TPE_HFU_RCP_TTL_POS_DYN, 945 HW_TPE_HFU_RCP_TTL_POS_OFS, 946 HW_TPE_CSU_RCP_OUTER_L3_CMD, 947 HW_TPE_CSU_RCP_OUTER_L4_CMD, 948 HW_TPE_CSU_RCP_INNER_L3_CMD, 949 HW_TPE_CSU_RCP_INNER_L4_CMD, 950 }; 951 bool hw_mod_tpe_present(struct flow_api_backend_s *be); 952 int hw_mod_tpe_alloc(struct flow_api_backend_s *be); 953 void hw_mod_tpe_free(struct flow_api_backend_s *be); 954 int hw_mod_tpe_reset(struct flow_api_backend_s *be); 955 956 int hw_mod_tpe_rpp_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 957 int hw_mod_tpe_rpp_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 958 uint32_t value); 959 960 int hw_mod_tpe_rpp_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 961 int hw_mod_tpe_rpp_ifr_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 962 uint32_t value); 963 964 int hw_mod_tpe_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 965 int hw_mod_tpe_ifr_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 966 uint32_t value); 967 968 int hw_mod_tpe_ins_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 969 int hw_mod_tpe_ins_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 970 uint32_t value); 971 972 int hw_mod_tpe_rpl_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 973 int hw_mod_tpe_rpl_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 974 uint32_t value); 975 976 int hw_mod_tpe_rpl_ext_flush(struct flow_api_backend_s *be, int start_idx, int count); 977 int hw_mod_tpe_rpl_ext_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 978 uint32_t value); 979 980 int hw_mod_tpe_rpl_rpl_flush(struct flow_api_backend_s *be, int start_idx, int count); 981 int hw_mod_tpe_rpl_rpl_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 982 uint32_t *value); 983 984 int hw_mod_tpe_cpy_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 985 int hw_mod_tpe_cpy_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 986 uint32_t value); 987 988 int hw_mod_tpe_hfu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 989 int hw_mod_tpe_hfu_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 990 uint32_t value); 991 992 int hw_mod_tpe_csu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); 993 int hw_mod_tpe_csu_rcp_set(struct flow_api_backend_s *be, enum hw_tpe_e field, int index, 994 uint32_t value); 995 996 enum debug_mode_e { 997 FLOW_BACKEND_DEBUG_MODE_NONE = 0x0000, 998 FLOW_BACKEND_DEBUG_MODE_WRITE = 0x0001 999 }; 1000 1001 struct flow_api_backend_ops { 1002 int version; 1003 int (*set_debug_mode)(void *dev, enum debug_mode_e mode); 1004 int (*get_nb_phy_port)(void *dev); 1005 int (*get_nb_rx_port)(void *dev); 1006 int (*get_ltx_avail)(void *dev); 1007 int (*get_nb_cat_funcs)(void *dev); 1008 int (*get_nb_categories)(void *dev); 1009 int (*get_nb_cat_km_if_cnt)(void *dev); 1010 int (*get_nb_cat_km_if_m0)(void *dev); 1011 int (*get_nb_cat_km_if_m1)(void *dev); 1012 1013 int (*get_nb_queues)(void *dev); 1014 int (*get_nb_km_flow_types)(void *dev); 1015 int (*get_nb_pm_ext)(void *dev); 1016 int (*get_nb_len)(void *dev); 1017 int (*get_kcc_size)(void *dev); 1018 int (*get_kcc_banks)(void *dev); 1019 int (*get_nb_km_categories)(void *dev); 1020 int (*get_nb_km_cam_banks)(void *dev); 1021 int (*get_nb_km_cam_record_words)(void *dev); 1022 int (*get_nb_km_cam_records)(void *dev); 1023 int (*get_nb_km_tcam_banks)(void *dev); 1024 int (*get_nb_km_tcam_bank_width)(void *dev); 1025 int (*get_nb_flm_categories)(void *dev); 1026 int (*get_nb_flm_size_mb)(void *dev); 1027 int (*get_nb_flm_entry_size)(void *dev); 1028 int (*get_nb_flm_variant)(void *dev); 1029 int (*get_nb_flm_prios)(void *dev); 1030 int (*get_nb_flm_pst_profiles)(void *dev); 1031 int (*get_nb_flm_scrub_profiles)(void *dev); 1032 int (*get_nb_flm_load_aps_max)(void *dev); 1033 int (*get_nb_qsl_categories)(void *dev); 1034 int (*get_nb_qsl_qst_entries)(void *dev); 1035 int (*get_nb_pdb_categories)(void *dev); 1036 int (*get_nb_roa_categories)(void *dev); 1037 int (*get_nb_tpe_categories)(void *dev); 1038 int (*get_nb_tx_cpy_writers)(void *dev); 1039 int (*get_nb_tx_cpy_mask_mem)(void *dev); 1040 int (*get_nb_tx_rpl_depth)(void *dev); 1041 int (*get_nb_tx_rpl_ext_categories)(void *dev); 1042 int (*get_nb_tpe_ifr_categories)(void *dev); 1043 int (*get_nb_rpp_per_ps)(void *dev); 1044 int (*get_nb_hsh_categories)(void *dev); 1045 int (*get_nb_hsh_toeplitz)(void *dev); 1046 1047 int (*alloc_rx_queue)(void *dev, int queue_id); 1048 int (*free_rx_queue)(void *dev, int hw_queue); 1049 1050 /* CAT */ 1051 bool (*get_cat_present)(void *dev); 1052 uint32_t (*get_cat_version)(void *dev); 1053 int (*cat_cfn_flush)(void *dev, const struct cat_func_s *cat, int cat_func, int cnt); 1054 int (*cat_kce_flush)(void *dev, const struct cat_func_s *cat, int km_if_idx, int index, 1055 int cnt); 1056 int (*cat_kcs_flush)(void *dev, const struct cat_func_s *cat, int km_if_idx, int cat_func, 1057 int cnt); 1058 int (*cat_fte_flush)(void *dev, const struct cat_func_s *cat, int km_if_idx, int index, 1059 int cnt); 1060 int (*cat_cte_flush)(void *dev, const struct cat_func_s *cat, int cat_func, int cnt); 1061 int (*cat_cts_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 1062 int (*cat_cot_flush)(void *dev, const struct cat_func_s *cat, int cat_func, int cnt); 1063 int (*cat_cct_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 1064 int (*cat_exo_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 1065 int (*cat_rck_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 1066 int (*cat_len_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 1067 int (*cat_kcc_flush)(void *dev, const struct cat_func_s *cat, int index, int cnt); 1068 1069 /* KM */ 1070 bool (*get_km_present)(void *dev); 1071 uint32_t (*get_km_version)(void *dev); 1072 int (*km_rcp_flush)(void *dev, const struct km_func_s *km, int category, int cnt); 1073 int (*km_cam_flush)(void *dev, const struct km_func_s *km, int bank, int record, int cnt); 1074 int (*km_tcam_flush)(void *dev, const struct km_func_s *km, int bank, int byte, int value, 1075 int cnt); 1076 int (*km_tci_flush)(void *dev, const struct km_func_s *km, int bank, int record, int cnt); 1077 int (*km_tcq_flush)(void *dev, const struct km_func_s *km, int bank, int record, int cnt); 1078 1079 /* FLM */ 1080 bool (*get_flm_present)(void *dev); 1081 uint32_t (*get_flm_version)(void *dev); 1082 int (*flm_control_flush)(void *dev, const struct flm_func_s *flm); 1083 int (*flm_status_flush)(void *dev, const struct flm_func_s *flm); 1084 int (*flm_status_update)(void *dev, const struct flm_func_s *flm); 1085 int (*flm_scan_flush)(void *dev, const struct flm_func_s *flm); 1086 int (*flm_load_bin_flush)(void *dev, const struct flm_func_s *flm); 1087 int (*flm_prio_flush)(void *dev, const struct flm_func_s *flm); 1088 int (*flm_pst_flush)(void *dev, const struct flm_func_s *flm, int index, int cnt); 1089 int (*flm_rcp_flush)(void *dev, const struct flm_func_s *flm, int index, int cnt); 1090 int (*flm_scrub_flush)(void *dev, const struct flm_func_s *flm, int index, int cnt); 1091 int (*flm_buf_ctrl_update)(void *dev, const struct flm_func_s *flm); 1092 int (*flm_stat_update)(void *dev, const struct flm_func_s *flm); 1093 int (*flm_lrn_data_flush)(void *be_dev, const struct flm_func_s *flm, 1094 const uint32_t *lrn_data, uint32_t records, 1095 uint32_t *handled_records, uint32_t words_per_record, 1096 uint32_t *inf_word_cnt, uint32_t *sta_word_cnt); 1097 int (*flm_inf_sta_data_update)(void *be_dev, const struct flm_func_s *flm, 1098 uint32_t *inf_data, uint32_t inf_size, 1099 uint32_t *inf_word_cnt, uint32_t *sta_data, 1100 uint32_t sta_size, uint32_t *sta_word_cnt); 1101 1102 /* HSH */ 1103 bool (*get_hsh_present)(void *dev); 1104 uint32_t (*get_hsh_version)(void *dev); 1105 int (*hsh_rcp_flush)(void *dev, const struct hsh_func_s *hsh, int category, int cnt); 1106 1107 /* QSL */ 1108 bool (*get_qsl_present)(void *dev); 1109 uint32_t (*get_qsl_version)(void *dev); 1110 int (*qsl_rcp_flush)(void *dev, const struct qsl_func_s *qsl, int category, int cnt); 1111 int (*qsl_qst_flush)(void *dev, const struct qsl_func_s *qsl, int entry, int cnt); 1112 int (*qsl_qen_flush)(void *dev, const struct qsl_func_s *qsl, int entry, int cnt); 1113 int (*qsl_unmq_flush)(void *dev, const struct qsl_func_s *qsl, int entry, int cnt); 1114 1115 /* SLC LR */ 1116 bool (*get_slc_lr_present)(void *dev); 1117 uint32_t (*get_slc_lr_version)(void *dev); 1118 int (*slc_lr_rcp_flush)(void *dev, const struct slc_lr_func_s *slc_lr, int category, 1119 int cnt); 1120 1121 /* PDB */ 1122 bool (*get_pdb_present)(void *dev); 1123 uint32_t (*get_pdb_version)(void *dev); 1124 int (*pdb_rcp_flush)(void *dev, const struct pdb_func_s *pdb, int category, int cnt); 1125 int (*pdb_config_flush)(void *dev, const struct pdb_func_s *pdb); 1126 1127 /* TPE */ 1128 bool (*get_tpe_present)(void *dev); 1129 uint32_t (*get_tpe_version)(void *dev); 1130 int (*tpe_rpp_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1131 int (*tpe_rpp_ifr_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1132 int (*tpe_ifr_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1133 int (*tpe_ins_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1134 int (*tpe_rpl_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1135 int (*tpe_rpl_ext_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1136 int (*tpe_rpl_rpl_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1137 int (*tpe_cpy_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1138 int (*tpe_hfu_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1139 int (*tpe_csu_rcp_flush)(void *dev, const struct tpe_func_s *tpe, int index, int cnt); 1140 }; 1141 1142 struct flow_api_backend_s { 1143 void *be_dev; 1144 const struct flow_api_backend_ops *iface; 1145 1146 /* flow filter FPGA modules */ 1147 struct cat_func_s cat; 1148 struct km_func_s km; 1149 struct flm_func_s flm; 1150 struct hsh_func_s hsh; 1151 struct qsl_func_s qsl; 1152 struct slc_lr_func_s slc_lr; 1153 struct pdb_func_s pdb; 1154 struct tpe_func_s tpe; 1155 1156 /* NIC attributes */ 1157 unsigned int num_phy_ports; 1158 unsigned int num_rx_ports; 1159 1160 /* flow filter resource capacities */ 1161 unsigned int max_categories; 1162 unsigned int max_queues; 1163 }; 1164 1165 int flow_api_backend_init(struct flow_api_backend_s *dev, const struct flow_api_backend_ops *iface, 1166 void *be_dev); 1167 int flow_api_backend_done(struct flow_api_backend_s *dev); 1168 1169 #endif /* _HW_MOD_BACKEND_H_ */ 1170