1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017 6WIND S.A. 3 * Copyright 2017 Mellanox Technologies, Ltd 4 */ 5 6 #ifndef RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ 7 #define RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ 8 9 #include <stdint.h> 10 #include <string.h> 11 #include <stdlib.h> 12 13 #include <rte_altivec.h> 14 15 #include <rte_mbuf.h> 16 #include <rte_mempool.h> 17 #include <rte_prefetch.h> 18 19 #include <mlx5_prm.h> 20 21 #include "mlx5_defs.h" 22 #include "mlx5.h" 23 #include "mlx5_utils.h" 24 #include "mlx5_rxtx.h" 25 #include "mlx5_rxtx_vec.h" 26 #include "mlx5_autoconf.h" 27 28 #ifndef __INTEL_COMPILER 29 #pragma GCC diagnostic ignored "-Wcast-qual" 30 #pragma GCC diagnostic ignored "-Wstrict-aliasing" 31 #endif 32 33 /** 34 * Store free buffers to RX SW ring. 35 * 36 * @param elts 37 * Pointer to SW ring to be filled. 38 * @param pkts 39 * Pointer to array of packets to be stored. 40 * @param pkts_n 41 * Number of packets to be stored. 42 */ 43 static inline void 44 rxq_copy_mbuf_v(struct rte_mbuf **elts, struct rte_mbuf **pkts, uint16_t n) 45 { 46 unsigned int pos; 47 uint16_t p = n & -2; 48 49 for (pos = 0; pos < p; pos += 2) { 50 __vector unsigned char mbp; 51 52 mbp = (__vector unsigned char)vec_vsx_ld(0, 53 (signed int const *)&elts[pos]); 54 *(__vector unsigned char *)&pkts[pos] = mbp; 55 } 56 if (n & 1) 57 pkts[pos] = elts[pos]; 58 } 59 60 /** 61 * Decompress a compressed completion and fill in mbufs in RX SW ring with data 62 * extracted from the title completion descriptor. 63 * 64 * @param rxq 65 * Pointer to RX queue structure. 66 * @param cq 67 * Pointer to completion array having a compressed completion at first. 68 * @param elts 69 * Pointer to SW ring to be filled. The first mbuf has to be pre-built from 70 * the title completion descriptor to be copied to the rest of mbufs. 71 * @param keep 72 * Keep unzipping if the next CQE is the miniCQE array. 73 * 74 * @return 75 * Number of mini-CQEs successfully decompressed. 76 */ 77 static inline uint16_t 78 rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 79 struct rte_mbuf **elts, bool keep) 80 { 81 volatile struct mlx5_mini_cqe8 *mcq = 82 (void *)&(cq + !rxq->cqe_comp_layout)->pkt_info; 83 /* Title packet is pre-built. */ 84 struct rte_mbuf *t_pkt = rxq->cqe_comp_layout ? &rxq->title_pkt : elts[0]; 85 const __vector unsigned char zero = (__vector unsigned char){0}; 86 /* Mask to shuffle from extracted mini CQE to mbuf. */ 87 const __vector unsigned char shuf_mask1 = (__vector unsigned char){ 88 -1, -1, -1, -1, /* skip packet_type */ 89 7, 6, -1, -1, /* bswap16, pkt_len */ 90 7, 6, /* bswap16, data_len */ 91 -1, -1, /* skip vlan_tci */ 92 3, 2, 1, 0}; /* bswap32, rss */ 93 const __vector unsigned char shuf_mask2 = (__vector unsigned char){ 94 -1, -1, -1, -1, /* skip packet_type */ 95 15, 14, -1, -1, /* bswap16, pkt_len */ 96 15, 14, /* data_len, bswap16 */ 97 -1, -1, /* skip vlan_tci */ 98 11, 10, 9, 8}; /* bswap32, rss */ 99 /* Restore the compressed count. Must be 16 bits. */ 100 uint16_t mcqe_n = (rxq->cqe_comp_layout) ? 101 (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : 102 t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); 103 uint16_t pkts_n = mcqe_n; 104 const __vector unsigned char rearm = 105 (__vector unsigned char)vec_vsx_ld(0, 106 (signed int const *)&t_pkt->rearm_data); 107 const __vector unsigned char rxdf = 108 (__vector unsigned char)vec_vsx_ld(0, 109 (signed int const *)&t_pkt->rx_descriptor_fields1); 110 const __vector unsigned char crc_adj = 111 (__vector unsigned char)(__vector unsigned short){ 112 0, 0, rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 113 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0}; 114 const __vector unsigned short rxdf_sel_mask = 115 (__vector unsigned short){ 116 0xffff, 0xffff, 0, 0, 0, 0xffff, 0, 0}; 117 __vector unsigned char ol_flags = (__vector unsigned char){0}; 118 __vector unsigned char ol_flags_mask = (__vector unsigned char){0}; 119 unsigned int pos; 120 unsigned int i; 121 unsigned int inv = 0; 122 123 #ifdef MLX5_PMD_SOFT_COUNTERS 124 const __vector unsigned char ones = vec_splat_u8(-1); 125 uint32_t rcvd_byte = 0; 126 /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */ 127 const __vector unsigned char len_shuf_mask = (__vector unsigned char){ 128 3, 2, 11, 10, 129 7, 6, 15, 14, 130 -1, -1, -1, -1, 131 -1, -1, -1, -1}; 132 #endif 133 134 /* 135 * A. load mCQEs into a 128bit register. 136 * B. store rearm data to mbuf. 137 * C. combine data from mCQEs with rx_descriptor_fields1. 138 * D. store rx_descriptor_fields1. 139 * E. store flow tag (rte_flow mark). 140 */ 141 cycle: 142 if (rxq->cqe_comp_layout) 143 rte_prefetch0((void *)(cq + mcqe_n)); 144 for (pos = 0; pos < mcqe_n; ) { 145 __vector unsigned char mcqe1, mcqe2; 146 __vector unsigned char rxdf1, rxdf2; 147 #ifdef MLX5_PMD_SOFT_COUNTERS 148 const __vector unsigned short mcqe_sel_mask = 149 (__vector unsigned short){0, 0, 0xffff, 0xffff, 150 0, 0, 0xfff, 0xffff}; 151 const __vector unsigned char lower_half = { 152 0, 1, 4, 5, 8, 9, 12, 13, 16, 153 17, 20, 21, 24, 25, 28, 29}; 154 const __vector unsigned char upper_half = { 155 2, 3, 6, 7, 10, 11, 14, 15, 156 18, 19, 22, 23, 26, 27, 30, 31}; 157 __vector unsigned short left, right; 158 __vector unsigned char byte_cnt, invalid_mask; 159 __vector unsigned long lshift; 160 __attribute__((altivec(vector__))) 161 __attribute__((altivec(bool__))) 162 unsigned long long shmask; 163 const __vector unsigned long shmax = {64, 64}; 164 #endif 165 166 if (!rxq->cqe_comp_layout) 167 for (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i) 168 if (likely(pos + i < mcqe_n)) 169 rte_prefetch0((void *)(cq + pos + i)); 170 /* A.1 load mCQEs into a 128bit register. */ 171 mcqe1 = (__vector unsigned char)vec_vsx_ld(0, 172 (signed int const *)&mcq[pos % 8]); 173 mcqe2 = (__vector unsigned char)vec_vsx_ld(0, 174 (signed int const *)&mcq[pos % 8 + 2]); 175 176 /* B.1 store rearm data to mbuf. */ 177 *(__vector unsigned char *) 178 &elts[pos]->rearm_data = rearm; 179 *(__vector unsigned char *) 180 &elts[pos + 1]->rearm_data = rearm; 181 182 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */ 183 rxdf1 = vec_perm(mcqe1, zero, shuf_mask1); 184 rxdf2 = vec_perm(mcqe1, zero, shuf_mask2); 185 rxdf1 = (__vector unsigned char) 186 ((__vector unsigned short)rxdf1 - 187 (__vector unsigned short)crc_adj); 188 rxdf2 = (__vector unsigned char) 189 ((__vector unsigned short)rxdf2 - 190 (__vector unsigned short)crc_adj); 191 rxdf1 = (__vector unsigned char) 192 vec_sel((__vector unsigned short)rxdf1, 193 (__vector unsigned short)rxdf, rxdf_sel_mask); 194 rxdf2 = (__vector unsigned char) 195 vec_sel((__vector unsigned short)rxdf2, 196 (__vector unsigned short)rxdf, rxdf_sel_mask); 197 198 /* D.1 store rx_descriptor_fields1. */ 199 *(__vector unsigned char *) 200 &elts[pos]->rx_descriptor_fields1 = rxdf1; 201 *(__vector unsigned char *) 202 &elts[pos + 1]->rx_descriptor_fields1 = rxdf2; 203 204 /* B.1 store rearm data to mbuf. */ 205 *(__vector unsigned char *) 206 &elts[pos + 2]->rearm_data = rearm; 207 *(__vector unsigned char *) 208 &elts[pos + 3]->rearm_data = rearm; 209 210 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */ 211 rxdf1 = vec_perm(mcqe2, zero, shuf_mask1); 212 rxdf2 = vec_perm(mcqe2, zero, shuf_mask2); 213 rxdf1 = (__vector unsigned char) 214 ((__vector unsigned short)rxdf1 - 215 (__vector unsigned short)crc_adj); 216 rxdf2 = (__vector unsigned char) 217 ((__vector unsigned short)rxdf2 - 218 (__vector unsigned short)crc_adj); 219 rxdf1 = (__vector unsigned char) 220 vec_sel((__vector unsigned short)rxdf1, 221 (__vector unsigned short)rxdf, rxdf_sel_mask); 222 rxdf2 = (__vector unsigned char) 223 vec_sel((__vector unsigned short)rxdf2, 224 (__vector unsigned short)rxdf, rxdf_sel_mask); 225 226 /* D.1 store rx_descriptor_fields1. */ 227 *(__vector unsigned char *) 228 &elts[pos + 2]->rx_descriptor_fields1 = rxdf1; 229 *(__vector unsigned char *) 230 &elts[pos + 3]->rx_descriptor_fields1 = rxdf2; 231 232 #ifdef MLX5_PMD_SOFT_COUNTERS 233 invalid_mask = (__vector unsigned char)(__vector unsigned long){ 234 (mcqe_n - pos) * sizeof(uint16_t) * 8, 0}; 235 236 lshift = 237 vec_splat((__vector unsigned long)invalid_mask, 0); 238 shmask = vec_cmpgt(shmax, lshift); 239 invalid_mask = (__vector unsigned char) 240 vec_sl((__vector unsigned long)ones, lshift); 241 invalid_mask = (__vector unsigned char) 242 vec_sel((__vector unsigned long)shmask, 243 (__vector unsigned long)invalid_mask, shmask); 244 245 byte_cnt = (__vector unsigned char) 246 vec_sel((__vector unsigned short) 247 vec_sro((__vector unsigned short)mcqe1, 248 (__vector unsigned char){32}), 249 (__vector unsigned short)mcqe2, mcqe_sel_mask); 250 byte_cnt = vec_perm(byte_cnt, zero, len_shuf_mask); 251 byte_cnt = (__vector unsigned char) 252 vec_andc((__vector unsigned long)byte_cnt, 253 (__vector unsigned long)invalid_mask); 254 left = vec_perm((__vector unsigned short)byte_cnt, 255 (__vector unsigned short)zero, lower_half); 256 right = vec_perm((__vector unsigned short)byte_cnt, 257 (__vector unsigned short)zero, upper_half); 258 byte_cnt = (__vector unsigned char)vec_add(left, right); 259 left = vec_perm((__vector unsigned short)byte_cnt, 260 (__vector unsigned short)zero, lower_half); 261 right = vec_perm((__vector unsigned short)byte_cnt, 262 (__vector unsigned short)zero, upper_half); 263 byte_cnt = (__vector unsigned char)vec_add(left, right); 264 rcvd_byte += ((__vector unsigned long)byte_cnt)[0]; 265 #endif 266 267 if (rxq->mark) { 268 if (rxq->mcqe_format != 269 MLX5_CQE_RESP_FORMAT_FTAG_STRIDX) { 270 const uint32_t flow_tag = t_pkt->hash.fdir.hi; 271 272 /* E.1 store flow tag (rte_flow mark). */ 273 elts[pos]->hash.fdir.hi = flow_tag; 274 elts[pos + 1]->hash.fdir.hi = flow_tag; 275 elts[pos + 2]->hash.fdir.hi = flow_tag; 276 elts[pos + 3]->hash.fdir.hi = flow_tag; 277 } else { 278 const __vector unsigned char flow_mark_adj = 279 (__vector unsigned char) 280 (__vector unsigned int){ 281 -1, -1, -1, -1}; 282 const __vector unsigned char flow_mark_shuf = 283 (__vector unsigned char){ 284 -1, -1, -1, -1, 285 -1, -1, -1, -1, 286 12, 8, 9, -1, 287 4, 0, 1, -1}; 288 const __vector unsigned char ft_mask = 289 (__vector unsigned char) 290 (__vector unsigned int){ 291 0xffffff00, 0xffffff00, 292 0xffffff00, 0xffffff00}; 293 const __vector unsigned char fdir_flags = 294 (__vector unsigned char) 295 (__vector unsigned int){ 296 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR, 297 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR}; 298 const __vector unsigned char fdir_all_flags = 299 (__vector unsigned char) 300 (__vector unsigned int){ 301 RTE_MBUF_F_RX_FDIR | rxq->mark_flag, 302 RTE_MBUF_F_RX_FDIR | rxq->mark_flag, 303 RTE_MBUF_F_RX_FDIR | rxq->mark_flag, 304 RTE_MBUF_F_RX_FDIR | rxq->mark_flag}; 305 __vector unsigned char fdir_id_flags = 306 (__vector unsigned char) 307 (__vector unsigned int){ 308 rxq->mark_flag, rxq->mark_flag, 309 rxq->mark_flag, rxq->mark_flag}; 310 /* Extract flow_tag field. */ 311 __vector unsigned char ftag0 = vec_perm(mcqe1, 312 zero, flow_mark_shuf); 313 __vector unsigned char ftag1 = vec_perm(mcqe2, 314 zero, flow_mark_shuf); 315 __vector unsigned char ftag = 316 (__vector unsigned char) 317 vec_mergel((__vector unsigned int)ftag0, 318 (__vector unsigned int)ftag1); 319 __vector unsigned char invalid_mask = 320 (__vector unsigned char) 321 vec_cmpeq((__vector unsigned int)ftag, 322 (__vector unsigned int)zero); 323 324 ol_flags_mask = (__vector unsigned char) 325 vec_or((__vector unsigned long) 326 ol_flags_mask, 327 (__vector unsigned long)fdir_all_flags); 328 329 /* Set RTE_MBUF_F_RX_FDIR if flow tag is non-zero. */ 330 invalid_mask = (__vector unsigned char) 331 vec_cmpeq((__vector unsigned int)ftag, 332 (__vector unsigned int)zero); 333 ol_flags = (__vector unsigned char) 334 vec_or((__vector unsigned long)ol_flags, 335 (__vector unsigned long) 336 vec_andc((__vector unsigned long) 337 fdir_flags, 338 (__vector unsigned long)invalid_mask)); 339 ol_flags_mask = (__vector unsigned char) 340 vec_or((__vector unsigned long) 341 ol_flags_mask, 342 (__vector unsigned long)fdir_flags); 343 344 /* Mask out invalid entries. */ 345 fdir_id_flags = (__vector unsigned char) 346 vec_andc((__vector unsigned long) 347 fdir_id_flags, 348 (__vector unsigned long)invalid_mask); 349 350 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */ 351 ol_flags = (__vector unsigned char) 352 vec_or((__vector unsigned long)ol_flags, 353 (__vector unsigned long) 354 vec_andc((__vector unsigned long) 355 fdir_id_flags, 356 (__vector unsigned long) 357 vec_cmpeq((__vector unsigned int)ftag, 358 (__vector unsigned int)ft_mask))); 359 360 ftag = (__vector unsigned char) 361 ((__vector unsigned int)ftag + 362 (__vector unsigned int)flow_mark_adj); 363 elts[pos]->hash.fdir.hi = 364 ((__vector unsigned int)ftag)[0]; 365 elts[pos + 1]->hash.fdir.hi = 366 ((__vector unsigned int)ftag)[1]; 367 elts[pos + 2]->hash.fdir.hi = 368 ((__vector unsigned int)ftag)[2]; 369 elts[pos + 3]->hash.fdir.hi = 370 ((__vector unsigned int)ftag)[3]; 371 } 372 } 373 if (unlikely(rxq->mcqe_format != MLX5_CQE_RESP_FORMAT_HASH)) { 374 if (rxq->mcqe_format == 375 MLX5_CQE_RESP_FORMAT_L34H_STRIDX) { 376 const uint8_t pkt_info = 377 (cq->pkt_info & 0x3) << 6; 378 const uint8_t pkt_hdr0 = 379 mcq[pos % 8].hdr_type; 380 const uint8_t pkt_hdr1 = 381 mcq[pos % 8 + 1].hdr_type; 382 const uint8_t pkt_hdr2 = 383 mcq[pos % 8 + 2].hdr_type; 384 const uint8_t pkt_hdr3 = 385 mcq[pos % 8 + 3].hdr_type; 386 const __vector unsigned char vlan_mask = 387 (__vector unsigned char) 388 (__vector unsigned int) { 389 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 390 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 391 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 392 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED)}; 393 const __vector unsigned char cv_mask = 394 (__vector unsigned char) 395 (__vector unsigned int) { 396 MLX5_CQE_VLAN_STRIPPED, 397 MLX5_CQE_VLAN_STRIPPED, 398 MLX5_CQE_VLAN_STRIPPED, 399 MLX5_CQE_VLAN_STRIPPED}; 400 __vector unsigned char pkt_cv = 401 (__vector unsigned char) 402 (__vector unsigned int) { 403 pkt_hdr0 & 0x1, pkt_hdr1 & 0x1, 404 pkt_hdr2 & 0x1, pkt_hdr3 & 0x1}; 405 406 ol_flags_mask = (__vector unsigned char) 407 vec_or((__vector unsigned long) 408 ol_flags_mask, 409 (__vector unsigned long)vlan_mask); 410 ol_flags = (__vector unsigned char) 411 vec_or((__vector unsigned long)ol_flags, 412 (__vector unsigned long) 413 vec_and((__vector unsigned long)vlan_mask, 414 (__vector unsigned long) 415 vec_cmpeq((__vector unsigned int)pkt_cv, 416 (__vector unsigned int)cv_mask))); 417 elts[pos]->packet_type = 418 mlx5_ptype_table[(pkt_hdr0 >> 2) | 419 pkt_info]; 420 elts[pos + 1]->packet_type = 421 mlx5_ptype_table[(pkt_hdr1 >> 2) | 422 pkt_info]; 423 elts[pos + 2]->packet_type = 424 mlx5_ptype_table[(pkt_hdr2 >> 2) | 425 pkt_info]; 426 elts[pos + 3]->packet_type = 427 mlx5_ptype_table[(pkt_hdr3 >> 2) | 428 pkt_info]; 429 if (rxq->tunnel) { 430 elts[pos]->packet_type |= 431 !!(((pkt_hdr0 >> 2) | 432 pkt_info) & (1 << 6)); 433 elts[pos + 1]->packet_type |= 434 !!(((pkt_hdr1 >> 2) | 435 pkt_info) & (1 << 6)); 436 elts[pos + 2]->packet_type |= 437 !!(((pkt_hdr2 >> 2) | 438 pkt_info) & (1 << 6)); 439 elts[pos + 3]->packet_type |= 440 !!(((pkt_hdr3 >> 2) | 441 pkt_info) & (1 << 6)); 442 } 443 } 444 const __vector unsigned char hash_mask = 445 (__vector unsigned char)(__vector unsigned int) { 446 RTE_MBUF_F_RX_RSS_HASH, 447 RTE_MBUF_F_RX_RSS_HASH, 448 RTE_MBUF_F_RX_RSS_HASH, 449 RTE_MBUF_F_RX_RSS_HASH}; 450 const __vector unsigned char rearm_flags = 451 (__vector unsigned char)(__vector unsigned int) { 452 (uint32_t)t_pkt->ol_flags, 453 (uint32_t)t_pkt->ol_flags, 454 (uint32_t)t_pkt->ol_flags, 455 (uint32_t)t_pkt->ol_flags}; 456 457 ol_flags_mask = (__vector unsigned char) 458 vec_or((__vector unsigned long)ol_flags_mask, 459 (__vector unsigned long)hash_mask); 460 ol_flags = (__vector unsigned char) 461 vec_or((__vector unsigned long)ol_flags, 462 (__vector unsigned long) 463 vec_andc((__vector unsigned long)rearm_flags, 464 (__vector unsigned long)ol_flags_mask)); 465 466 elts[pos]->ol_flags = 467 ((__vector unsigned int)ol_flags)[0]; 468 elts[pos + 1]->ol_flags = 469 ((__vector unsigned int)ol_flags)[1]; 470 elts[pos + 2]->ol_flags = 471 ((__vector unsigned int)ol_flags)[2]; 472 elts[pos + 3]->ol_flags = 473 ((__vector unsigned int)ol_flags)[3]; 474 elts[pos]->hash.rss = 0; 475 elts[pos + 1]->hash.rss = 0; 476 elts[pos + 2]->hash.rss = 0; 477 elts[pos + 3]->hash.rss = 0; 478 } 479 if (rxq->dynf_meta) { 480 int32_t offs = rxq->flow_meta_offset; 481 const uint32_t meta = 482 *RTE_MBUF_DYNFIELD(t_pkt, offs, uint32_t *); 483 484 /* Check if title packet has valid metadata. */ 485 if (meta) { 486 MLX5_ASSERT(t_pkt->ol_flags & 487 rxq->flow_meta_mask); 488 *RTE_MBUF_DYNFIELD(elts[pos], offs, 489 uint32_t *) = meta; 490 *RTE_MBUF_DYNFIELD(elts[pos + 1], offs, 491 uint32_t *) = meta; 492 *RTE_MBUF_DYNFIELD(elts[pos + 2], offs, 493 uint32_t *) = meta; 494 *RTE_MBUF_DYNFIELD(elts[pos + 3], offs, 495 uint32_t *) = meta; 496 } 497 } 498 499 pos += MLX5_VPMD_DESCS_PER_LOOP; 500 /* Move to next CQE and invalidate consumed CQEs. */ 501 if (!rxq->cqe_comp_layout) { 502 if (!(pos & 0x7) && pos < mcqe_n) { 503 if (pos + 8 < mcqe_n) 504 rte_prefetch0((void *)(cq + pos + 8)); 505 mcq = (void *)&(cq + pos)->pkt_info; 506 for (i = 0; i < 8; ++i) 507 cq[inv++].op_own = MLX5_CQE_INVALIDATE; 508 } 509 } 510 } 511 512 if (rxq->cqe_comp_layout && keep) { 513 int ret; 514 /* Keep unzipping if the next CQE is the miniCQE array. */ 515 cq = &cq[mcqe_n]; 516 ret = check_cqe_iteration(cq, rxq->cqe_n, rxq->cq_ci + pkts_n); 517 if (ret == MLX5_CQE_STATUS_SW_OWN && 518 MLX5_CQE_FORMAT(cq->op_own) == MLX5_COMPRESSED) { 519 pos = 0; 520 elts = &elts[mcqe_n]; 521 mcq = (void *)cq; 522 mcqe_n = MLX5_CQE_NUM_MINIS(cq->op_own) + 1; 523 pkts_n += mcqe_n; 524 goto cycle; 525 } 526 } else { 527 /* Invalidate the rest of CQEs. */ 528 for (; inv < pkts_n; ++inv) 529 cq[inv].op_own = MLX5_CQE_INVALIDATE; 530 } 531 532 #ifdef MLX5_PMD_SOFT_COUNTERS 533 rxq->stats.ipackets += pkts_n; 534 rxq->stats.ibytes += rcvd_byte; 535 #endif 536 537 return pkts_n; 538 } 539 540 /** 541 * Calculate packet type and offload flag for mbuf and store it. 542 * 543 * @param rxq 544 * Pointer to RX queue structure. 545 * @param cqes[4] 546 * Array of four 16bytes completions extracted from the original completion 547 * descriptor. 548 * @param op_err 549 * Opcode vector having responder error status. Each field is 4B. 550 * @param pkts 551 * Pointer to array of packets to be filled. 552 */ 553 static inline void 554 rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, 555 __vector unsigned char cqes[4], __vector unsigned char op_err, 556 struct rte_mbuf **pkts) 557 { 558 __vector unsigned char pinfo0, pinfo1; 559 __vector unsigned char pinfo, ptype; 560 __vector unsigned char ol_flags = (__vector unsigned char) 561 (__vector unsigned int){ 562 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 563 rxq->hw_timestamp * rxq->timestamp_rx_flag, 564 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 565 rxq->hw_timestamp * rxq->timestamp_rx_flag, 566 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 567 rxq->hw_timestamp * rxq->timestamp_rx_flag, 568 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 569 rxq->hw_timestamp * rxq->timestamp_rx_flag}; 570 __vector unsigned char cv_flags; 571 const __vector unsigned char zero = (__vector unsigned char){0}; 572 const __vector unsigned char ptype_mask = 573 (__vector unsigned char)(__vector unsigned int){ 574 0x0000fd06, 0x0000fd06, 0x0000fd06, 0x0000fd06}; 575 const __vector unsigned char ptype_ol_mask = 576 (__vector unsigned char)(__vector unsigned int){ 577 0x00000106, 0x00000106, 0x00000106, 0x00000106}; 578 const __vector unsigned char pinfo_mask = 579 (__vector unsigned char)(__vector unsigned int){ 580 0x00000003, 0x00000003, 0x00000003, 0x00000003}; 581 const __vector unsigned char cv_flag_sel = (__vector unsigned char){ 582 0, (uint8_t)(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 583 (uint8_t)(RTE_MBUF_F_RX_IP_CKSUM_GOOD >> 1), 0, 584 (uint8_t)(RTE_MBUF_F_RX_L4_CKSUM_GOOD >> 1), 0, 585 (uint8_t)((RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD) >> 1), 586 0, 0, 0, 0, 0, 0, 0, 0, 0}; 587 const __vector unsigned char cv_mask = 588 (__vector unsigned char)(__vector unsigned int){ 589 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 590 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 591 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 592 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 593 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 594 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 595 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 596 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED}; 597 const __vector unsigned char mbuf_init = 598 (__vector unsigned char)vec_vsx_ld 599 (0, (__vector unsigned char *)&rxq->mbuf_initializer); 600 const __vector unsigned short rearm_sel_mask = 601 (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0}; 602 __vector unsigned char rearm0, rearm1, rearm2, rearm3; 603 uint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3; 604 605 /* Extract pkt_info field. */ 606 pinfo0 = (__vector unsigned char) 607 vec_mergeh((__vector unsigned int)cqes[0], 608 (__vector unsigned int)cqes[1]); 609 pinfo1 = (__vector unsigned char) 610 vec_mergeh((__vector unsigned int)cqes[2], 611 (__vector unsigned int)cqes[3]); 612 pinfo = (__vector unsigned char) 613 vec_mergeh((__vector unsigned long)pinfo0, 614 (__vector unsigned long)pinfo1); 615 616 /* Extract hdr_type_etc field. */ 617 pinfo0 = (__vector unsigned char) 618 vec_mergel((__vector unsigned int)cqes[0], 619 (__vector unsigned int)cqes[1]); 620 pinfo1 = (__vector unsigned char) 621 vec_mergel((__vector unsigned int)cqes[2], 622 (__vector unsigned int)cqes[3]); 623 ptype = (__vector unsigned char) 624 vec_mergeh((__vector unsigned long)pinfo0, 625 (__vector unsigned long)pinfo1); 626 627 if (rxq->mark) { 628 const __vector unsigned char pinfo_ft_mask = 629 (__vector unsigned char)(__vector unsigned int){ 630 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00}; 631 const __vector unsigned char fdir_flags = 632 (__vector unsigned char)(__vector unsigned int){ 633 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR, 634 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR}; 635 __vector unsigned char fdir_id_flags = 636 (__vector unsigned char)(__vector unsigned int){ 637 rxq->mark_flag, rxq->mark_flag, 638 rxq->mark_flag, rxq->mark_flag}; 639 __vector unsigned char flow_tag, invalid_mask; 640 641 flow_tag = (__vector unsigned char) 642 vec_and((__vector unsigned long)pinfo, 643 (__vector unsigned long)pinfo_ft_mask); 644 645 /* Check if flow tag is non-zero then set RTE_MBUF_F_RX_FDIR. */ 646 invalid_mask = (__vector unsigned char) 647 vec_cmpeq((__vector unsigned int)flow_tag, 648 (__vector unsigned int)zero); 649 ol_flags = (__vector unsigned char) 650 vec_or((__vector unsigned long)ol_flags, 651 (__vector unsigned long) 652 vec_andc((__vector unsigned long)fdir_flags, 653 (__vector unsigned long)invalid_mask)); 654 655 /* Mask out invalid entries. */ 656 fdir_id_flags = (__vector unsigned char) 657 vec_andc((__vector unsigned long)fdir_id_flags, 658 (__vector unsigned long)invalid_mask); 659 660 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */ 661 ol_flags = (__vector unsigned char) 662 vec_or((__vector unsigned long)ol_flags, 663 (__vector unsigned long) 664 vec_andc((__vector unsigned long)fdir_id_flags, 665 (__vector unsigned long) 666 vec_cmpeq((__vector unsigned int)flow_tag, 667 (__vector unsigned int)pinfo_ft_mask))); 668 } 669 /* 670 * Merge the two fields to generate the following: 671 * bit[1] = l3_ok 672 * bit[2] = l4_ok 673 * bit[8] = cv 674 * bit[11:10] = l3_hdr_type 675 * bit[14:12] = l4_hdr_type 676 * bit[15] = ip_frag 677 * bit[16] = tunneled 678 * bit[17] = outer_l3_type 679 */ 680 ptype = (__vector unsigned char) 681 vec_and((__vector unsigned long)ptype, 682 (__vector unsigned long)ptype_mask); 683 pinfo = (__vector unsigned char) 684 vec_and((__vector unsigned long)pinfo, 685 (__vector unsigned long)pinfo_mask); 686 pinfo = (__vector unsigned char) 687 vec_sl((__vector unsigned int)pinfo, 688 (__vector unsigned int){16, 16, 16, 16}); 689 690 /* Make pinfo has merged fields for ol_flags calculation. */ 691 pinfo = (__vector unsigned char) 692 vec_or((__vector unsigned long)ptype, 693 (__vector unsigned long)pinfo); 694 ptype = (__vector unsigned char) 695 vec_sr((__vector unsigned int)pinfo, 696 (__vector unsigned int){10, 10, 10, 10}); 697 ptype = (__vector unsigned char) 698 vec_packs((__vector unsigned int)ptype, 699 (__vector unsigned int)zero); 700 701 /* Errored packets will have RTE_PTYPE_ALL_MASK. */ 702 op_err = (__vector unsigned char) 703 vec_sr((__vector unsigned short)op_err, 704 (__vector unsigned short){8, 8, 8, 8, 8, 8, 8, 8}); 705 ptype = (__vector unsigned char) 706 vec_or((__vector unsigned long)ptype, 707 (__vector unsigned long)op_err); 708 709 pt_idx0 = (uint8_t)((__vector unsigned char)ptype)[0]; 710 pt_idx1 = (uint8_t)((__vector unsigned char)ptype)[2]; 711 pt_idx2 = (uint8_t)((__vector unsigned char)ptype)[4]; 712 pt_idx3 = (uint8_t)((__vector unsigned char)ptype)[6]; 713 714 pkts[0]->packet_type = mlx5_ptype_table[pt_idx0] | 715 !!(pt_idx0 & (1 << 6)) * rxq->tunnel; 716 pkts[1]->packet_type = mlx5_ptype_table[pt_idx1] | 717 !!(pt_idx1 & (1 << 6)) * rxq->tunnel; 718 pkts[2]->packet_type = mlx5_ptype_table[pt_idx2] | 719 !!(pt_idx2 & (1 << 6)) * rxq->tunnel; 720 pkts[3]->packet_type = mlx5_ptype_table[pt_idx3] | 721 !!(pt_idx3 & (1 << 6)) * rxq->tunnel; 722 723 /* Fill flags for checksum and VLAN. */ 724 pinfo = (__vector unsigned char) 725 vec_and((__vector unsigned long)pinfo, 726 (__vector unsigned long)ptype_ol_mask); 727 pinfo = vec_perm(cv_flag_sel, zero, pinfo); 728 729 /* Locate checksum flags at byte[2:1] and merge with VLAN flags. */ 730 cv_flags = (__vector unsigned char) 731 vec_sl((__vector unsigned int)pinfo, 732 (__vector unsigned int){9, 9, 9, 9}); 733 cv_flags = (__vector unsigned char) 734 vec_or((__vector unsigned long)pinfo, 735 (__vector unsigned long)cv_flags); 736 737 /* Move back flags to start from byte[0]. */ 738 cv_flags = (__vector unsigned char) 739 vec_sr((__vector unsigned int)cv_flags, 740 (__vector unsigned int){8, 8, 8, 8}); 741 742 /* Mask out garbage bits. */ 743 cv_flags = (__vector unsigned char) 744 vec_and((__vector unsigned long)cv_flags, 745 (__vector unsigned long)cv_mask); 746 747 /* Merge to ol_flags. */ 748 ol_flags = (__vector unsigned char) 749 vec_or((__vector unsigned long)ol_flags, 750 (__vector unsigned long)cv_flags); 751 752 /* Merge mbuf_init and ol_flags. */ 753 rearm0 = (__vector unsigned char) 754 vec_sel((__vector unsigned short)mbuf_init, 755 (__vector unsigned short) 756 vec_slo((__vector unsigned short)ol_flags, 757 (__vector unsigned char){64}), rearm_sel_mask); 758 rearm1 = (__vector unsigned char) 759 vec_sel((__vector unsigned short)mbuf_init, 760 (__vector unsigned short) 761 vec_slo((__vector unsigned short)ol_flags, 762 (__vector unsigned char){32}), rearm_sel_mask); 763 rearm2 = (__vector unsigned char) 764 vec_sel((__vector unsigned short)mbuf_init, 765 (__vector unsigned short)ol_flags, rearm_sel_mask); 766 rearm3 = (__vector unsigned char) 767 vec_sel((__vector unsigned short)mbuf_init, 768 (__vector unsigned short) 769 vec_sro((__vector unsigned short)ol_flags, 770 (__vector unsigned char){32}), rearm_sel_mask); 771 772 /* Write 8B rearm_data and 8B ol_flags. */ 773 vec_vsx_st(rearm0, 0, 774 (__vector unsigned char *)&pkts[0]->rearm_data); 775 vec_vsx_st(rearm1, 0, 776 (__vector unsigned char *)&pkts[1]->rearm_data); 777 vec_vsx_st(rearm2, 0, 778 (__vector unsigned char *)&pkts[2]->rearm_data); 779 vec_vsx_st(rearm3, 0, 780 (__vector unsigned char *)&pkts[3]->rearm_data); 781 } 782 783 /** 784 * Process a non-compressed completion and fill in mbufs in RX SW ring 785 * with data extracted from the title completion descriptor. 786 * 787 * @param rxq 788 * Pointer to RX queue structure. 789 * @param cq 790 * Pointer to completion array having a non-compressed completion at first. 791 * @param elts 792 * Pointer to SW ring to be filled. The first mbuf has to be pre-built from 793 * the title completion descriptor to be copied to the rest of mbufs. 794 * @param[out] pkts 795 * Array to store received packets. 796 * @param pkts_n 797 * Maximum number of packets in array. 798 * @param[out] err 799 * Pointer to a flag. Set non-zero value if pkts array has at least one error 800 * packet to handle. 801 * @param[out] comp 802 * Pointer to a index. Set it to the first compressed completion if any. 803 * 804 * @return 805 * Number of CQEs successfully processed. 806 */ 807 static inline uint16_t 808 rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 809 struct rte_mbuf **elts, struct rte_mbuf **pkts, 810 uint16_t pkts_n, uint64_t *err, uint64_t *comp) 811 { 812 const uint16_t q_n = 1 << rxq->cqe_n; 813 const uint16_t q_mask = q_n - 1; 814 unsigned int pos, adj; 815 uint64_t n = 0; 816 uint64_t comp_idx = MLX5_VPMD_DESCS_PER_LOOP; 817 uint16_t nocmp_n = 0; 818 const uint8_t vic = rxq->cq_ci >> rxq->cqe_n; 819 unsigned int own = !(rxq->cq_ci & (q_mask + 1)); 820 const __vector unsigned char zero = (__vector unsigned char){0}; 821 const __vector unsigned char ones = vec_splat_u8(-1); 822 const __vector unsigned char vic_check = 823 (__vector unsigned char)(__vector unsigned long){ 824 0x00ff000000ff0000LL, 0x00ff000000ff0000LL}; 825 const __vector unsigned char owner_check = 826 (__vector unsigned char)(__vector unsigned long){ 827 0x0100000001000000LL, 0x0100000001000000LL}; 828 const __vector unsigned char opcode_check = 829 (__vector unsigned char)(__vector unsigned long){ 830 0xf0000000f0000000LL, 0xf0000000f0000000LL}; 831 const __vector unsigned char format_check = 832 (__vector unsigned char)(__vector unsigned long){ 833 0x0c0000000c000000LL, 0x0c0000000c000000LL}; 834 const __vector unsigned char resp_err_check = 835 (__vector unsigned char)(__vector unsigned long){ 836 0xe0000000e0000000LL, 0xe0000000e0000000LL}; 837 #ifdef MLX5_PMD_SOFT_COUNTERS 838 uint32_t rcvd_byte = 0; 839 /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */ 840 const __vector unsigned char len_shuf_mask = (__vector unsigned char){ 841 1, 0, 5, 4, 842 9, 8, 13, 12, 843 -1, -1, -1, -1, 844 -1, -1, -1, -1}; 845 #endif 846 /* Mask to shuffle from extracted CQE to mbuf. */ 847 const __vector unsigned char shuf_mask = (__vector unsigned char){ 848 5, 4, /* bswap16, pkt_len */ 849 -1, -1, /* zero out 2nd half of pkt_len */ 850 5, 4, /* bswap16, data_len */ 851 11, 10, /* bswap16, vlan+tci */ 852 15, 14, 13, 12, /* bswap32, rss */ 853 1, 2, 3, -1}; /* fdir.hi */ 854 /* Mask to blend from the last Qword to the first DQword. */ 855 /* Mask to blend from the last Qword to the first DQword. */ 856 const __vector unsigned char blend_mask = (__vector unsigned char){ 857 -1, 0, 0, 0, 858 0, 0, 0, 0, 859 -1, -1, -1, -1, 860 -1, -1, -1, -1}; 861 const __vector unsigned char crc_adj = 862 (__vector unsigned char)(__vector unsigned short){ 863 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 864 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0, 0, 0}; 865 const __vector unsigned char flow_mark_adj = 866 (__vector unsigned char)(__vector unsigned int){ 867 0, 0, 0, rxq->mark * (-1)}; 868 const __vector unsigned short cqe_sel_mask1 = 869 (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0}; 870 const __vector unsigned short cqe_sel_mask2 = 871 (__vector unsigned short){0, 0, 0xffff, 0, 0, 0, 0, 0}; 872 const __vector unsigned char validity = (__vector unsigned char){ 873 0, 0, vic, 0, 874 0, 0, vic, 0, 875 0, 0, vic, 0, 876 0, 0, vic, 0}; 877 const __vector unsigned char ownership = (__vector unsigned char){ 878 0, 0, 0, own, 879 0, 0, 0, own, 880 0, 0, 0, own, 881 0, 0, 0, own}; 882 /* 883 * A. load first Qword (8bytes) in one loop. 884 * B. copy 4 mbuf pointers from elts ring to returning pkts. 885 * C. load remaining CQE data and extract necessary fields. 886 * Final 16bytes cqes[] extracted from original 64bytes CQE has the 887 * following structure: 888 * struct { 889 * uint8_t pkt_info; 890 * uint8_t flow_tag[3]; 891 * uint16_t byte_cnt; 892 * uint8_t validity_iteration_count; 893 * uint8_t op_own; 894 * uint16_t hdr_type_etc; 895 * uint16_t vlan_info; 896 * uint32_t rx_has_res; 897 * } c; 898 * D. fill in mbuf. 899 * E. get valid CQEs. 900 * F. find compressed CQE. 901 */ 902 for (pos = 0; 903 pos < pkts_n; 904 pos += MLX5_VPMD_DESCS_PER_LOOP) { 905 __vector unsigned char cqes[MLX5_VPMD_DESCS_PER_LOOP]; 906 __vector unsigned char cqe_tmp1, cqe_tmp2; 907 __vector unsigned char pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3; 908 __vector unsigned char op_own, op_own_tmp1, op_own_tmp2; 909 __vector unsigned char opcode, owner_mask, invalid_mask; 910 __vector unsigned char comp_mask, mini_mask; 911 __vector unsigned char mask; 912 #ifdef MLX5_PMD_SOFT_COUNTERS 913 const __vector unsigned char lower_half = { 914 0, 1, 4, 5, 8, 9, 12, 13, 915 16, 17, 20, 21, 24, 25, 28, 29}; 916 const __vector unsigned char upper_half = { 917 2, 3, 6, 7, 10, 11, 14, 15, 918 18, 19, 22, 23, 26, 27, 30, 31}; 919 const __vector unsigned long shmax = {64, 64}; 920 __vector unsigned char byte_cnt; 921 __vector unsigned short left, right; 922 __vector unsigned long lshift; 923 __vector __attribute__((altivec(bool__))) 924 unsigned long shmask; 925 #endif 926 __vector unsigned char mbp1, mbp2; 927 __vector unsigned char p = 928 (__vector unsigned char)(__vector unsigned short){ 929 0, 1, 2, 3, 0, 0, 0, 0}; 930 unsigned int p1, p2, p3; 931 932 /* Prefetch next 4 CQEs. */ 933 if (pkts_n - pos >= 2 * MLX5_VPMD_DESCS_PER_LOOP) { 934 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP]); 935 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 1]); 936 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 2]); 937 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 3]); 938 } 939 940 /* A.0 do not cross the end of CQ. */ 941 mask = (__vector unsigned char)(__vector unsigned long){ 942 (pkts_n - pos) * sizeof(uint16_t) * 8, 0}; 943 944 { 945 __vector unsigned long lshift; 946 __vector __attribute__((altivec(bool__))) 947 unsigned long shmask; 948 const __vector unsigned long shmax = {64, 64}; 949 950 lshift = vec_splat((__vector unsigned long)mask, 0); 951 shmask = vec_cmpgt(shmax, lshift); 952 mask = (__vector unsigned char) 953 vec_sl((__vector unsigned long)ones, lshift); 954 mask = (__vector unsigned char) 955 vec_sel((__vector unsigned long)shmask, 956 (__vector unsigned long)mask, shmask); 957 } 958 959 p = (__vector unsigned char) 960 vec_andc((__vector unsigned long)p, 961 (__vector unsigned long)mask); 962 963 /* A.1 load cqes. */ 964 p3 = (unsigned int)((__vector unsigned short)p)[3]; 965 cqes[3] = (__vector unsigned char)(__vector unsigned long){ 966 *(__rte_aligned(8) unsigned long *) 967 &cq[pos + p3].sop_drop_qpn, 0LL}; 968 rte_compiler_barrier(); 969 970 p2 = (unsigned int)((__vector unsigned short)p)[2]; 971 cqes[2] = (__vector unsigned char)(__vector unsigned long){ 972 *(__rte_aligned(8) unsigned long *) 973 &cq[pos + p2].sop_drop_qpn, 0LL}; 974 rte_compiler_barrier(); 975 976 /* B.1 load mbuf pointers. */ 977 mbp1 = (__vector unsigned char)vec_vsx_ld(0, 978 (signed int const *)&elts[pos]); 979 mbp2 = (__vector unsigned char)vec_vsx_ld(0, 980 (signed int const *)&elts[pos + 2]); 981 982 /* A.1 load a block having op_own. */ 983 p1 = (unsigned int)((__vector unsigned short)p)[1]; 984 cqes[1] = (__vector unsigned char)(__vector unsigned long){ 985 *(__rte_aligned(8) unsigned long *) 986 &cq[pos + p1].sop_drop_qpn, 0LL}; 987 rte_compiler_barrier(); 988 989 cqes[0] = (__vector unsigned char)(__vector unsigned long){ 990 *(__rte_aligned(8) unsigned long *) 991 &cq[pos].sop_drop_qpn, 0LL}; 992 rte_compiler_barrier(); 993 994 /* B.2 copy mbuf pointers. */ 995 *(__vector unsigned char *)&pkts[pos] = mbp1; 996 *(__vector unsigned char *)&pkts[pos + 2] = mbp2; 997 rte_io_rmb(); 998 999 /* C.1 load remaining CQE data and extract necessary fields. */ 1000 cqe_tmp2 = *(__vector unsigned char *) 1001 &cq[pos + p3].pkt_info; 1002 cqe_tmp1 = *(__vector unsigned char *) 1003 &cq[pos + p2].pkt_info; 1004 cqes[3] = vec_sel(cqes[3], cqe_tmp2, blend_mask); 1005 cqes[2] = vec_sel(cqes[2], cqe_tmp1, blend_mask); 1006 cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0, 1007 (signed int const *)&cq[pos + p3].csum); 1008 cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0, 1009 (signed int const *)&cq[pos + p2].csum); 1010 cqes[3] = (__vector unsigned char) 1011 vec_sel((__vector unsigned short)cqes[3], 1012 (__vector unsigned short)cqe_tmp2, cqe_sel_mask1); 1013 cqes[2] = (__vector unsigned char) 1014 vec_sel((__vector unsigned short)cqes[2], 1015 (__vector unsigned short)cqe_tmp1, cqe_sel_mask1); 1016 cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){ 1017 *(__rte_aligned(8) unsigned long *) 1018 &cq[pos + p3].rsvd4[2], 0LL}; 1019 cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){ 1020 *(__rte_aligned(8) unsigned long *) 1021 &cq[pos + p2].rsvd4[2], 0LL}; 1022 cqes[3] = (__vector unsigned char) 1023 vec_sel((__vector unsigned short)cqes[3], 1024 (__vector unsigned short)cqe_tmp2, 1025 (__vector unsigned short)cqe_sel_mask2); 1026 cqes[2] = (__vector unsigned char) 1027 vec_sel((__vector unsigned short)cqes[2], 1028 (__vector unsigned short)cqe_tmp1, 1029 (__vector unsigned short)cqe_sel_mask2); 1030 1031 /* C.2 generate final structure for mbuf with swapping bytes. */ 1032 pkt_mb3 = vec_perm(cqes[3], zero, shuf_mask); 1033 pkt_mb2 = vec_perm(cqes[2], zero, shuf_mask); 1034 1035 /* C.3 adjust CRC length. */ 1036 pkt_mb3 = (__vector unsigned char) 1037 ((__vector unsigned short)pkt_mb3 - 1038 (__vector unsigned short)crc_adj); 1039 pkt_mb2 = (__vector unsigned char) 1040 ((__vector unsigned short)pkt_mb2 - 1041 (__vector unsigned short)crc_adj); 1042 1043 /* C.4 adjust flow mark. */ 1044 pkt_mb3 = (__vector unsigned char) 1045 ((__vector unsigned int)pkt_mb3 + 1046 (__vector unsigned int)flow_mark_adj); 1047 pkt_mb2 = (__vector unsigned char) 1048 ((__vector unsigned int)pkt_mb2 + 1049 (__vector unsigned int)flow_mark_adj); 1050 1051 /* D.1 fill in mbuf - rx_descriptor_fields1. */ 1052 *(__vector unsigned char *) 1053 &pkts[pos + 3]->pkt_len = pkt_mb3; 1054 *(__vector unsigned char *) 1055 &pkts[pos + 2]->pkt_len = pkt_mb2; 1056 1057 /* E.1 extract op_own field. */ 1058 op_own_tmp2 = (__vector unsigned char) 1059 vec_mergeh((__vector unsigned int)cqes[2], 1060 (__vector unsigned int)cqes[3]); 1061 1062 /* C.1 load remaining CQE data and extract necessary fields. */ 1063 cqe_tmp2 = *(__vector unsigned char *) 1064 &cq[pos + p1].pkt_info; 1065 cqe_tmp1 = *(__vector unsigned char *) 1066 &cq[pos].pkt_info; 1067 cqes[1] = vec_sel(cqes[1], cqe_tmp2, blend_mask); 1068 cqes[0] = vec_sel(cqes[0], cqe_tmp2, blend_mask); 1069 cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0, 1070 (signed int const *)&cq[pos + p1].csum); 1071 cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0, 1072 (signed int const *)&cq[pos].csum); 1073 cqes[1] = (__vector unsigned char) 1074 vec_sel((__vector unsigned short)cqes[1], 1075 (__vector unsigned short)cqe_tmp2, cqe_sel_mask1); 1076 cqes[0] = (__vector unsigned char) 1077 vec_sel((__vector unsigned short)cqes[0], 1078 (__vector unsigned short)cqe_tmp1, cqe_sel_mask1); 1079 cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){ 1080 *(__rte_aligned(8) unsigned long *) 1081 &cq[pos + p1].rsvd4[2], 0LL}; 1082 cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){ 1083 *(__rte_aligned(8) unsigned long *) 1084 &cq[pos].rsvd4[2], 0LL}; 1085 cqes[1] = (__vector unsigned char) 1086 vec_sel((__vector unsigned short)cqes[1], 1087 (__vector unsigned short)cqe_tmp2, cqe_sel_mask2); 1088 cqes[0] = (__vector unsigned char) 1089 vec_sel((__vector unsigned short)cqes[0], 1090 (__vector unsigned short)cqe_tmp1, cqe_sel_mask2); 1091 1092 /* C.2 generate final structure for mbuf with swapping bytes. */ 1093 pkt_mb1 = vec_perm(cqes[1], zero, shuf_mask); 1094 pkt_mb0 = vec_perm(cqes[0], zero, shuf_mask); 1095 1096 /* C.3 adjust CRC length. */ 1097 pkt_mb1 = (__vector unsigned char) 1098 ((__vector unsigned short)pkt_mb1 - 1099 (__vector unsigned short)crc_adj); 1100 pkt_mb0 = (__vector unsigned char) 1101 ((__vector unsigned short)pkt_mb0 - 1102 (__vector unsigned short)crc_adj); 1103 1104 /* C.4 adjust flow mark. */ 1105 pkt_mb1 = (__vector unsigned char) 1106 ((__vector unsigned int)pkt_mb1 + 1107 (__vector unsigned int)flow_mark_adj); 1108 pkt_mb0 = (__vector unsigned char) 1109 ((__vector unsigned int)pkt_mb0 + 1110 (__vector unsigned int)flow_mark_adj); 1111 1112 /* E.1 extract op_own byte. */ 1113 op_own_tmp1 = (__vector unsigned char) 1114 vec_mergeh((__vector unsigned int)cqes[0], 1115 (__vector unsigned int)cqes[1]); 1116 op_own = (__vector unsigned char) 1117 vec_mergel((__vector unsigned long)op_own_tmp1, 1118 (__vector unsigned long)op_own_tmp2); 1119 1120 /* D.1 fill in mbuf - rx_descriptor_fields1. */ 1121 *(__vector unsigned char *) 1122 &pkts[pos + 1]->pkt_len = pkt_mb1; 1123 *(__vector unsigned char *) 1124 &pkts[pos]->pkt_len = pkt_mb0; 1125 1126 /* E.2 mask out CQEs belonging to HW. */ 1127 if (rxq->cqe_comp_layout) { 1128 owner_mask = (__vector unsigned char) 1129 vec_and((__vector unsigned long)op_own, 1130 (__vector unsigned long)vic_check); 1131 owner_mask = (__vector unsigned char) 1132 vec_cmpeq((__vector unsigned int)owner_mask, 1133 (__vector unsigned int)validity); 1134 owner_mask = (__vector unsigned char) 1135 vec_xor((__vector unsigned long)owner_mask, 1136 (__vector unsigned long)ones); 1137 } else { 1138 owner_mask = (__vector unsigned char) 1139 vec_and((__vector unsigned long)op_own, 1140 (__vector unsigned long)owner_check); 1141 owner_mask = (__vector unsigned char) 1142 vec_cmpeq((__vector unsigned int)owner_mask, 1143 (__vector unsigned int)ownership); 1144 } 1145 owner_mask = (__vector unsigned char) 1146 vec_packs((__vector unsigned int)owner_mask, 1147 (__vector unsigned int)zero); 1148 1149 /* E.3 get mask for invalidated CQEs. */ 1150 opcode = (__vector unsigned char) 1151 vec_and((__vector unsigned long)op_own, 1152 (__vector unsigned long)opcode_check); 1153 invalid_mask = (__vector unsigned char) 1154 vec_cmpeq((__vector unsigned int)opcode_check, 1155 (__vector unsigned int)opcode); 1156 invalid_mask = (__vector unsigned char) 1157 vec_packs((__vector unsigned int)invalid_mask, 1158 (__vector unsigned int)zero); 1159 1160 /* E.4 mask out beyond boundary. */ 1161 invalid_mask = (__vector unsigned char) 1162 vec_or((__vector unsigned long)invalid_mask, 1163 (__vector unsigned long)mask); 1164 1165 /* E.5 merge invalid_mask with invalid owner. */ 1166 invalid_mask = (__vector unsigned char) 1167 vec_or((__vector unsigned long)invalid_mask, 1168 (__vector unsigned long)owner_mask); 1169 1170 /* F.1 find compressed CQE format. */ 1171 comp_mask = (__vector unsigned char) 1172 vec_and((__vector unsigned long)op_own, 1173 (__vector unsigned long)format_check); 1174 comp_mask = (__vector unsigned char) 1175 vec_cmpeq((__vector unsigned int)comp_mask, 1176 (__vector unsigned int)format_check); 1177 comp_mask = (__vector unsigned char) 1178 vec_packs((__vector unsigned int)comp_mask, 1179 (__vector unsigned int)zero); 1180 1181 /* F.2 mask out invalid entries. */ 1182 comp_mask = (__vector unsigned char) 1183 vec_andc((__vector unsigned long)comp_mask, 1184 (__vector unsigned long)invalid_mask); 1185 comp_idx = ((__vector unsigned long)comp_mask)[0]; 1186 1187 /* F.3 get the first compressed CQE. */ 1188 comp_idx = comp_idx ? rte_ctz64(comp_idx) / 1189 (sizeof(uint16_t) * 8) : MLX5_VPMD_DESCS_PER_LOOP; 1190 1191 /* E.6 mask out entries after the compressed CQE. */ 1192 mask = (__vector unsigned char)(__vector unsigned long){ 1193 (comp_idx * sizeof(uint16_t) * 8), 0}; 1194 lshift = vec_splat((__vector unsigned long)mask, 0); 1195 shmask = vec_cmpgt(shmax, lshift); 1196 mask = (__vector unsigned char) 1197 vec_sl((__vector unsigned long)ones, lshift); 1198 mask = (__vector unsigned char) 1199 vec_sel((__vector unsigned long)shmask, 1200 (__vector unsigned long)mask, shmask); 1201 invalid_mask = (__vector unsigned char) 1202 vec_or((__vector unsigned long)invalid_mask, 1203 (__vector unsigned long)mask); 1204 1205 /* E.7 count non-compressed valid CQEs. */ 1206 n = ((__vector unsigned long)invalid_mask)[0]; 1207 n = n ? rte_ctz64(n) / (sizeof(uint16_t) * 8) : 1208 MLX5_VPMD_DESCS_PER_LOOP; 1209 nocmp_n += n; 1210 1211 /* D.2 get the final invalid mask. */ 1212 mask = (__vector unsigned char)(__vector unsigned long){ 1213 (n * sizeof(uint16_t) * 8), 0}; 1214 lshift = vec_splat((__vector unsigned long)mask, 0); 1215 shmask = vec_cmpgt(shmax, lshift); 1216 mask = (__vector unsigned char) 1217 vec_sl((__vector unsigned long)ones, lshift); 1218 mask = (__vector unsigned char) 1219 vec_sel((__vector unsigned long)shmask, 1220 (__vector unsigned long)mask, shmask); 1221 invalid_mask = (__vector unsigned char) 1222 vec_or((__vector unsigned long)invalid_mask, 1223 (__vector unsigned long)mask); 1224 1225 /* D.3 check error in opcode. */ 1226 adj = (!rxq->cqe_comp_layout && 1227 comp_idx != MLX5_VPMD_DESCS_PER_LOOP && comp_idx == n); 1228 mask = (__vector unsigned char)(__vector unsigned long){ 1229 (adj * sizeof(uint16_t) * 8), 0}; 1230 lshift = vec_splat((__vector unsigned long)mask, 0); 1231 shmask = vec_cmpgt(shmax, lshift); 1232 mini_mask = (__vector unsigned char) 1233 vec_sl((__vector unsigned long)invalid_mask, lshift); 1234 mini_mask = (__vector unsigned char) 1235 vec_sel((__vector unsigned long)shmask, 1236 (__vector unsigned long)mini_mask, shmask); 1237 opcode = (__vector unsigned char) 1238 vec_cmpeq((__vector unsigned int)resp_err_check, 1239 (__vector unsigned int)opcode); 1240 opcode = (__vector unsigned char) 1241 vec_packs((__vector unsigned int)opcode, 1242 (__vector unsigned int)zero); 1243 opcode = (__vector unsigned char) 1244 vec_andc((__vector unsigned long)opcode, 1245 (__vector unsigned long)mini_mask); 1246 1247 /* D.4 mark if any error is set */ 1248 *err |= ((__vector unsigned long)opcode)[0]; 1249 1250 /* D.5 fill in mbuf - rearm_data and packet_type. */ 1251 rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]); 1252 if (unlikely(rxq->shared)) { 1253 pkts[pos]->port = cq[pos].user_index_low; 1254 pkts[pos + p1]->port = cq[pos + p1].user_index_low; 1255 pkts[pos + p2]->port = cq[pos + p2].user_index_low; 1256 pkts[pos + p3]->port = cq[pos + p3].user_index_low; 1257 } 1258 if (rxq->hw_timestamp) { 1259 int offset = rxq->timestamp_offset; 1260 if (rxq->rt_timestamp) { 1261 struct mlx5_dev_ctx_shared *sh = rxq->sh; 1262 uint64_t ts; 1263 1264 ts = rte_be_to_cpu_64(cq[pos].timestamp); 1265 mlx5_timestamp_set(pkts[pos], offset, 1266 mlx5_txpp_convert_rx_ts(sh, ts)); 1267 ts = rte_be_to_cpu_64(cq[pos + p1].timestamp); 1268 mlx5_timestamp_set(pkts[pos + 1], offset, 1269 mlx5_txpp_convert_rx_ts(sh, ts)); 1270 ts = rte_be_to_cpu_64(cq[pos + p2].timestamp); 1271 mlx5_timestamp_set(pkts[pos + 2], offset, 1272 mlx5_txpp_convert_rx_ts(sh, ts)); 1273 ts = rte_be_to_cpu_64(cq[pos + p3].timestamp); 1274 mlx5_timestamp_set(pkts[pos + 3], offset, 1275 mlx5_txpp_convert_rx_ts(sh, ts)); 1276 } else { 1277 mlx5_timestamp_set(pkts[pos], offset, 1278 rte_be_to_cpu_64(cq[pos].timestamp)); 1279 mlx5_timestamp_set(pkts[pos + 1], offset, 1280 rte_be_to_cpu_64(cq[pos + p1].timestamp)); 1281 mlx5_timestamp_set(pkts[pos + 2], offset, 1282 rte_be_to_cpu_64(cq[pos + p2].timestamp)); 1283 mlx5_timestamp_set(pkts[pos + 3], offset, 1284 rte_be_to_cpu_64(cq[pos + p3].timestamp)); 1285 } 1286 } 1287 if (rxq->dynf_meta) { 1288 uint64_t flag = rxq->flow_meta_mask; 1289 int32_t offs = rxq->flow_meta_offset; 1290 uint32_t mask = rxq->flow_meta_port_mask; 1291 uint32_t metadata; 1292 1293 /* This code is subject for further optimization. */ 1294 metadata = rte_be_to_cpu_32 1295 (cq[pos].flow_table_metadata) & mask; 1296 *RTE_MBUF_DYNFIELD(pkts[pos], offs, uint32_t *) = 1297 metadata; 1298 pkts[pos]->ol_flags |= metadata ? flag : 0ULL; 1299 metadata = rte_be_to_cpu_32 1300 (cq[pos + 1].flow_table_metadata) & mask; 1301 *RTE_MBUF_DYNFIELD(pkts[pos + 1], offs, uint32_t *) = 1302 metadata; 1303 pkts[pos + 1]->ol_flags |= metadata ? flag : 0ULL; 1304 metadata = rte_be_to_cpu_32 1305 (cq[pos + 2].flow_table_metadata) & mask; 1306 *RTE_MBUF_DYNFIELD(pkts[pos + 2], offs, uint32_t *) = 1307 metadata; 1308 pkts[pos + 2]->ol_flags |= metadata ? flag : 0ULL; 1309 metadata = rte_be_to_cpu_32 1310 (cq[pos + 3].flow_table_metadata) & mask; 1311 *RTE_MBUF_DYNFIELD(pkts[pos + 3], offs, uint32_t *) = 1312 metadata; 1313 pkts[pos + 3]->ol_flags |= metadata ? flag : 0ULL; 1314 } 1315 #ifdef MLX5_PMD_SOFT_COUNTERS 1316 /* Add up received bytes count. */ 1317 byte_cnt = vec_perm(op_own, zero, len_shuf_mask); 1318 byte_cnt = (__vector unsigned char) 1319 vec_andc((__vector unsigned long)byte_cnt, 1320 (__vector unsigned long)invalid_mask); 1321 left = vec_perm((__vector unsigned short)byte_cnt, 1322 (__vector unsigned short)zero, lower_half); 1323 right = vec_perm((__vector unsigned short)byte_cnt, 1324 (__vector unsigned short)zero, upper_half); 1325 byte_cnt = (__vector unsigned char)vec_add(left, right); 1326 left = vec_perm((__vector unsigned short)byte_cnt, 1327 (__vector unsigned short)zero, lower_half); 1328 right = vec_perm((__vector unsigned short)byte_cnt, 1329 (__vector unsigned short)zero, upper_half); 1330 byte_cnt = (__vector unsigned char)vec_add(left, right); 1331 rcvd_byte += ((__vector unsigned long)byte_cnt)[0]; 1332 #endif 1333 1334 /* 1335 * Break the loop unless more valid CQE is expected, or if 1336 * there's a compressed CQE. 1337 */ 1338 if (n != MLX5_VPMD_DESCS_PER_LOOP) 1339 break; 1340 } 1341 #ifdef MLX5_PMD_SOFT_COUNTERS 1342 rxq->stats.ipackets += nocmp_n; 1343 rxq->stats.ibytes += rcvd_byte; 1344 #endif 1345 if (comp_idx == n) 1346 *comp = comp_idx; 1347 return nocmp_n; 1348 } 1349 1350 #endif /* RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ */ 1351