1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017 6WIND S.A. 3 * Copyright 2017 Mellanox Technologies, Ltd 4 */ 5 6 #ifndef RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ 7 #define RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ 8 9 #include <stdint.h> 10 #include <string.h> 11 #include <stdlib.h> 12 13 #include <rte_altivec.h> 14 15 #include <rte_mbuf.h> 16 #include <rte_mempool.h> 17 #include <rte_prefetch.h> 18 19 #include <mlx5_prm.h> 20 21 #include "mlx5_defs.h" 22 #include "mlx5.h" 23 #include "mlx5_utils.h" 24 #include "mlx5_rxtx.h" 25 #include "mlx5_rxtx_vec.h" 26 #include "mlx5_autoconf.h" 27 28 /** 29 * Store free buffers to RX SW ring. 30 * 31 * @param elts 32 * Pointer to SW ring to be filled. 33 * @param pkts 34 * Pointer to array of packets to be stored. 35 * @param pkts_n 36 * Number of packets to be stored. 37 */ 38 static inline void 39 rxq_copy_mbuf_v(struct rte_mbuf **elts, struct rte_mbuf **pkts, uint16_t n) 40 { 41 unsigned int pos; 42 uint16_t p = n & -2; 43 44 for (pos = 0; pos < p; pos += 2) { 45 __vector unsigned char mbp; 46 47 mbp = (__vector unsigned char)vec_vsx_ld(0, 48 (signed int const *)&elts[pos]); 49 *(__vector unsigned char *)&pkts[pos] = mbp; 50 } 51 if (n & 1) 52 pkts[pos] = elts[pos]; 53 } 54 55 /** 56 * Decompress a compressed completion and fill in mbufs in RX SW ring with data 57 * extracted from the title completion descriptor. 58 * 59 * @param rxq 60 * Pointer to RX queue structure. 61 * @param cq 62 * Pointer to completion array having a compressed completion at first. 63 * @param elts 64 * Pointer to SW ring to be filled. The first mbuf has to be pre-built from 65 * the title completion descriptor to be copied to the rest of mbufs. 66 * @param keep 67 * Keep unzipping if the next CQE is the miniCQE array. 68 * 69 * @return 70 * Number of mini-CQEs successfully decompressed. 71 */ 72 static inline uint16_t 73 rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 74 struct rte_mbuf **elts, bool keep) 75 { 76 volatile struct mlx5_mini_cqe8 *mcq = 77 (void *)&(cq + !rxq->cqe_comp_layout)->pkt_info; 78 /* Title packet is pre-built. */ 79 struct rte_mbuf *t_pkt = rxq->cqe_comp_layout ? &rxq->title_pkt : elts[0]; 80 const __vector unsigned char zero = (__vector unsigned char){0}; 81 /* Mask to shuffle from extracted mini CQE to mbuf. */ 82 const __vector unsigned char shuf_mask1 = (__vector unsigned char){ 83 -1, -1, -1, -1, /* skip packet_type */ 84 7, 6, -1, -1, /* bswap16, pkt_len */ 85 7, 6, /* bswap16, data_len */ 86 -1, -1, /* skip vlan_tci */ 87 3, 2, 1, 0}; /* bswap32, rss */ 88 const __vector unsigned char shuf_mask2 = (__vector unsigned char){ 89 -1, -1, -1, -1, /* skip packet_type */ 90 15, 14, -1, -1, /* bswap16, pkt_len */ 91 15, 14, /* data_len, bswap16 */ 92 -1, -1, /* skip vlan_tci */ 93 11, 10, 9, 8}; /* bswap32, rss */ 94 /* Restore the compressed count. Must be 16 bits. */ 95 uint16_t mcqe_n = (rxq->cqe_comp_layout) ? 96 (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); 97 uint16_t pkts_n = mcqe_n; 98 const __vector unsigned char rearm = 99 (__vector unsigned char)vec_vsx_ld(0, 100 (signed int const *)&t_pkt->rearm_data); 101 const __vector unsigned char rxdf = 102 (__vector unsigned char)vec_vsx_ld(0, 103 (signed int const *)&t_pkt->rx_descriptor_fields1); 104 const __vector unsigned char crc_adj = 105 (__vector unsigned char)(__vector unsigned short){ 106 0, 0, rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 107 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0}; 108 const __vector unsigned short rxdf_sel_mask = 109 (__vector unsigned short){ 110 0xffff, 0xffff, 0, 0, 0, 0xffff, 0, 0}; 111 __vector unsigned char ol_flags = (__vector unsigned char){0}; 112 __vector unsigned char ol_flags_mask = (__vector unsigned char){0}; 113 unsigned int pos; 114 unsigned int i; 115 unsigned int inv = 0; 116 117 #ifdef MLX5_PMD_SOFT_COUNTERS 118 const __vector unsigned char ones = vec_splat_u8(-1); 119 uint32_t rcvd_byte = 0; 120 /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */ 121 const __vector unsigned char len_shuf_mask = (__vector unsigned char){ 122 3, 2, 11, 10, 123 7, 6, 15, 14, 124 -1, -1, -1, -1, 125 -1, -1, -1, -1}; 126 #endif 127 128 /* 129 * A. load mCQEs into a 128bit register. 130 * B. store rearm data to mbuf. 131 * C. combine data from mCQEs with rx_descriptor_fields1. 132 * D. store rx_descriptor_fields1. 133 * E. store flow tag (rte_flow mark). 134 */ 135 cycle: 136 if (rxq->cqe_comp_layout) 137 rte_prefetch0((void *)(cq + mcqe_n)); 138 for (pos = 0; pos < mcqe_n; ) { 139 __vector unsigned char mcqe1, mcqe2; 140 __vector unsigned char rxdf1, rxdf2; 141 #ifdef MLX5_PMD_SOFT_COUNTERS 142 const __vector unsigned short mcqe_sel_mask = 143 (__vector unsigned short){0, 0, 0xffff, 0xffff, 144 0, 0, 0xfff, 0xffff}; 145 const __vector unsigned char lower_half = { 146 0, 1, 4, 5, 8, 9, 12, 13, 16, 147 17, 20, 21, 24, 25, 28, 29}; 148 const __vector unsigned char upper_half = { 149 2, 3, 6, 7, 10, 11, 14, 15, 150 18, 19, 22, 23, 26, 27, 30, 31}; 151 __vector unsigned short left, right; 152 __vector unsigned char byte_cnt, invalid_mask; 153 __vector unsigned long lshift; 154 __attribute__((altivec(vector__))) 155 __attribute__((altivec(bool__))) 156 unsigned long long shmask; 157 const __vector unsigned long shmax = {64, 64}; 158 #endif 159 160 if (!rxq->cqe_comp_layout) 161 for (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i) 162 if (likely(pos + i < mcqe_n)) 163 rte_prefetch0((void *)(cq + pos + i)); 164 /* A.1 load mCQEs into a 128bit register. */ 165 mcqe1 = (__vector unsigned char)vec_vsx_ld(0, 166 (signed int const *)&mcq[pos % 8]); 167 mcqe2 = (__vector unsigned char)vec_vsx_ld(0, 168 (signed int const *)&mcq[pos % 8 + 2]); 169 170 /* B.1 store rearm data to mbuf. */ 171 *(__vector unsigned char *) 172 &elts[pos]->rearm_data = rearm; 173 *(__vector unsigned char *) 174 &elts[pos + 1]->rearm_data = rearm; 175 176 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */ 177 rxdf1 = vec_perm(mcqe1, zero, shuf_mask1); 178 rxdf2 = vec_perm(mcqe1, zero, shuf_mask2); 179 rxdf1 = (__vector unsigned char) 180 ((__vector unsigned short)rxdf1 - 181 (__vector unsigned short)crc_adj); 182 rxdf2 = (__vector unsigned char) 183 ((__vector unsigned short)rxdf2 - 184 (__vector unsigned short)crc_adj); 185 rxdf1 = (__vector unsigned char) 186 vec_sel((__vector unsigned short)rxdf1, 187 (__vector unsigned short)rxdf, rxdf_sel_mask); 188 rxdf2 = (__vector unsigned char) 189 vec_sel((__vector unsigned short)rxdf2, 190 (__vector unsigned short)rxdf, rxdf_sel_mask); 191 192 /* D.1 store rx_descriptor_fields1. */ 193 *(__vector unsigned char *) 194 &elts[pos]->rx_descriptor_fields1 = rxdf1; 195 *(__vector unsigned char *) 196 &elts[pos + 1]->rx_descriptor_fields1 = rxdf2; 197 198 /* B.1 store rearm data to mbuf. */ 199 *(__vector unsigned char *) 200 &elts[pos + 2]->rearm_data = rearm; 201 *(__vector unsigned char *) 202 &elts[pos + 3]->rearm_data = rearm; 203 204 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */ 205 rxdf1 = vec_perm(mcqe2, zero, shuf_mask1); 206 rxdf2 = vec_perm(mcqe2, zero, shuf_mask2); 207 rxdf1 = (__vector unsigned char) 208 ((__vector unsigned short)rxdf1 - 209 (__vector unsigned short)crc_adj); 210 rxdf2 = (__vector unsigned char) 211 ((__vector unsigned short)rxdf2 - 212 (__vector unsigned short)crc_adj); 213 rxdf1 = (__vector unsigned char) 214 vec_sel((__vector unsigned short)rxdf1, 215 (__vector unsigned short)rxdf, rxdf_sel_mask); 216 rxdf2 = (__vector unsigned char) 217 vec_sel((__vector unsigned short)rxdf2, 218 (__vector unsigned short)rxdf, rxdf_sel_mask); 219 220 /* D.1 store rx_descriptor_fields1. */ 221 *(__vector unsigned char *) 222 &elts[pos + 2]->rx_descriptor_fields1 = rxdf1; 223 *(__vector unsigned char *) 224 &elts[pos + 3]->rx_descriptor_fields1 = rxdf2; 225 226 #ifdef MLX5_PMD_SOFT_COUNTERS 227 invalid_mask = (__vector unsigned char)(__vector unsigned long){ 228 (mcqe_n - pos) * sizeof(uint16_t) * 8, 0}; 229 230 lshift = 231 vec_splat((__vector unsigned long)invalid_mask, 0); 232 shmask = vec_cmpgt(shmax, lshift); 233 invalid_mask = (__vector unsigned char) 234 vec_sl((__vector unsigned long)ones, lshift); 235 invalid_mask = (__vector unsigned char) 236 vec_sel((__vector unsigned long)shmask, 237 (__vector unsigned long)invalid_mask, shmask); 238 239 byte_cnt = (__vector unsigned char) 240 vec_sel((__vector unsigned short) 241 vec_sro((__vector unsigned short)mcqe1, 242 (__vector unsigned char){32}), 243 (__vector unsigned short)mcqe2, mcqe_sel_mask); 244 byte_cnt = vec_perm(byte_cnt, zero, len_shuf_mask); 245 byte_cnt = (__vector unsigned char) 246 vec_andc((__vector unsigned long)byte_cnt, 247 (__vector unsigned long)invalid_mask); 248 left = vec_perm((__vector unsigned short)byte_cnt, 249 (__vector unsigned short)zero, lower_half); 250 right = vec_perm((__vector unsigned short)byte_cnt, 251 (__vector unsigned short)zero, upper_half); 252 byte_cnt = (__vector unsigned char)vec_add(left, right); 253 left = vec_perm((__vector unsigned short)byte_cnt, 254 (__vector unsigned short)zero, lower_half); 255 right = vec_perm((__vector unsigned short)byte_cnt, 256 (__vector unsigned short)zero, upper_half); 257 byte_cnt = (__vector unsigned char)vec_add(left, right); 258 rcvd_byte += ((__vector unsigned long)byte_cnt)[0]; 259 #endif 260 261 if (rxq->mark) { 262 if (rxq->mcqe_format != 263 MLX5_CQE_RESP_FORMAT_FTAG_STRIDX) { 264 const uint32_t flow_tag = t_pkt->hash.fdir.hi; 265 266 /* E.1 store flow tag (rte_flow mark). */ 267 elts[pos]->hash.fdir.hi = flow_tag; 268 elts[pos + 1]->hash.fdir.hi = flow_tag; 269 elts[pos + 2]->hash.fdir.hi = flow_tag; 270 elts[pos + 3]->hash.fdir.hi = flow_tag; 271 } else { 272 const __vector unsigned char flow_mark_adj = 273 (__vector unsigned char) 274 (__vector unsigned int){ 275 -1, -1, -1, -1}; 276 const __vector unsigned char flow_mark_shuf = 277 (__vector unsigned char){ 278 -1, -1, -1, -1, 279 -1, -1, -1, -1, 280 12, 8, 9, -1, 281 4, 0, 1, -1}; 282 const __vector unsigned char ft_mask = 283 (__vector unsigned char) 284 (__vector unsigned int){ 285 0xffffff00, 0xffffff00, 286 0xffffff00, 0xffffff00}; 287 const __vector unsigned char fdir_flags = 288 (__vector unsigned char) 289 (__vector unsigned int){ 290 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR, 291 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR}; 292 const __vector unsigned char fdir_all_flags = 293 (__vector unsigned char) 294 (__vector unsigned int){ 295 RTE_MBUF_F_RX_FDIR | rxq->mark_flag, 296 RTE_MBUF_F_RX_FDIR | rxq->mark_flag, 297 RTE_MBUF_F_RX_FDIR | rxq->mark_flag, 298 RTE_MBUF_F_RX_FDIR | rxq->mark_flag}; 299 __vector unsigned char fdir_id_flags = 300 (__vector unsigned char) 301 (__vector unsigned int){ 302 rxq->mark_flag, rxq->mark_flag, 303 rxq->mark_flag, rxq->mark_flag}; 304 /* Extract flow_tag field. */ 305 __vector unsigned char ftag0 = vec_perm(mcqe1, 306 zero, flow_mark_shuf); 307 __vector unsigned char ftag1 = vec_perm(mcqe2, 308 zero, flow_mark_shuf); 309 __vector unsigned char ftag = 310 (__vector unsigned char) 311 vec_mergel((__vector unsigned int)ftag0, 312 (__vector unsigned int)ftag1); 313 __vector unsigned char invalid_mask = 314 (__vector unsigned char) 315 vec_cmpeq((__vector unsigned int)ftag, 316 (__vector unsigned int)zero); 317 318 ol_flags_mask = (__vector unsigned char) 319 vec_or((__vector unsigned long) 320 ol_flags_mask, 321 (__vector unsigned long)fdir_all_flags); 322 323 /* Set RTE_MBUF_F_RX_FDIR if flow tag is non-zero. */ 324 invalid_mask = (__vector unsigned char) 325 vec_cmpeq((__vector unsigned int)ftag, 326 (__vector unsigned int)zero); 327 ol_flags = (__vector unsigned char) 328 vec_or((__vector unsigned long)ol_flags, 329 (__vector unsigned long) 330 vec_andc((__vector unsigned long) 331 fdir_flags, 332 (__vector unsigned long)invalid_mask)); 333 ol_flags_mask = (__vector unsigned char) 334 vec_or((__vector unsigned long) 335 ol_flags_mask, 336 (__vector unsigned long)fdir_flags); 337 338 /* Mask out invalid entries. */ 339 fdir_id_flags = (__vector unsigned char) 340 vec_andc((__vector unsigned long) 341 fdir_id_flags, 342 (__vector unsigned long)invalid_mask); 343 344 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */ 345 ol_flags = (__vector unsigned char) 346 vec_or((__vector unsigned long)ol_flags, 347 (__vector unsigned long) 348 vec_andc((__vector unsigned long) 349 fdir_id_flags, 350 (__vector unsigned long) 351 vec_cmpeq((__vector unsigned int)ftag, 352 (__vector unsigned int)ft_mask))); 353 354 ftag = (__vector unsigned char) 355 ((__vector unsigned int)ftag + 356 (__vector unsigned int)flow_mark_adj); 357 elts[pos]->hash.fdir.hi = 358 ((__vector unsigned int)ftag)[0]; 359 elts[pos + 1]->hash.fdir.hi = 360 ((__vector unsigned int)ftag)[1]; 361 elts[pos + 2]->hash.fdir.hi = 362 ((__vector unsigned int)ftag)[2]; 363 elts[pos + 3]->hash.fdir.hi = 364 ((__vector unsigned int)ftag)[3]; 365 } 366 } 367 if (unlikely(rxq->mcqe_format != MLX5_CQE_RESP_FORMAT_HASH)) { 368 if (rxq->mcqe_format == 369 MLX5_CQE_RESP_FORMAT_L34H_STRIDX) { 370 const uint8_t pkt_info = 371 (cq->pkt_info & 0x3) << 6; 372 const uint8_t pkt_hdr0 = 373 mcq[pos % 8].hdr_type; 374 const uint8_t pkt_hdr1 = 375 mcq[pos % 8 + 1].hdr_type; 376 const uint8_t pkt_hdr2 = 377 mcq[pos % 8 + 2].hdr_type; 378 const uint8_t pkt_hdr3 = 379 mcq[pos % 8 + 3].hdr_type; 380 const __vector unsigned char vlan_mask = 381 (__vector unsigned char) 382 (__vector unsigned int) { 383 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 384 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 385 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 386 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED)}; 387 const __vector unsigned char cv_mask = 388 (__vector unsigned char) 389 (__vector unsigned int) { 390 MLX5_CQE_VLAN_STRIPPED, 391 MLX5_CQE_VLAN_STRIPPED, 392 MLX5_CQE_VLAN_STRIPPED, 393 MLX5_CQE_VLAN_STRIPPED}; 394 __vector unsigned char pkt_cv = 395 (__vector unsigned char) 396 (__vector unsigned int) { 397 pkt_hdr0 & 0x1, pkt_hdr1 & 0x1, 398 pkt_hdr2 & 0x1, pkt_hdr3 & 0x1}; 399 400 ol_flags_mask = (__vector unsigned char) 401 vec_or((__vector unsigned long) 402 ol_flags_mask, 403 (__vector unsigned long)vlan_mask); 404 ol_flags = (__vector unsigned char) 405 vec_or((__vector unsigned long)ol_flags, 406 (__vector unsigned long) 407 vec_and((__vector unsigned long)vlan_mask, 408 (__vector unsigned long) 409 vec_cmpeq((__vector unsigned int)pkt_cv, 410 (__vector unsigned int)cv_mask))); 411 elts[pos]->packet_type = 412 mlx5_ptype_table[(pkt_hdr0 >> 2) | 413 pkt_info]; 414 elts[pos + 1]->packet_type = 415 mlx5_ptype_table[(pkt_hdr1 >> 2) | 416 pkt_info]; 417 elts[pos + 2]->packet_type = 418 mlx5_ptype_table[(pkt_hdr2 >> 2) | 419 pkt_info]; 420 elts[pos + 3]->packet_type = 421 mlx5_ptype_table[(pkt_hdr3 >> 2) | 422 pkt_info]; 423 if (rxq->tunnel) { 424 elts[pos]->packet_type |= 425 !!(((pkt_hdr0 >> 2) | 426 pkt_info) & (1 << 6)); 427 elts[pos + 1]->packet_type |= 428 !!(((pkt_hdr1 >> 2) | 429 pkt_info) & (1 << 6)); 430 elts[pos + 2]->packet_type |= 431 !!(((pkt_hdr2 >> 2) | 432 pkt_info) & (1 << 6)); 433 elts[pos + 3]->packet_type |= 434 !!(((pkt_hdr3 >> 2) | 435 pkt_info) & (1 << 6)); 436 } 437 } 438 const __vector unsigned char hash_mask = 439 (__vector unsigned char)(__vector unsigned int) { 440 RTE_MBUF_F_RX_RSS_HASH, 441 RTE_MBUF_F_RX_RSS_HASH, 442 RTE_MBUF_F_RX_RSS_HASH, 443 RTE_MBUF_F_RX_RSS_HASH}; 444 const __vector unsigned char rearm_flags = 445 (__vector unsigned char)(__vector unsigned int) { 446 (uint32_t)t_pkt->ol_flags, 447 (uint32_t)t_pkt->ol_flags, 448 (uint32_t)t_pkt->ol_flags, 449 (uint32_t)t_pkt->ol_flags}; 450 451 ol_flags_mask = (__vector unsigned char) 452 vec_or((__vector unsigned long)ol_flags_mask, 453 (__vector unsigned long)hash_mask); 454 ol_flags = (__vector unsigned char) 455 vec_or((__vector unsigned long)ol_flags, 456 (__vector unsigned long) 457 vec_andc((__vector unsigned long)rearm_flags, 458 (__vector unsigned long)ol_flags_mask)); 459 460 elts[pos]->ol_flags = 461 ((__vector unsigned int)ol_flags)[0]; 462 elts[pos + 1]->ol_flags = 463 ((__vector unsigned int)ol_flags)[1]; 464 elts[pos + 2]->ol_flags = 465 ((__vector unsigned int)ol_flags)[2]; 466 elts[pos + 3]->ol_flags = 467 ((__vector unsigned int)ol_flags)[3]; 468 elts[pos]->hash.rss = 0; 469 elts[pos + 1]->hash.rss = 0; 470 elts[pos + 2]->hash.rss = 0; 471 elts[pos + 3]->hash.rss = 0; 472 } 473 if (rxq->dynf_meta) { 474 int32_t offs = rxq->flow_meta_offset; 475 const uint32_t meta = 476 *RTE_MBUF_DYNFIELD(t_pkt, offs, uint32_t *); 477 478 /* Check if title packet has valid metadata. */ 479 if (meta) { 480 MLX5_ASSERT(t_pkt->ol_flags & 481 rxq->flow_meta_mask); 482 *RTE_MBUF_DYNFIELD(elts[pos], offs, 483 uint32_t *) = meta; 484 *RTE_MBUF_DYNFIELD(elts[pos + 1], offs, 485 uint32_t *) = meta; 486 *RTE_MBUF_DYNFIELD(elts[pos + 2], offs, 487 uint32_t *) = meta; 488 *RTE_MBUF_DYNFIELD(elts[pos + 3], offs, 489 uint32_t *) = meta; 490 } 491 } 492 493 pos += MLX5_VPMD_DESCS_PER_LOOP; 494 /* Move to next CQE and invalidate consumed CQEs. */ 495 if (!rxq->cqe_comp_layout) { 496 if (!(pos & 0x7) && pos < mcqe_n) { 497 if (pos + 8 < mcqe_n) 498 rte_prefetch0((void *)(cq + pos + 8)); 499 mcq = (void *)&(cq + pos)->pkt_info; 500 for (i = 0; i < 8; ++i) 501 cq[inv++].op_own = MLX5_CQE_INVALIDATE; 502 } 503 } 504 } 505 506 if (rxq->cqe_comp_layout && keep) { 507 int ret; 508 /* Keep unzipping if the next CQE is the miniCQE array. */ 509 cq = &cq[mcqe_n]; 510 ret = check_cqe_iteration(cq, rxq->cqe_n, rxq->cq_ci + pkts_n); 511 if (ret == MLX5_CQE_STATUS_SW_OWN && 512 MLX5_CQE_FORMAT(cq->op_own) == MLX5_COMPRESSED) { 513 pos = 0; 514 elts = &elts[mcqe_n]; 515 mcq = (void *)cq; 516 mcqe_n = MLX5_CQE_NUM_MINIS(cq->op_own) + 1; 517 pkts_n += mcqe_n; 518 goto cycle; 519 } 520 } else { 521 /* Invalidate the rest of CQEs. */ 522 for (; inv < pkts_n; ++inv) 523 cq[inv].op_own = MLX5_CQE_INVALIDATE; 524 } 525 526 #ifdef MLX5_PMD_SOFT_COUNTERS 527 rxq->stats.ipackets += pkts_n; 528 rxq->stats.ibytes += rcvd_byte; 529 #endif 530 531 return pkts_n; 532 } 533 534 /** 535 * Calculate packet type and offload flag for mbuf and store it. 536 * 537 * @param rxq 538 * Pointer to RX queue structure. 539 * @param cqes[4] 540 * Array of four 16bytes completions extracted from the original completion 541 * descriptor. 542 * @param op_err 543 * Opcode vector having responder error status. Each field is 4B. 544 * @param pkts 545 * Pointer to array of packets to be filled. 546 */ 547 static inline void 548 rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, 549 __vector unsigned char cqes[4], __vector unsigned char op_err, 550 struct rte_mbuf **pkts) 551 { 552 __vector unsigned char pinfo0, pinfo1; 553 __vector unsigned char pinfo, ptype; 554 __vector unsigned char ol_flags = (__vector unsigned char) 555 (__vector unsigned int){ 556 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 557 rxq->hw_timestamp * rxq->timestamp_rx_flag, 558 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 559 rxq->hw_timestamp * rxq->timestamp_rx_flag, 560 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 561 rxq->hw_timestamp * rxq->timestamp_rx_flag, 562 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 563 rxq->hw_timestamp * rxq->timestamp_rx_flag}; 564 __vector unsigned char cv_flags; 565 const __vector unsigned char zero = (__vector unsigned char){0}; 566 const __vector unsigned char ptype_mask = 567 (__vector unsigned char)(__vector unsigned int){ 568 0x0000fd06, 0x0000fd06, 0x0000fd06, 0x0000fd06}; 569 const __vector unsigned char ptype_ol_mask = 570 (__vector unsigned char)(__vector unsigned int){ 571 0x00000106, 0x00000106, 0x00000106, 0x00000106}; 572 const __vector unsigned char pinfo_mask = 573 (__vector unsigned char)(__vector unsigned int){ 574 0x00000003, 0x00000003, 0x00000003, 0x00000003}; 575 const __vector unsigned char cv_flag_sel = (__vector unsigned char){ 576 0, (uint8_t)(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 577 (uint8_t)(RTE_MBUF_F_RX_IP_CKSUM_GOOD >> 1), 0, 578 (uint8_t)(RTE_MBUF_F_RX_L4_CKSUM_GOOD >> 1), 0, 579 (uint8_t)((RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD) >> 1), 580 0, 0, 0, 0, 0, 0, 0, 0, 0}; 581 const __vector unsigned char cv_mask = 582 (__vector unsigned char)(__vector unsigned int){ 583 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 584 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 585 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 586 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 587 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 588 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 589 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 590 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED}; 591 const __vector unsigned char mbuf_init = 592 (__vector unsigned char)vec_vsx_ld 593 (0, (__vector unsigned char *)&rxq->mbuf_initializer); 594 const __vector unsigned short rearm_sel_mask = 595 (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0}; 596 __vector unsigned char rearm0, rearm1, rearm2, rearm3; 597 uint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3; 598 599 /* Extract pkt_info field. */ 600 pinfo0 = (__vector unsigned char) 601 vec_mergeh((__vector unsigned int)cqes[0], 602 (__vector unsigned int)cqes[1]); 603 pinfo1 = (__vector unsigned char) 604 vec_mergeh((__vector unsigned int)cqes[2], 605 (__vector unsigned int)cqes[3]); 606 pinfo = (__vector unsigned char) 607 vec_mergeh((__vector unsigned long)pinfo0, 608 (__vector unsigned long)pinfo1); 609 610 /* Extract hdr_type_etc field. */ 611 pinfo0 = (__vector unsigned char) 612 vec_mergel((__vector unsigned int)cqes[0], 613 (__vector unsigned int)cqes[1]); 614 pinfo1 = (__vector unsigned char) 615 vec_mergel((__vector unsigned int)cqes[2], 616 (__vector unsigned int)cqes[3]); 617 ptype = (__vector unsigned char) 618 vec_mergeh((__vector unsigned long)pinfo0, 619 (__vector unsigned long)pinfo1); 620 621 if (rxq->mark) { 622 const __vector unsigned char pinfo_ft_mask = 623 (__vector unsigned char)(__vector unsigned int){ 624 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00}; 625 const __vector unsigned char fdir_flags = 626 (__vector unsigned char)(__vector unsigned int){ 627 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR, 628 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR}; 629 __vector unsigned char fdir_id_flags = 630 (__vector unsigned char)(__vector unsigned int){ 631 rxq->mark_flag, rxq->mark_flag, 632 rxq->mark_flag, rxq->mark_flag}; 633 __vector unsigned char flow_tag, invalid_mask; 634 635 flow_tag = (__vector unsigned char) 636 vec_and((__vector unsigned long)pinfo, 637 (__vector unsigned long)pinfo_ft_mask); 638 639 /* Check if flow tag is non-zero then set RTE_MBUF_F_RX_FDIR. */ 640 invalid_mask = (__vector unsigned char) 641 vec_cmpeq((__vector unsigned int)flow_tag, 642 (__vector unsigned int)zero); 643 ol_flags = (__vector unsigned char) 644 vec_or((__vector unsigned long)ol_flags, 645 (__vector unsigned long) 646 vec_andc((__vector unsigned long)fdir_flags, 647 (__vector unsigned long)invalid_mask)); 648 649 /* Mask out invalid entries. */ 650 fdir_id_flags = (__vector unsigned char) 651 vec_andc((__vector unsigned long)fdir_id_flags, 652 (__vector unsigned long)invalid_mask); 653 654 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */ 655 ol_flags = (__vector unsigned char) 656 vec_or((__vector unsigned long)ol_flags, 657 (__vector unsigned long) 658 vec_andc((__vector unsigned long)fdir_id_flags, 659 (__vector unsigned long) 660 vec_cmpeq((__vector unsigned int)flow_tag, 661 (__vector unsigned int)pinfo_ft_mask))); 662 } 663 /* 664 * Merge the two fields to generate the following: 665 * bit[1] = l3_ok 666 * bit[2] = l4_ok 667 * bit[8] = cv 668 * bit[11:10] = l3_hdr_type 669 * bit[14:12] = l4_hdr_type 670 * bit[15] = ip_frag 671 * bit[16] = tunneled 672 * bit[17] = outer_l3_type 673 */ 674 ptype = (__vector unsigned char) 675 vec_and((__vector unsigned long)ptype, 676 (__vector unsigned long)ptype_mask); 677 pinfo = (__vector unsigned char) 678 vec_and((__vector unsigned long)pinfo, 679 (__vector unsigned long)pinfo_mask); 680 pinfo = (__vector unsigned char) 681 vec_sl((__vector unsigned int)pinfo, 682 (__vector unsigned int){16, 16, 16, 16}); 683 684 /* Make pinfo has merged fields for ol_flags calculation. */ 685 pinfo = (__vector unsigned char) 686 vec_or((__vector unsigned long)ptype, 687 (__vector unsigned long)pinfo); 688 ptype = (__vector unsigned char) 689 vec_sr((__vector unsigned int)pinfo, 690 (__vector unsigned int){10, 10, 10, 10}); 691 ptype = (__vector unsigned char) 692 vec_packs((__vector unsigned int)ptype, 693 (__vector unsigned int)zero); 694 695 /* Errored packets will have RTE_PTYPE_ALL_MASK. */ 696 op_err = (__vector unsigned char) 697 vec_sr((__vector unsigned short)op_err, 698 (__vector unsigned short){8, 8, 8, 8, 8, 8, 8, 8}); 699 ptype = (__vector unsigned char) 700 vec_or((__vector unsigned long)ptype, 701 (__vector unsigned long)op_err); 702 703 pt_idx0 = (uint8_t)((__vector unsigned char)ptype)[0]; 704 pt_idx1 = (uint8_t)((__vector unsigned char)ptype)[2]; 705 pt_idx2 = (uint8_t)((__vector unsigned char)ptype)[4]; 706 pt_idx3 = (uint8_t)((__vector unsigned char)ptype)[6]; 707 708 pkts[0]->packet_type = mlx5_ptype_table[pt_idx0] | 709 !!(pt_idx0 & (1 << 6)) * rxq->tunnel; 710 pkts[1]->packet_type = mlx5_ptype_table[pt_idx1] | 711 !!(pt_idx1 & (1 << 6)) * rxq->tunnel; 712 pkts[2]->packet_type = mlx5_ptype_table[pt_idx2] | 713 !!(pt_idx2 & (1 << 6)) * rxq->tunnel; 714 pkts[3]->packet_type = mlx5_ptype_table[pt_idx3] | 715 !!(pt_idx3 & (1 << 6)) * rxq->tunnel; 716 717 /* Fill flags for checksum and VLAN. */ 718 pinfo = (__vector unsigned char) 719 vec_and((__vector unsigned long)pinfo, 720 (__vector unsigned long)ptype_ol_mask); 721 pinfo = vec_perm(cv_flag_sel, zero, pinfo); 722 723 /* Locate checksum flags at byte[2:1] and merge with VLAN flags. */ 724 cv_flags = (__vector unsigned char) 725 vec_sl((__vector unsigned int)pinfo, 726 (__vector unsigned int){9, 9, 9, 9}); 727 cv_flags = (__vector unsigned char) 728 vec_or((__vector unsigned long)pinfo, 729 (__vector unsigned long)cv_flags); 730 731 /* Move back flags to start from byte[0]. */ 732 cv_flags = (__vector unsigned char) 733 vec_sr((__vector unsigned int)cv_flags, 734 (__vector unsigned int){8, 8, 8, 8}); 735 736 /* Mask out garbage bits. */ 737 cv_flags = (__vector unsigned char) 738 vec_and((__vector unsigned long)cv_flags, 739 (__vector unsigned long)cv_mask); 740 741 /* Merge to ol_flags. */ 742 ol_flags = (__vector unsigned char) 743 vec_or((__vector unsigned long)ol_flags, 744 (__vector unsigned long)cv_flags); 745 746 /* Merge mbuf_init and ol_flags. */ 747 rearm0 = (__vector unsigned char) 748 vec_sel((__vector unsigned short)mbuf_init, 749 (__vector unsigned short) 750 vec_slo((__vector unsigned short)ol_flags, 751 (__vector unsigned char){64}), rearm_sel_mask); 752 rearm1 = (__vector unsigned char) 753 vec_sel((__vector unsigned short)mbuf_init, 754 (__vector unsigned short) 755 vec_slo((__vector unsigned short)ol_flags, 756 (__vector unsigned char){32}), rearm_sel_mask); 757 rearm2 = (__vector unsigned char) 758 vec_sel((__vector unsigned short)mbuf_init, 759 (__vector unsigned short)ol_flags, rearm_sel_mask); 760 rearm3 = (__vector unsigned char) 761 vec_sel((__vector unsigned short)mbuf_init, 762 (__vector unsigned short) 763 vec_sro((__vector unsigned short)ol_flags, 764 (__vector unsigned char){32}), rearm_sel_mask); 765 766 /* Write 8B rearm_data and 8B ol_flags. */ 767 vec_vsx_st(rearm0, 0, 768 (__vector unsigned char *)&pkts[0]->rearm_data); 769 vec_vsx_st(rearm1, 0, 770 (__vector unsigned char *)&pkts[1]->rearm_data); 771 vec_vsx_st(rearm2, 0, 772 (__vector unsigned char *)&pkts[2]->rearm_data); 773 vec_vsx_st(rearm3, 0, 774 (__vector unsigned char *)&pkts[3]->rearm_data); 775 } 776 777 /** 778 * Process a non-compressed completion and fill in mbufs in RX SW ring 779 * with data extracted from the title completion descriptor. 780 * 781 * @param rxq 782 * Pointer to RX queue structure. 783 * @param cq 784 * Pointer to completion array having a non-compressed completion at first. 785 * @param elts 786 * Pointer to SW ring to be filled. The first mbuf has to be pre-built from 787 * the title completion descriptor to be copied to the rest of mbufs. 788 * @param[out] pkts 789 * Array to store received packets. 790 * @param pkts_n 791 * Maximum number of packets in array. 792 * @param[out] err 793 * Pointer to a flag. Set non-zero value if pkts array has at least one error 794 * packet to handle. 795 * @param[out] comp 796 * Pointer to a index. Set it to the first compressed completion if any. 797 * 798 * @return 799 * Number of CQEs successfully processed. 800 */ 801 static inline uint16_t 802 rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 803 struct rte_mbuf **elts, struct rte_mbuf **pkts, 804 uint16_t pkts_n, uint64_t *err, uint64_t *comp) 805 { 806 const uint16_t q_n = 1 << rxq->cqe_n; 807 const uint16_t q_mask = q_n - 1; 808 unsigned int pos, adj; 809 uint64_t n = 0; 810 uint64_t comp_idx = MLX5_VPMD_DESCS_PER_LOOP; 811 uint16_t nocmp_n = 0; 812 const uint8_t vic = rxq->cq_ci >> rxq->cqe_n; 813 unsigned int own = !(rxq->cq_ci & (q_mask + 1)); 814 const __vector unsigned char zero = (__vector unsigned char){0}; 815 const __vector unsigned char ones = vec_splat_u8(-1); 816 const __vector unsigned char vic_check = 817 (__vector unsigned char)(__vector unsigned long){ 818 0x00ff000000ff0000LL, 0x00ff000000ff0000LL}; 819 const __vector unsigned char owner_check = 820 (__vector unsigned char)(__vector unsigned long){ 821 0x0100000001000000LL, 0x0100000001000000LL}; 822 const __vector unsigned char opcode_check = 823 (__vector unsigned char)(__vector unsigned long){ 824 0xf0000000f0000000LL, 0xf0000000f0000000LL}; 825 const __vector unsigned char format_check = 826 (__vector unsigned char)(__vector unsigned long){ 827 0x0c0000000c000000LL, 0x0c0000000c000000LL}; 828 const __vector unsigned char resp_err_check = 829 (__vector unsigned char)(__vector unsigned long){ 830 0xe0000000e0000000LL, 0xe0000000e0000000LL}; 831 #ifdef MLX5_PMD_SOFT_COUNTERS 832 uint32_t rcvd_byte = 0; 833 /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */ 834 const __vector unsigned char len_shuf_mask = (__vector unsigned char){ 835 1, 0, 5, 4, 836 9, 8, 13, 12, 837 -1, -1, -1, -1, 838 -1, -1, -1, -1}; 839 #endif 840 /* Mask to shuffle from extracted CQE to mbuf. */ 841 const __vector unsigned char shuf_mask = (__vector unsigned char){ 842 5, 4, /* bswap16, pkt_len */ 843 -1, -1, /* zero out 2nd half of pkt_len */ 844 5, 4, /* bswap16, data_len */ 845 11, 10, /* bswap16, vlan+tci */ 846 15, 14, 13, 12, /* bswap32, rss */ 847 1, 2, 3, -1}; /* fdir.hi */ 848 /* Mask to blend from the last Qword to the first DQword. */ 849 /* Mask to blend from the last Qword to the first DQword. */ 850 const __vector unsigned char blend_mask = (__vector unsigned char){ 851 -1, 0, 0, 0, 852 0, 0, 0, 0, 853 -1, -1, -1, -1, 854 -1, -1, -1, -1}; 855 const __vector unsigned char crc_adj = 856 (__vector unsigned char)(__vector unsigned short){ 857 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 858 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0, 0, 0}; 859 const __vector unsigned char flow_mark_adj = 860 (__vector unsigned char)(__vector unsigned int){ 861 0, 0, 0, rxq->mark * (-1)}; 862 const __vector unsigned short cqe_sel_mask1 = 863 (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0}; 864 const __vector unsigned short cqe_sel_mask2 = 865 (__vector unsigned short){0, 0, 0xffff, 0, 0, 0, 0, 0}; 866 const __vector unsigned char validity = (__vector unsigned char){ 867 0, 0, vic, 0, 868 0, 0, vic, 0, 869 0, 0, vic, 0, 870 0, 0, vic, 0}; 871 const __vector unsigned char ownership = (__vector unsigned char){ 872 0, 0, 0, own, 873 0, 0, 0, own, 874 0, 0, 0, own, 875 0, 0, 0, own}; 876 /* 877 * A. load first Qword (8bytes) in one loop. 878 * B. copy 4 mbuf pointers from elts ring to returning pkts. 879 * C. load remaining CQE data and extract necessary fields. 880 * Final 16bytes cqes[] extracted from original 64bytes CQE has the 881 * following structure: 882 * struct { 883 * uint8_t pkt_info; 884 * uint8_t flow_tag[3]; 885 * uint16_t byte_cnt; 886 * uint8_t validity_iteration_count; 887 * uint8_t op_own; 888 * uint16_t hdr_type_etc; 889 * uint16_t vlan_info; 890 * uint32_t rx_has_res; 891 * } c; 892 * D. fill in mbuf. 893 * E. get valid CQEs. 894 * F. find compressed CQE. 895 */ 896 for (pos = 0; 897 pos < pkts_n; 898 pos += MLX5_VPMD_DESCS_PER_LOOP) { 899 __vector unsigned char cqes[MLX5_VPMD_DESCS_PER_LOOP]; 900 __vector unsigned char cqe_tmp1, cqe_tmp2; 901 __vector unsigned char pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3; 902 __vector unsigned char op_own, op_own_tmp1, op_own_tmp2; 903 __vector unsigned char opcode, owner_mask, invalid_mask; 904 __vector unsigned char comp_mask, mini_mask; 905 __vector unsigned char mask; 906 #ifdef MLX5_PMD_SOFT_COUNTERS 907 const __vector unsigned char lower_half = { 908 0, 1, 4, 5, 8, 9, 12, 13, 909 16, 17, 20, 21, 24, 25, 28, 29}; 910 const __vector unsigned char upper_half = { 911 2, 3, 6, 7, 10, 11, 14, 15, 912 18, 19, 22, 23, 26, 27, 30, 31}; 913 const __vector unsigned long shmax = {64, 64}; 914 __vector unsigned char byte_cnt; 915 __vector unsigned short left, right; 916 __vector unsigned long lshift; 917 __vector __attribute__((altivec(bool__))) 918 unsigned long shmask; 919 #endif 920 __vector unsigned char mbp1, mbp2; 921 __vector unsigned char p = 922 (__vector unsigned char)(__vector unsigned short){ 923 0, 1, 2, 3, 0, 0, 0, 0}; 924 unsigned int p1, p2, p3; 925 926 /* Prefetch next 4 CQEs. */ 927 if (pkts_n - pos >= 2 * MLX5_VPMD_DESCS_PER_LOOP) { 928 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP]); 929 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 1]); 930 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 2]); 931 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 3]); 932 } 933 934 /* A.0 do not cross the end of CQ. */ 935 mask = (__vector unsigned char)(__vector unsigned long){ 936 (pkts_n - pos) * sizeof(uint16_t) * 8, 0}; 937 938 { 939 __vector unsigned long lshift; 940 __vector __attribute__((altivec(bool__))) 941 unsigned long shmask; 942 const __vector unsigned long shmax = {64, 64}; 943 944 lshift = vec_splat((__vector unsigned long)mask, 0); 945 shmask = vec_cmpgt(shmax, lshift); 946 mask = (__vector unsigned char) 947 vec_sl((__vector unsigned long)ones, lshift); 948 mask = (__vector unsigned char) 949 vec_sel((__vector unsigned long)shmask, 950 (__vector unsigned long)mask, shmask); 951 } 952 953 p = (__vector unsigned char) 954 vec_andc((__vector unsigned long)p, 955 (__vector unsigned long)mask); 956 957 /* A.1 load cqes. */ 958 p3 = (unsigned int)((__vector unsigned short)p)[3]; 959 cqes[3] = (__vector unsigned char)(__vector unsigned long){ 960 *(__rte_aligned(8) unsigned long *) 961 &cq[pos + p3].sop_drop_qpn, 0LL}; 962 rte_compiler_barrier(); 963 964 p2 = (unsigned int)((__vector unsigned short)p)[2]; 965 cqes[2] = (__vector unsigned char)(__vector unsigned long){ 966 *(__rte_aligned(8) unsigned long *) 967 &cq[pos + p2].sop_drop_qpn, 0LL}; 968 rte_compiler_barrier(); 969 970 /* B.1 load mbuf pointers. */ 971 mbp1 = (__vector unsigned char)vec_vsx_ld(0, 972 (signed int const *)&elts[pos]); 973 mbp2 = (__vector unsigned char)vec_vsx_ld(0, 974 (signed int const *)&elts[pos + 2]); 975 976 /* A.1 load a block having op_own. */ 977 p1 = (unsigned int)((__vector unsigned short)p)[1]; 978 cqes[1] = (__vector unsigned char)(__vector unsigned long){ 979 *(__rte_aligned(8) unsigned long *) 980 &cq[pos + p1].sop_drop_qpn, 0LL}; 981 rte_compiler_barrier(); 982 983 cqes[0] = (__vector unsigned char)(__vector unsigned long){ 984 *(__rte_aligned(8) unsigned long *) 985 &cq[pos].sop_drop_qpn, 0LL}; 986 rte_compiler_barrier(); 987 988 /* B.2 copy mbuf pointers. */ 989 *(__vector unsigned char *)&pkts[pos] = mbp1; 990 *(__vector unsigned char *)&pkts[pos + 2] = mbp2; 991 rte_io_rmb(); 992 993 /* C.1 load remaining CQE data and extract necessary fields. */ 994 cqe_tmp2 = *(__vector unsigned char *) 995 &cq[pos + p3].pkt_info; 996 cqe_tmp1 = *(__vector unsigned char *) 997 &cq[pos + p2].pkt_info; 998 cqes[3] = vec_sel(cqes[3], cqe_tmp2, blend_mask); 999 cqes[2] = vec_sel(cqes[2], cqe_tmp1, blend_mask); 1000 cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0, 1001 (signed int const *)&cq[pos + p3].csum); 1002 cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0, 1003 (signed int const *)&cq[pos + p2].csum); 1004 cqes[3] = (__vector unsigned char) 1005 vec_sel((__vector unsigned short)cqes[3], 1006 (__vector unsigned short)cqe_tmp2, cqe_sel_mask1); 1007 cqes[2] = (__vector unsigned char) 1008 vec_sel((__vector unsigned short)cqes[2], 1009 (__vector unsigned short)cqe_tmp1, cqe_sel_mask1); 1010 cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){ 1011 *(__rte_aligned(8) unsigned long *) 1012 &cq[pos + p3].rsvd4[2], 0LL}; 1013 cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){ 1014 *(__rte_aligned(8) unsigned long *) 1015 &cq[pos + p2].rsvd4[2], 0LL}; 1016 cqes[3] = (__vector unsigned char) 1017 vec_sel((__vector unsigned short)cqes[3], 1018 (__vector unsigned short)cqe_tmp2, 1019 (__vector unsigned short)cqe_sel_mask2); 1020 cqes[2] = (__vector unsigned char) 1021 vec_sel((__vector unsigned short)cqes[2], 1022 (__vector unsigned short)cqe_tmp1, 1023 (__vector unsigned short)cqe_sel_mask2); 1024 1025 /* C.2 generate final structure for mbuf with swapping bytes. */ 1026 pkt_mb3 = vec_perm(cqes[3], zero, shuf_mask); 1027 pkt_mb2 = vec_perm(cqes[2], zero, shuf_mask); 1028 1029 /* C.3 adjust CRC length. */ 1030 pkt_mb3 = (__vector unsigned char) 1031 ((__vector unsigned short)pkt_mb3 - 1032 (__vector unsigned short)crc_adj); 1033 pkt_mb2 = (__vector unsigned char) 1034 ((__vector unsigned short)pkt_mb2 - 1035 (__vector unsigned short)crc_adj); 1036 1037 /* C.4 adjust flow mark. */ 1038 pkt_mb3 = (__vector unsigned char) 1039 ((__vector unsigned int)pkt_mb3 + 1040 (__vector unsigned int)flow_mark_adj); 1041 pkt_mb2 = (__vector unsigned char) 1042 ((__vector unsigned int)pkt_mb2 + 1043 (__vector unsigned int)flow_mark_adj); 1044 1045 /* D.1 fill in mbuf - rx_descriptor_fields1. */ 1046 *(__vector unsigned char *) 1047 &pkts[pos + 3]->pkt_len = pkt_mb3; 1048 *(__vector unsigned char *) 1049 &pkts[pos + 2]->pkt_len = pkt_mb2; 1050 1051 /* E.1 extract op_own field. */ 1052 op_own_tmp2 = (__vector unsigned char) 1053 vec_mergeh((__vector unsigned int)cqes[2], 1054 (__vector unsigned int)cqes[3]); 1055 1056 /* C.1 load remaining CQE data and extract necessary fields. */ 1057 cqe_tmp2 = *(__vector unsigned char *) 1058 &cq[pos + p1].pkt_info; 1059 cqe_tmp1 = *(__vector unsigned char *) 1060 &cq[pos].pkt_info; 1061 cqes[1] = vec_sel(cqes[1], cqe_tmp2, blend_mask); 1062 cqes[0] = vec_sel(cqes[0], cqe_tmp2, blend_mask); 1063 cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0, 1064 (signed int const *)&cq[pos + p1].csum); 1065 cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0, 1066 (signed int const *)&cq[pos].csum); 1067 cqes[1] = (__vector unsigned char) 1068 vec_sel((__vector unsigned short)cqes[1], 1069 (__vector unsigned short)cqe_tmp2, cqe_sel_mask1); 1070 cqes[0] = (__vector unsigned char) 1071 vec_sel((__vector unsigned short)cqes[0], 1072 (__vector unsigned short)cqe_tmp1, cqe_sel_mask1); 1073 cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){ 1074 *(__rte_aligned(8) unsigned long *) 1075 &cq[pos + p1].rsvd4[2], 0LL}; 1076 cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){ 1077 *(__rte_aligned(8) unsigned long *) 1078 &cq[pos].rsvd4[2], 0LL}; 1079 cqes[1] = (__vector unsigned char) 1080 vec_sel((__vector unsigned short)cqes[1], 1081 (__vector unsigned short)cqe_tmp2, cqe_sel_mask2); 1082 cqes[0] = (__vector unsigned char) 1083 vec_sel((__vector unsigned short)cqes[0], 1084 (__vector unsigned short)cqe_tmp1, cqe_sel_mask2); 1085 1086 /* C.2 generate final structure for mbuf with swapping bytes. */ 1087 pkt_mb1 = vec_perm(cqes[1], zero, shuf_mask); 1088 pkt_mb0 = vec_perm(cqes[0], zero, shuf_mask); 1089 1090 /* C.3 adjust CRC length. */ 1091 pkt_mb1 = (__vector unsigned char) 1092 ((__vector unsigned short)pkt_mb1 - 1093 (__vector unsigned short)crc_adj); 1094 pkt_mb0 = (__vector unsigned char) 1095 ((__vector unsigned short)pkt_mb0 - 1096 (__vector unsigned short)crc_adj); 1097 1098 /* C.4 adjust flow mark. */ 1099 pkt_mb1 = (__vector unsigned char) 1100 ((__vector unsigned int)pkt_mb1 + 1101 (__vector unsigned int)flow_mark_adj); 1102 pkt_mb0 = (__vector unsigned char) 1103 ((__vector unsigned int)pkt_mb0 + 1104 (__vector unsigned int)flow_mark_adj); 1105 1106 /* E.1 extract op_own byte. */ 1107 op_own_tmp1 = (__vector unsigned char) 1108 vec_mergeh((__vector unsigned int)cqes[0], 1109 (__vector unsigned int)cqes[1]); 1110 op_own = (__vector unsigned char) 1111 vec_mergel((__vector unsigned long)op_own_tmp1, 1112 (__vector unsigned long)op_own_tmp2); 1113 1114 /* D.1 fill in mbuf - rx_descriptor_fields1. */ 1115 *(__vector unsigned char *) 1116 &pkts[pos + 1]->pkt_len = pkt_mb1; 1117 *(__vector unsigned char *) 1118 &pkts[pos]->pkt_len = pkt_mb0; 1119 1120 /* E.2 mask out CQEs belonging to HW. */ 1121 if (rxq->cqe_comp_layout) { 1122 owner_mask = (__vector unsigned char) 1123 vec_and((__vector unsigned long)op_own, 1124 (__vector unsigned long)vic_check); 1125 owner_mask = (__vector unsigned char) 1126 vec_cmpeq((__vector unsigned int)owner_mask, 1127 (__vector unsigned int)validity); 1128 owner_mask = (__vector unsigned char) 1129 vec_xor((__vector unsigned long)owner_mask, 1130 (__vector unsigned long)ones); 1131 } else { 1132 owner_mask = (__vector unsigned char) 1133 vec_and((__vector unsigned long)op_own, 1134 (__vector unsigned long)owner_check); 1135 owner_mask = (__vector unsigned char) 1136 vec_cmpeq((__vector unsigned int)owner_mask, 1137 (__vector unsigned int)ownership); 1138 } 1139 owner_mask = (__vector unsigned char) 1140 vec_packs((__vector unsigned int)owner_mask, 1141 (__vector unsigned int)zero); 1142 1143 /* E.3 get mask for invalidated CQEs. */ 1144 opcode = (__vector unsigned char) 1145 vec_and((__vector unsigned long)op_own, 1146 (__vector unsigned long)opcode_check); 1147 invalid_mask = (__vector unsigned char) 1148 vec_cmpeq((__vector unsigned int)opcode_check, 1149 (__vector unsigned int)opcode); 1150 invalid_mask = (__vector unsigned char) 1151 vec_packs((__vector unsigned int)invalid_mask, 1152 (__vector unsigned int)zero); 1153 1154 /* E.4 mask out beyond boundary. */ 1155 invalid_mask = (__vector unsigned char) 1156 vec_or((__vector unsigned long)invalid_mask, 1157 (__vector unsigned long)mask); 1158 1159 /* E.5 merge invalid_mask with invalid owner. */ 1160 invalid_mask = (__vector unsigned char) 1161 vec_or((__vector unsigned long)invalid_mask, 1162 (__vector unsigned long)owner_mask); 1163 1164 /* F.1 find compressed CQE format. */ 1165 comp_mask = (__vector unsigned char) 1166 vec_and((__vector unsigned long)op_own, 1167 (__vector unsigned long)format_check); 1168 comp_mask = (__vector unsigned char) 1169 vec_cmpeq((__vector unsigned int)comp_mask, 1170 (__vector unsigned int)format_check); 1171 comp_mask = (__vector unsigned char) 1172 vec_packs((__vector unsigned int)comp_mask, 1173 (__vector unsigned int)zero); 1174 1175 /* F.2 mask out invalid entries. */ 1176 comp_mask = (__vector unsigned char) 1177 vec_andc((__vector unsigned long)comp_mask, 1178 (__vector unsigned long)invalid_mask); 1179 comp_idx = ((__vector unsigned long)comp_mask)[0]; 1180 1181 /* F.3 get the first compressed CQE. */ 1182 comp_idx = comp_idx ? rte_ctz64(comp_idx) / 1183 (sizeof(uint16_t) * 8) : MLX5_VPMD_DESCS_PER_LOOP; 1184 1185 /* E.6 mask out entries after the compressed CQE. */ 1186 mask = (__vector unsigned char)(__vector unsigned long){ 1187 (comp_idx * sizeof(uint16_t) * 8), 0}; 1188 lshift = vec_splat((__vector unsigned long)mask, 0); 1189 shmask = vec_cmpgt(shmax, lshift); 1190 mask = (__vector unsigned char) 1191 vec_sl((__vector unsigned long)ones, lshift); 1192 mask = (__vector unsigned char) 1193 vec_sel((__vector unsigned long)shmask, 1194 (__vector unsigned long)mask, shmask); 1195 invalid_mask = (__vector unsigned char) 1196 vec_or((__vector unsigned long)invalid_mask, 1197 (__vector unsigned long)mask); 1198 1199 /* E.7 count non-compressed valid CQEs. */ 1200 n = ((__vector unsigned long)invalid_mask)[0]; 1201 n = n ? rte_ctz64(n) / (sizeof(uint16_t) * 8) : 1202 MLX5_VPMD_DESCS_PER_LOOP; 1203 nocmp_n += n; 1204 1205 /* D.2 get the final invalid mask. */ 1206 mask = (__vector unsigned char)(__vector unsigned long){ 1207 (n * sizeof(uint16_t) * 8), 0}; 1208 lshift = vec_splat((__vector unsigned long)mask, 0); 1209 shmask = vec_cmpgt(shmax, lshift); 1210 mask = (__vector unsigned char) 1211 vec_sl((__vector unsigned long)ones, lshift); 1212 mask = (__vector unsigned char) 1213 vec_sel((__vector unsigned long)shmask, 1214 (__vector unsigned long)mask, shmask); 1215 invalid_mask = (__vector unsigned char) 1216 vec_or((__vector unsigned long)invalid_mask, 1217 (__vector unsigned long)mask); 1218 1219 /* D.3 check error in opcode. */ 1220 adj = (!rxq->cqe_comp_layout && 1221 comp_idx != MLX5_VPMD_DESCS_PER_LOOP && comp_idx == n); 1222 mask = (__vector unsigned char)(__vector unsigned long){ 1223 (adj * sizeof(uint16_t) * 8), 0}; 1224 lshift = vec_splat((__vector unsigned long)mask, 0); 1225 shmask = vec_cmpgt(shmax, lshift); 1226 mini_mask = (__vector unsigned char) 1227 vec_sl((__vector unsigned long)invalid_mask, lshift); 1228 mini_mask = (__vector unsigned char) 1229 vec_sel((__vector unsigned long)shmask, 1230 (__vector unsigned long)mini_mask, shmask); 1231 opcode = (__vector unsigned char) 1232 vec_cmpeq((__vector unsigned int)resp_err_check, 1233 (__vector unsigned int)opcode); 1234 opcode = (__vector unsigned char) 1235 vec_packs((__vector unsigned int)opcode, 1236 (__vector unsigned int)zero); 1237 opcode = (__vector unsigned char) 1238 vec_andc((__vector unsigned long)opcode, 1239 (__vector unsigned long)mini_mask); 1240 1241 /* D.4 mark if any error is set */ 1242 *err |= ((__vector unsigned long)opcode)[0]; 1243 1244 /* D.5 fill in mbuf - rearm_data and packet_type. */ 1245 rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]); 1246 if (unlikely(rxq->shared)) { 1247 pkts[pos]->port = cq[pos].user_index_low; 1248 pkts[pos + 1]->port = cq[pos + p1].user_index_low; 1249 pkts[pos + 2]->port = cq[pos + p2].user_index_low; 1250 pkts[pos + 3]->port = cq[pos + p3].user_index_low; 1251 } 1252 if (rxq->hw_timestamp) { 1253 int offset = rxq->timestamp_offset; 1254 if (rxq->rt_timestamp) { 1255 struct mlx5_dev_ctx_shared *sh = rxq->sh; 1256 uint64_t ts; 1257 1258 ts = rte_be_to_cpu_64(cq[pos].timestamp); 1259 mlx5_timestamp_set(pkts[pos], offset, 1260 mlx5_txpp_convert_rx_ts(sh, ts)); 1261 ts = rte_be_to_cpu_64(cq[pos + p1].timestamp); 1262 mlx5_timestamp_set(pkts[pos + 1], offset, 1263 mlx5_txpp_convert_rx_ts(sh, ts)); 1264 ts = rte_be_to_cpu_64(cq[pos + p2].timestamp); 1265 mlx5_timestamp_set(pkts[pos + 2], offset, 1266 mlx5_txpp_convert_rx_ts(sh, ts)); 1267 ts = rte_be_to_cpu_64(cq[pos + p3].timestamp); 1268 mlx5_timestamp_set(pkts[pos + 3], offset, 1269 mlx5_txpp_convert_rx_ts(sh, ts)); 1270 } else { 1271 mlx5_timestamp_set(pkts[pos], offset, 1272 rte_be_to_cpu_64(cq[pos].timestamp)); 1273 mlx5_timestamp_set(pkts[pos + 1], offset, 1274 rte_be_to_cpu_64(cq[pos + p1].timestamp)); 1275 mlx5_timestamp_set(pkts[pos + 2], offset, 1276 rte_be_to_cpu_64(cq[pos + p2].timestamp)); 1277 mlx5_timestamp_set(pkts[pos + 3], offset, 1278 rte_be_to_cpu_64(cq[pos + p3].timestamp)); 1279 } 1280 } 1281 if (rxq->dynf_meta) { 1282 uint64_t flag = rxq->flow_meta_mask; 1283 int32_t offs = rxq->flow_meta_offset; 1284 uint32_t mask = rxq->flow_meta_port_mask; 1285 uint32_t metadata; 1286 1287 /* This code is subject for further optimization. */ 1288 metadata = rte_be_to_cpu_32 1289 (cq[pos].flow_table_metadata) & mask; 1290 *RTE_MBUF_DYNFIELD(pkts[pos], offs, uint32_t *) = 1291 metadata; 1292 pkts[pos]->ol_flags |= metadata ? flag : 0ULL; 1293 metadata = rte_be_to_cpu_32 1294 (cq[pos + p1].flow_table_metadata) & mask; 1295 *RTE_MBUF_DYNFIELD(pkts[pos + 1], offs, uint32_t *) = 1296 metadata; 1297 pkts[pos + 1]->ol_flags |= metadata ? flag : 0ULL; 1298 metadata = rte_be_to_cpu_32 1299 (cq[pos + p2].flow_table_metadata) & mask; 1300 *RTE_MBUF_DYNFIELD(pkts[pos + 2], offs, uint32_t *) = 1301 metadata; 1302 pkts[pos + 2]->ol_flags |= metadata ? flag : 0ULL; 1303 metadata = rte_be_to_cpu_32 1304 (cq[pos + p3].flow_table_metadata) & mask; 1305 *RTE_MBUF_DYNFIELD(pkts[pos + 3], offs, uint32_t *) = 1306 metadata; 1307 pkts[pos + 3]->ol_flags |= metadata ? flag : 0ULL; 1308 } 1309 #ifdef MLX5_PMD_SOFT_COUNTERS 1310 /* Add up received bytes count. */ 1311 byte_cnt = vec_perm(op_own, zero, len_shuf_mask); 1312 byte_cnt = (__vector unsigned char) 1313 vec_andc((__vector unsigned long)byte_cnt, 1314 (__vector unsigned long)invalid_mask); 1315 left = vec_perm((__vector unsigned short)byte_cnt, 1316 (__vector unsigned short)zero, lower_half); 1317 right = vec_perm((__vector unsigned short)byte_cnt, 1318 (__vector unsigned short)zero, upper_half); 1319 byte_cnt = (__vector unsigned char)vec_add(left, right); 1320 left = vec_perm((__vector unsigned short)byte_cnt, 1321 (__vector unsigned short)zero, lower_half); 1322 right = vec_perm((__vector unsigned short)byte_cnt, 1323 (__vector unsigned short)zero, upper_half); 1324 byte_cnt = (__vector unsigned char)vec_add(left, right); 1325 rcvd_byte += ((__vector unsigned long)byte_cnt)[0]; 1326 #endif 1327 1328 /* 1329 * Break the loop unless more valid CQE is expected, or if 1330 * there's a compressed CQE. 1331 */ 1332 if (n != MLX5_VPMD_DESCS_PER_LOOP) 1333 break; 1334 } 1335 #ifdef MLX5_PMD_SOFT_COUNTERS 1336 rxq->stats.ipackets += nocmp_n; 1337 rxq->stats.ibytes += rcvd_byte; 1338 #endif 1339 if (comp_idx == n) 1340 *comp = comp_idx; 1341 return nocmp_n; 1342 } 1343 1344 #endif /* RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ */ 1345