crypto/qat: support plain SHA1..SHA512 hashes

This patch adds support for plain SHA-1, SHA-224, SHA-256,
SHA-384 and SHA-512 hashes to QAT PMD.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.

crypto/qat: support plain SHA1..SHA512 hashes

This patch adds support for plain SHA-1, SHA-224, SHA-256,
SHA-384 and SHA-512 hashes to QAT PMD.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

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cryptodev: add session-less feature flag

Add feature flag for symmetric sessionless support,
so it can be checked by applications.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acke

cryptodev: add session-less feature flag

Add feature flag for symmetric sessionless support,
so it can be checked by applications.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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compress/qat: support IM buffer too small operation

This patch implements a special way of buffer handling when internal
QAT IM buffer is too small for Huffman dynamic compression operation.
Instead

compress/qat: support IM buffer too small operation

This patch implements a special way of buffer handling when internal
QAT IM buffer is too small for Huffman dynamic compression operation.
Instead of falling back to fixed compression, the operation is now
split into multiple smaller dynamic compression requests (possible to
execute on QAT) and their results are then combined and copied into
the output buffer. This is not possible if any checksum calculation
was requested - in such case the code falls back to fixed compression
as before.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

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crypto/aesni_mb: support CPU crypto

Add support for CPU crypto mode by introducing required handler.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Pablo de Lara <pablo.

crypto/aesni_mb: support CPU crypto

Add support for CPU crypto mode by introducing required handler.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

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crypto/nitrox: support 3DES-CBC

This patch adds 3DES CBC mode cipher algorithm.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>

crypto/qat: handle mixed hash-cipher on GEN2

This patch adds handling of mixed hash-cipher algorithms
available on GEN2 QAT in particular firmware versions.
Also the documentation is updated to show

crypto/qat: handle mixed hash-cipher on GEN2

This patch adds handling of mixed hash-cipher algorithms
available on GEN2 QAT in particular firmware versions.
Also the documentation is updated to show the mixed crypto
algorithms are supported on QAT GEN2.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

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common/qat: fix GEN3 marketing name

This patch fixes the marketing name of the QAT GEN3 to P5xxx.
Updates this name mentioned in the compression PMD as well as
in the documentation.

Fixes: aa983f03

common/qat: fix GEN3 marketing name

This patch fixes the marketing name of the QAT GEN3 to P5xxx.
Updates this name mentioned in the compression PMD as well as
in the documentation.

Fixes: aa983f03ad2e ("crypto/qat: handle Single Pass Crypto Requests on GEN3")
Fixes: a124830a6f00 ("compress/qat: enable dynamic huffman encoding")
Fixes: 1f5e4053f9b4 ("common/qat: support GEN3 devices")
Cc: stable@dpdk.org

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

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doc: add build requirement in some crypto PMD guides

The following crypto PMDs use the Intel Multi-buffer library:
- AESNI MB PMD
- AESNI GCM PMD
- ZUC PMD
- KASUMI PMD
- SNOW3G PMD

When this libra

doc: add build requirement in some crypto PMD guides

The following crypto PMDs use the Intel Multi-buffer library:
- AESNI MB PMD
- AESNI GCM PMD
- ZUC PMD
- KASUMI PMD
- SNOW3G PMD

When this library is built with gcc < 5.0, it might throw
some compilation issues. A workaround has been added in the
repo of this library, so a note on this has been added
to the documentation of these PMDs.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>

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crypto/aesni_gcm: support CPU crypto

Add support for CPU crypto mode by introducing required handler.
Authenticated encryption and decryption are supported with tag
generation/verification.

CPU cry

crypto/aesni_gcm: support CPU crypto

Add support for CPU crypto mode by introducing required handler.
Authenticated encryption and decryption are supported with tag
generation/verification.

CPU crypto support include both AES-GCM and GMAC algorithms.

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>

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cryptodev: introduce CPU crypto API

Add new API allowing to process crypto operations in a synchronous
manner. Operations are performed on a set of SG arrays.

Cryptodevs which allows CPU crypto ope

cryptodev: introduce CPU crypto API

Add new API allowing to process crypto operations in a synchronous
manner. Operations are performed on a set of SG arrays.

Cryptodevs which allows CPU crypto operation mode have to
use RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO capability.

Add a helper method to easily convert mbufs to a SGL form.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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crypto/armv8: link to library hosted by Arm

Armv8 crypto PMD linked to armv8_crypto library created by Marvell.
Maintenance of armv8_crypto library will be discontinued.
Change Armv8 PMD to link to

crypto/armv8: link to library hosted by Arm

Armv8 crypto PMD linked to armv8_crypto library created by Marvell.
Maintenance of armv8_crypto library will be discontinued.
Change Armv8 PMD to link to AArch64 crypto library hosted by Arm.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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crypto/snow3g: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for SNOW3G-UEA2 and SNOW3G-UIA2 from version v0.53,
moving from libSSO SNOW3G library.

Signed-off

crypto/snow3g: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for SNOW3G-UEA2 and SNOW3G-UIA2 from version v0.53,
moving from libSSO SNOW3G library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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crypto/kasumi: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for KASUMI-F8 and KASUMI-F9 from version v0.53,
moving from libSSO KASUMI library.

Signed-off-by:

crypto/kasumi: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for KASUMI-F8 and KASUMI-F9 from version v0.53,
moving from libSSO KASUMI library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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crypto/zuc: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for ZUC-EEA3 and ZUC-EIA3 from version v0.53,
moving from libSSO ZUC library.

Signed-off-by: Pablo d

crypto/zuc: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for ZUC-EEA3 and ZUC-EIA3 from version v0.53,
moving from libSSO ZUC library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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cryptodev: revert Chacha20-Poly1305 AEAD algorithm

API makes think that rte_cryptodev_info_get() cannot return
a value >= 3 (RTE_CRYPTO_AEAD_LIST_END in 19.11).
20.02-rc1 was returning 3 (RTE_CRYPTO

cryptodev: revert Chacha20-Poly1305 AEAD algorithm

API makes think that rte_cryptodev_info_get() cannot return
a value >= 3 (RTE_CRYPTO_AEAD_LIST_END in 19.11).
20.02-rc1 was returning 3 (RTE_CRYPTO_AEAD_CHACHA20_POLY1305).
So the ABI compatibility contract was broken.

It could be solved with some function versioning,
but because a lack of time, the feature is reverted for now.

This reverts following commits:
- 6c9f3b347e21 ("cryptodev: add Chacha20-Poly1305 AEAD algorithm")
- 2c512e64d600 ("crypto/qat: support Chacha Poly")
- d55e01f579e1 ("test/crypto: add Chacha Poly cases")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>

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crypto/qat: support Chacha Poly

This patchset adds Chacha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona T

crypto/qat: support Chacha Poly

This patchset adds Chacha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

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crypto/qat: handle mixed hash-cipher requests on GEN3

This patch implements handling mixed encrypted digest hash-cipher
requests (e.g. SNOW3G + ZUC or ZUC + AES CTR) possible when running
on GEN3 QA

crypto/qat: handle mixed hash-cipher requests on GEN3

This patch implements handling mixed encrypted digest hash-cipher
requests (e.g. SNOW3G + ZUC or ZUC + AES CTR) possible when running
on GEN3 QAT. Such algorithm combinations are not supported on
GEN1/GEN2 hardware.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

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crypto/qat: add minimum enqueue threshold

This patch adds minimum enqueue threshold to Intel
QuickAssist Technology PMD.
It is an optimisation, configured by a command line option,
which can be used

crypto/qat: add minimum enqueue threshold

This patch adds minimum enqueue threshold to Intel
QuickAssist Technology PMD.
It is an optimisation, configured by a command line option,
which can be used to reduce MMIO write occurrences.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>

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common/qat: support dual threads for enqueue/dequeue

Remove the limitation whereby enqueue and dequeue must be
done in same thread.
The inflight calculation is reworked to be thread-safe for 2
threa

common/qat: support dual threads for enqueue/dequeue

Remove the limitation whereby enqueue and dequeue must be
done in same thread.
The inflight calculation is reworked to be thread-safe for 2
threads - note this is not general multi-thread support, i.e
all enqueues to a qp must still be done in one thread and
all dequeues must be done in one thread, but enqueues and
dequeues may be in separate threads.
Documentation updated.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>

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crypto/octeontx2: support ECPM

Add support asymmetric operation EC Point MUltiplication,
in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidi

crypto/octeontx2: support ECPM

Add support asymmetric operation EC Point MUltiplication,
in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>

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crypto/octeontx: support ECPM

Add support for asymmetric operation EC Point Multiplication,
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhami

crypto/octeontx: support ECPM

Add support for asymmetric operation EC Point Multiplication,
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>

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cryptodev: support ECPM

Asymmetric crypto library is extended to add ECPM (Elliptic Curve Point
Multiplication). The required xform type and op parameters are
introduced.

Signed-off-by: Anoob Josep

cryptodev: support ECPM

Asymmetric crypto library is extended to add ECPM (Elliptic Curve Point
Multiplication). The required xform type and op parameters are
introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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crypto/octeontx2: support ECDSA

Adding support for ECDSA asymmetric crypto
operations in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipat

crypto/octeontx2: support ECDSA

Adding support for ECDSA asymmetric crypto
operations in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>

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crypto/octeontx: support ECDSA

Adding support for ECDSA asymmetric crypto operations
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marv

crypto/octeontx: support ECDSA

Adding support for ECDSA asymmetric crypto operations
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>

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cryptodev: support ECDSA

Asymmetric crypto library is extended to add ECDSA. Elliptic curve
xform and ECDSA op params are introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by:

cryptodev: support ECDSA

Asymmetric crypto library is extended to add ECDSA. Elliptic curve
xform and ECDSA op params are introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

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