xref: /dpdk/drivers/compress/qat/qat_comp_pmd.c (revision 9cd9d3e702fba4700539c1a2eddac13dd14ecf70)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2015-2019 Intel Corporation
3  */
4 
5 #include <rte_malloc.h>
6 
7 #include "qat_comp.h"
8 #include "qat_comp_pmd.h"
9 
10 #define QAT_PMD_COMP_SGL_DEF_SEGMENTS 16
11 
12 struct stream_create_info {
13 	struct qat_comp_dev_private *comp_dev;
14 	int socket_id;
15 	int error;
16 };
17 
18 static const struct rte_compressdev_capabilities qat_comp_gen_capabilities[] = {
19 	{/* COMPRESSION - deflate */
20 	 .algo = RTE_COMP_ALGO_DEFLATE,
21 	 .comp_feature_flags = RTE_COMP_FF_MULTI_PKT_CHECKSUM |
22 				RTE_COMP_FF_CRC32_CHECKSUM |
23 				RTE_COMP_FF_ADLER32_CHECKSUM |
24 				RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
25 				RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
26 				RTE_COMP_FF_HUFFMAN_FIXED |
27 				RTE_COMP_FF_HUFFMAN_DYNAMIC |
28 				RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
29 				RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
30 				RTE_COMP_FF_OOP_LB_IN_SGL_OUT |
31 				RTE_COMP_FF_STATEFUL_DECOMPRESSION,
32 	 .window_size = {.min = 15, .max = 15, .increment = 0} },
33 	{RTE_COMP_ALGO_LIST_END, 0, {0, 0, 0} } };
34 
35 static void
36 qat_comp_stats_get(struct rte_compressdev *dev,
37 		struct rte_compressdev_stats *stats)
38 {
39 	struct qat_common_stats qat_stats = {0};
40 	struct qat_comp_dev_private *qat_priv;
41 
42 	if (stats == NULL || dev == NULL) {
43 		QAT_LOG(ERR, "invalid ptr: stats %p, dev %p", stats, dev);
44 		return;
45 	}
46 	qat_priv = dev->data->dev_private;
47 
48 	qat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_COMPRESSION);
49 	stats->enqueued_count = qat_stats.enqueued_count;
50 	stats->dequeued_count = qat_stats.dequeued_count;
51 	stats->enqueue_err_count = qat_stats.enqueue_err_count;
52 	stats->dequeue_err_count = qat_stats.dequeue_err_count;
53 }
54 
55 static void
56 qat_comp_stats_reset(struct rte_compressdev *dev)
57 {
58 	struct qat_comp_dev_private *qat_priv;
59 
60 	if (dev == NULL) {
61 		QAT_LOG(ERR, "invalid compressdev ptr %p", dev);
62 		return;
63 	}
64 	qat_priv = dev->data->dev_private;
65 
66 	qat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_COMPRESSION);
67 
68 }
69 
70 static int
71 qat_comp_qp_release(struct rte_compressdev *dev, uint16_t queue_pair_id)
72 {
73 	struct qat_comp_dev_private *qat_private = dev->data->dev_private;
74 	struct qat_qp **qp_addr =
75 		(struct qat_qp **)&(dev->data->queue_pairs[queue_pair_id]);
76 	struct qat_qp *qp = (struct qat_qp *)*qp_addr;
77 	uint32_t i;
78 
79 	QAT_LOG(DEBUG, "Release comp qp %u on device %d",
80 				queue_pair_id, dev->data->dev_id);
81 
82 	qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][queue_pair_id]
83 						= NULL;
84 
85 	for (i = 0; i < qp->nb_descriptors; i++) {
86 
87 		struct qat_comp_op_cookie *cookie = qp->op_cookies[i];
88 
89 		rte_free(cookie->qat_sgl_src_d);
90 		rte_free(cookie->qat_sgl_dst_d);
91 	}
92 
93 	return qat_qp_release((struct qat_qp **)
94 			&(dev->data->queue_pairs[queue_pair_id]));
95 }
96 
97 static int
98 qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
99 		  uint32_t max_inflight_ops, int socket_id)
100 {
101 	struct qat_qp *qp;
102 	int ret = 0;
103 	uint32_t i;
104 	struct qat_qp_config qat_qp_conf;
105 
106 	struct qat_qp **qp_addr =
107 			(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
108 	struct qat_comp_dev_private *qat_private = dev->data->dev_private;
109 	const struct qat_qp_hw_data *comp_hw_qps =
110 			qat_gen_config[qat_private->qat_dev->qat_dev_gen]
111 				      .qp_hw_data[QAT_SERVICE_COMPRESSION];
112 	const struct qat_qp_hw_data *qp_hw_data = comp_hw_qps + qp_id;
113 
114 	/* If qp is already in use free ring memory and qp metadata. */
115 	if (*qp_addr != NULL) {
116 		ret = qat_comp_qp_release(dev, qp_id);
117 		if (ret < 0)
118 			return ret;
119 	}
120 	if (qp_id >= qat_qps_per_service(comp_hw_qps,
121 					 QAT_SERVICE_COMPRESSION)) {
122 		QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
123 		return -EINVAL;
124 	}
125 
126 	qat_qp_conf.hw = qp_hw_data;
127 	qat_qp_conf.build_request = qat_comp_build_request;
128 	qat_qp_conf.cookie_size = sizeof(struct qat_comp_op_cookie);
129 	qat_qp_conf.nb_descriptors = max_inflight_ops;
130 	qat_qp_conf.socket_id = socket_id;
131 	qat_qp_conf.service_str = "comp";
132 
133 	ret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf);
134 	if (ret != 0)
135 		return ret;
136 
137 	/* store a link to the qp in the qat_pci_device */
138 	qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][qp_id]
139 								= *qp_addr;
140 
141 	qp = (struct qat_qp *)*qp_addr;
142 	qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;
143 
144 	for (i = 0; i < qp->nb_descriptors; i++) {
145 
146 		struct qat_comp_op_cookie *cookie =
147 				qp->op_cookies[i];
148 
149 		cookie->qat_sgl_src_d = rte_zmalloc_socket(NULL,
150 					sizeof(struct qat_sgl) +
151 					sizeof(struct qat_flat_buf) *
152 					QAT_PMD_COMP_SGL_DEF_SEGMENTS,
153 					64, dev->data->socket_id);
154 
155 		cookie->qat_sgl_dst_d = rte_zmalloc_socket(NULL,
156 					sizeof(struct qat_sgl) +
157 					sizeof(struct qat_flat_buf) *
158 					QAT_PMD_COMP_SGL_DEF_SEGMENTS,
159 					64, dev->data->socket_id);
160 
161 		if (cookie->qat_sgl_src_d == NULL ||
162 				cookie->qat_sgl_dst_d == NULL) {
163 			QAT_LOG(ERR, "Can't allocate SGL"
164 				     " for device %s",
165 				     qat_private->qat_dev->name);
166 			return -ENOMEM;
167 		}
168 
169 		cookie->qat_sgl_src_phys_addr =
170 				rte_malloc_virt2iova(cookie->qat_sgl_src_d);
171 
172 		cookie->qat_sgl_dst_phys_addr =
173 				rte_malloc_virt2iova(cookie->qat_sgl_dst_d);
174 
175 		cookie->dst_nb_elems = cookie->src_nb_elems =
176 				QAT_PMD_COMP_SGL_DEF_SEGMENTS;
177 
178 		cookie->socket_id = dev->data->socket_id;
179 
180 		cookie->error = 0;
181 	}
182 
183 	return ret;
184 }
185 
186 
187 #define QAT_IM_BUFFER_DEBUG 0
188 static const struct rte_memzone *
189 qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
190 			      uint32_t buff_size)
191 {
192 	char inter_buff_mz_name[RTE_MEMZONE_NAMESIZE];
193 	const struct rte_memzone *memzone;
194 	uint8_t *mz_start = NULL;
195 	rte_iova_t mz_start_phys = 0;
196 	struct array_of_ptrs *array_of_pointers;
197 	int size_of_ptr_array;
198 	uint32_t full_size;
199 	uint32_t offset_of_sgls, offset_of_flat_buffs = 0;
200 	int i;
201 	int num_im_sgls = qat_gen_config[
202 		comp_dev->qat_dev->qat_dev_gen].comp_num_im_bufs_required;
203 
204 	QAT_LOG(DEBUG, "QAT COMP device %s needs %d sgls",
205 				comp_dev->qat_dev->name, num_im_sgls);
206 	snprintf(inter_buff_mz_name, RTE_MEMZONE_NAMESIZE,
207 				"%s_inter_buff", comp_dev->qat_dev->name);
208 	memzone = rte_memzone_lookup(inter_buff_mz_name);
209 	if (memzone != NULL) {
210 		QAT_LOG(DEBUG, "QAT COMP im buffer memzone created already");
211 		return memzone;
212 	}
213 
214 	/* Create a memzone to hold intermediate buffers and associated
215 	 * meta-data needed by the firmware. The memzone contains 3 parts:
216 	 *  - a list of num_im_sgls physical pointers to sgls
217 	 *  - the num_im_sgl sgl structures, each pointing to
218 	 *    QAT_NUM_BUFS_IN_IM_SGL flat buffers
219 	 *  - the flat buffers: num_im_sgl * QAT_NUM_BUFS_IN_IM_SGL
220 	 *    buffers, each of buff_size
221 	 * num_im_sgls depends on the hardware generation of the device
222 	 * buff_size comes from the user via the config file
223 	 */
224 
225 	size_of_ptr_array = num_im_sgls * sizeof(phys_addr_t);
226 	offset_of_sgls = (size_of_ptr_array + (~QAT_64_BYTE_ALIGN_MASK))
227 			& QAT_64_BYTE_ALIGN_MASK;
228 	offset_of_flat_buffs =
229 	    offset_of_sgls + num_im_sgls * sizeof(struct qat_inter_sgl);
230 	full_size = offset_of_flat_buffs +
231 			num_im_sgls * buff_size * QAT_NUM_BUFS_IN_IM_SGL;
232 
233 	memzone = rte_memzone_reserve_aligned(inter_buff_mz_name, full_size,
234 			comp_dev->compressdev->data->socket_id,
235 			RTE_MEMZONE_IOVA_CONTIG, QAT_64_BYTE_ALIGN);
236 	if (memzone == NULL) {
237 		QAT_LOG(ERR, "Can't allocate intermediate buffers"
238 				" for device %s", comp_dev->qat_dev->name);
239 		return NULL;
240 	}
241 
242 	mz_start = (uint8_t *)memzone->addr;
243 	mz_start_phys = memzone->phys_addr;
244 	QAT_LOG(DEBUG, "Memzone %s: addr = %p, phys = 0x%"PRIx64
245 			", size required %d, size created %zu",
246 			inter_buff_mz_name, mz_start, mz_start_phys,
247 			full_size, memzone->len);
248 
249 	array_of_pointers = (struct array_of_ptrs *)mz_start;
250 	for (i = 0; i < num_im_sgls; i++) {
251 		uint32_t curr_sgl_offset =
252 		    offset_of_sgls + i * sizeof(struct qat_inter_sgl);
253 		struct qat_inter_sgl *sgl =
254 		    (struct qat_inter_sgl *)(mz_start +	curr_sgl_offset);
255 		int lb;
256 		array_of_pointers->pointer[i] = mz_start_phys + curr_sgl_offset;
257 
258 		sgl->num_bufs = QAT_NUM_BUFS_IN_IM_SGL;
259 		sgl->num_mapped_bufs = 0;
260 		sgl->resrvd = 0;
261 
262 #if QAT_IM_BUFFER_DEBUG
263 		QAT_LOG(DEBUG, "  : phys addr of sgl[%i] in array_of_pointers"
264 			" = 0x%"PRIx64, i, array_of_pointers->pointer[i]);
265 		QAT_LOG(DEBUG, "  : virt address of sgl[%i] = %p", i, sgl);
266 #endif
267 		for (lb = 0; lb < QAT_NUM_BUFS_IN_IM_SGL; lb++) {
268 			sgl->buffers[lb].addr =
269 			  mz_start_phys + offset_of_flat_buffs +
270 			  (((i * QAT_NUM_BUFS_IN_IM_SGL) + lb) * buff_size);
271 			sgl->buffers[lb].len = buff_size;
272 			sgl->buffers[lb].resrvd = 0;
273 #if QAT_IM_BUFFER_DEBUG
274 			QAT_LOG(DEBUG,
275 			  "  : sgl->buffers[%d].addr = 0x%"PRIx64", len=%d",
276 			  lb, sgl->buffers[lb].addr, sgl->buffers[lb].len);
277 #endif
278 		}
279 	}
280 #if QAT_IM_BUFFER_DEBUG
281 	QAT_DP_HEXDUMP_LOG(DEBUG,  "IM buffer memzone start:",
282 			mz_start, offset_of_flat_buffs + 32);
283 #endif
284 	return memzone;
285 }
286 
287 static struct rte_mempool *
288 qat_comp_create_xform_pool(struct qat_comp_dev_private *comp_dev,
289 			   struct rte_compressdev_config *config,
290 			   uint32_t num_elements)
291 {
292 	char xform_pool_name[RTE_MEMPOOL_NAMESIZE];
293 	struct rte_mempool *mp;
294 
295 	snprintf(xform_pool_name, RTE_MEMPOOL_NAMESIZE,
296 			"%s_xforms", comp_dev->qat_dev->name);
297 
298 	QAT_LOG(DEBUG, "xformpool: %s", xform_pool_name);
299 	mp = rte_mempool_lookup(xform_pool_name);
300 
301 	if (mp != NULL) {
302 		QAT_LOG(DEBUG, "xformpool already created");
303 		if (mp->size != num_elements) {
304 			QAT_LOG(DEBUG, "xformpool wrong size - delete it");
305 			rte_mempool_free(mp);
306 			mp = NULL;
307 			comp_dev->xformpool = NULL;
308 		}
309 	}
310 
311 	if (mp == NULL)
312 		mp = rte_mempool_create(xform_pool_name,
313 				num_elements,
314 				qat_comp_xform_size(), 0, 0,
315 				NULL, NULL, NULL, NULL, config->socket_id,
316 				0);
317 	if (mp == NULL) {
318 		QAT_LOG(ERR, "Err creating mempool %s w %d elements of size %d",
319 			xform_pool_name, num_elements, qat_comp_xform_size());
320 		return NULL;
321 	}
322 
323 	return mp;
324 }
325 
326 static void
327 qat_comp_stream_init(struct rte_mempool *mp __rte_unused, void *opaque,
328 		     void *obj, unsigned int obj_idx)
329 {
330 	struct stream_create_info *info = opaque;
331 	struct qat_comp_stream *stream = obj;
332 	char mz_name[RTE_MEMZONE_NAMESIZE];
333 	const struct rte_memzone *memzone;
334 	struct qat_inter_sgl *ram_banks_desc;
335 
336 	/* find a memzone for RAM banks */
337 	snprintf(mz_name, RTE_MEMZONE_NAMESIZE, "%s_%u_rambanks",
338 		 info->comp_dev->qat_dev->name, obj_idx);
339 	memzone = rte_memzone_lookup(mz_name);
340 	if (memzone == NULL) {
341 		/* allocate a memzone for compression state and RAM banks */
342 		memzone = rte_memzone_reserve_aligned(mz_name,
343 			QAT_STATE_REGISTERS_MAX_SIZE
344 				+ sizeof(struct qat_inter_sgl)
345 				+ QAT_INFLATE_CONTEXT_SIZE,
346 			info->socket_id,
347 			RTE_MEMZONE_IOVA_CONTIG, QAT_64_BYTE_ALIGN);
348 		if (memzone == NULL) {
349 			QAT_LOG(ERR,
350 			    "Can't allocate RAM banks for device %s, object %u",
351 				info->comp_dev->qat_dev->name, obj_idx);
352 			info->error = -ENOMEM;
353 			return;
354 		}
355 	}
356 
357 	/* prepare the buffer list descriptor for RAM banks */
358 	ram_banks_desc = (struct qat_inter_sgl *)
359 		(((uint8_t *) memzone->addr) + QAT_STATE_REGISTERS_MAX_SIZE);
360 	ram_banks_desc->num_bufs = 1;
361 	ram_banks_desc->buffers[0].len = QAT_INFLATE_CONTEXT_SIZE;
362 	ram_banks_desc->buffers[0].addr = memzone->iova
363 			+ QAT_STATE_REGISTERS_MAX_SIZE
364 			+ sizeof(struct qat_inter_sgl);
365 
366 	memset(stream, 0, qat_comp_stream_size());
367 	stream->memzone = memzone;
368 	stream->state_registers_decomp = memzone->addr;
369 	stream->state_registers_decomp_phys = memzone->iova;
370 	stream->inflate_context = ((uint8_t *) memzone->addr)
371 			+ QAT_STATE_REGISTERS_MAX_SIZE;
372 	stream->inflate_context_phys = memzone->iova
373 			+ QAT_STATE_REGISTERS_MAX_SIZE;
374 }
375 
376 static void
377 qat_comp_stream_destroy(struct rte_mempool *mp __rte_unused,
378 			void *opaque __rte_unused, void *obj,
379 			unsigned obj_idx __rte_unused)
380 {
381 	struct qat_comp_stream *stream = obj;
382 
383 	rte_memzone_free(stream->memzone);
384 }
385 
386 static struct rte_mempool *
387 qat_comp_create_stream_pool(struct qat_comp_dev_private *comp_dev,
388 			    int socket_id,
389 			    uint32_t num_elements)
390 {
391 	char stream_pool_name[RTE_MEMPOOL_NAMESIZE];
392 	struct rte_mempool *mp;
393 
394 	snprintf(stream_pool_name, RTE_MEMPOOL_NAMESIZE,
395 		 "%s_streams", comp_dev->qat_dev->name);
396 
397 	QAT_LOG(DEBUG, "streampool: %s", stream_pool_name);
398 	mp = rte_mempool_lookup(stream_pool_name);
399 
400 	if (mp != NULL) {
401 		QAT_LOG(DEBUG, "streampool already created");
402 		if (mp->size != num_elements) {
403 			QAT_LOG(DEBUG, "streampool wrong size - delete it");
404 			rte_mempool_obj_iter(mp, qat_comp_stream_destroy, NULL);
405 			rte_mempool_free(mp);
406 			mp = NULL;
407 			comp_dev->streampool = NULL;
408 		}
409 	}
410 
411 	if (mp == NULL) {
412 		struct stream_create_info info = {
413 			.comp_dev = comp_dev,
414 			.socket_id = socket_id,
415 			.error = 0
416 		};
417 		mp = rte_mempool_create(stream_pool_name,
418 				num_elements,
419 				qat_comp_stream_size(), 0, 0,
420 				NULL, NULL, qat_comp_stream_init, &info,
421 				socket_id, 0);
422 		if (mp == NULL) {
423 			QAT_LOG(ERR,
424 			     "Err creating mempool %s w %d elements of size %d",
425 			     stream_pool_name, num_elements,
426 			     qat_comp_stream_size());
427 		} else if (info.error) {
428 			rte_mempool_obj_iter(mp, qat_comp_stream_destroy, NULL);
429 			QAT_LOG(ERR,
430 			     "Destoying mempool %s as at least one element failed initialisation",
431 			     stream_pool_name);
432 			rte_mempool_free(mp);
433 			mp = NULL;
434 		}
435 	}
436 
437 	return mp;
438 }
439 
440 static void
441 _qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev)
442 {
443 	/* Free intermediate buffers */
444 	if (comp_dev->interm_buff_mz) {
445 		rte_memzone_free(comp_dev->interm_buff_mz);
446 		comp_dev->interm_buff_mz = NULL;
447 	}
448 
449 	/* Free private_xform pool */
450 	if (comp_dev->xformpool) {
451 		/* Free internal mempool for private xforms */
452 		rte_mempool_free(comp_dev->xformpool);
453 		comp_dev->xformpool = NULL;
454 	}
455 
456 	/* Free stream pool */
457 	if (comp_dev->streampool) {
458 		rte_mempool_obj_iter(comp_dev->streampool,
459 				     qat_comp_stream_destroy, NULL);
460 		rte_mempool_free(comp_dev->streampool);
461 		comp_dev->streampool = NULL;
462 	}
463 }
464 
465 static int
466 qat_comp_dev_config(struct rte_compressdev *dev,
467 		struct rte_compressdev_config *config)
468 {
469 	struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
470 	int ret = 0;
471 
472 	if (RTE_PMD_QAT_COMP_IM_BUFFER_SIZE == 0) {
473 		QAT_LOG(WARNING,
474 			"RTE_PMD_QAT_COMP_IM_BUFFER_SIZE = 0 in config file, so"
475 			" QAT device can't be used for Dynamic Deflate. "
476 			"Did you really intend to do this?");
477 	} else {
478 		comp_dev->interm_buff_mz =
479 				qat_comp_setup_inter_buffers(comp_dev,
480 					RTE_PMD_QAT_COMP_IM_BUFFER_SIZE);
481 		if (comp_dev->interm_buff_mz == NULL) {
482 			ret = -ENOMEM;
483 			goto error_out;
484 		}
485 	}
486 
487 	if (config->max_nb_priv_xforms) {
488 		comp_dev->xformpool = qat_comp_create_xform_pool(comp_dev,
489 					    config, config->max_nb_priv_xforms);
490 		if (comp_dev->xformpool == NULL) {
491 			ret = -ENOMEM;
492 			goto error_out;
493 		}
494 	} else
495 		comp_dev->xformpool = NULL;
496 
497 	if (config->max_nb_streams) {
498 		comp_dev->streampool = qat_comp_create_stream_pool(comp_dev,
499 				     config->socket_id, config->max_nb_streams);
500 		if (comp_dev->streampool == NULL) {
501 			ret = -ENOMEM;
502 			goto error_out;
503 		}
504 	} else
505 		comp_dev->streampool = NULL;
506 
507 	return 0;
508 
509 error_out:
510 	_qat_comp_dev_config_clear(comp_dev);
511 	return ret;
512 }
513 
514 static int
515 qat_comp_dev_start(struct rte_compressdev *dev __rte_unused)
516 {
517 	return 0;
518 }
519 
520 static void
521 qat_comp_dev_stop(struct rte_compressdev *dev __rte_unused)
522 {
523 
524 }
525 
526 static int
527 qat_comp_dev_close(struct rte_compressdev *dev)
528 {
529 	int i;
530 	int ret = 0;
531 	struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
532 
533 	for (i = 0; i < dev->data->nb_queue_pairs; i++) {
534 		ret = qat_comp_qp_release(dev, i);
535 		if (ret < 0)
536 			return ret;
537 	}
538 
539 	_qat_comp_dev_config_clear(comp_dev);
540 
541 	return ret;
542 }
543 
544 
545 static void
546 qat_comp_dev_info_get(struct rte_compressdev *dev,
547 			struct rte_compressdev_info *info)
548 {
549 	struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
550 	const struct qat_qp_hw_data *comp_hw_qps =
551 		qat_gen_config[comp_dev->qat_dev->qat_dev_gen]
552 			      .qp_hw_data[QAT_SERVICE_COMPRESSION];
553 
554 	if (info != NULL) {
555 		info->max_nb_queue_pairs =
556 			qat_qps_per_service(comp_hw_qps,
557 					    QAT_SERVICE_COMPRESSION);
558 		info->feature_flags = dev->feature_flags;
559 		info->capabilities = comp_dev->qat_dev_capabilities;
560 	}
561 }
562 
563 static uint16_t
564 qat_comp_pmd_enqueue_op_burst(void *qp, struct rte_comp_op **ops,
565 		uint16_t nb_ops)
566 {
567 	return qat_enqueue_op_burst(qp, (void **)ops, nb_ops);
568 }
569 
570 static uint16_t
571 qat_comp_pmd_dequeue_op_burst(void *qp, struct rte_comp_op **ops,
572 			      uint16_t nb_ops)
573 {
574 	return qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
575 }
576 
577 static uint16_t
578 qat_comp_pmd_enq_deq_dummy_op_burst(void *qp __rte_unused,
579 				    struct rte_comp_op **ops __rte_unused,
580 				    uint16_t nb_ops __rte_unused)
581 {
582 	QAT_DP_LOG(ERR, "QAT PMD detected wrong FW version !");
583 	return 0;
584 }
585 
586 static struct rte_compressdev_ops compress_qat_dummy_ops = {
587 
588 	/* Device related operations */
589 	.dev_configure		= NULL,
590 	.dev_start		= NULL,
591 	.dev_stop		= qat_comp_dev_stop,
592 	.dev_close		= qat_comp_dev_close,
593 	.dev_infos_get		= NULL,
594 
595 	.stats_get		= NULL,
596 	.stats_reset		= qat_comp_stats_reset,
597 	.queue_pair_setup	= NULL,
598 	.queue_pair_release	= qat_comp_qp_release,
599 
600 	/* Compression related operations */
601 	.private_xform_create	= NULL,
602 	.private_xform_free	= qat_comp_private_xform_free
603 };
604 
605 static uint16_t
606 qat_comp_pmd_dequeue_frst_op_burst(void *qp, struct rte_comp_op **ops,
607 				   uint16_t nb_ops)
608 {
609 	uint16_t ret = qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
610 	struct qat_qp *tmp_qp = (struct qat_qp *)qp;
611 
612 	if (ret) {
613 		if ((*ops)->debug_status ==
614 				(uint64_t)ERR_CODE_QAT_COMP_WRONG_FW) {
615 			tmp_qp->qat_dev->comp_dev->compressdev->enqueue_burst =
616 					qat_comp_pmd_enq_deq_dummy_op_burst;
617 			tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst =
618 					qat_comp_pmd_enq_deq_dummy_op_burst;
619 
620 			tmp_qp->qat_dev->comp_dev->compressdev->dev_ops =
621 					&compress_qat_dummy_ops;
622 			QAT_LOG(ERR, "QAT PMD detected wrong FW version !");
623 
624 		} else {
625 			tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst =
626 					qat_comp_pmd_dequeue_op_burst;
627 		}
628 	}
629 	return ret;
630 }
631 
632 static struct rte_compressdev_ops compress_qat_ops = {
633 
634 	/* Device related operations */
635 	.dev_configure		= qat_comp_dev_config,
636 	.dev_start		= qat_comp_dev_start,
637 	.dev_stop		= qat_comp_dev_stop,
638 	.dev_close		= qat_comp_dev_close,
639 	.dev_infos_get		= qat_comp_dev_info_get,
640 
641 	.stats_get		= qat_comp_stats_get,
642 	.stats_reset		= qat_comp_stats_reset,
643 	.queue_pair_setup	= qat_comp_qp_setup,
644 	.queue_pair_release	= qat_comp_qp_release,
645 
646 	/* Compression related operations */
647 	.private_xform_create	= qat_comp_private_xform_create,
648 	.private_xform_free	= qat_comp_private_xform_free,
649 	.stream_create		= qat_comp_stream_create,
650 	.stream_free		= qat_comp_stream_free
651 };
652 
653 /* An rte_driver is needed in the registration of the device with compressdev.
654  * The actual qat pci's rte_driver can't be used as its name represents
655  * the whole pci device with all services. Think of this as a holder for a name
656  * for the compression part of the pci device.
657  */
658 static const char qat_comp_drv_name[] = RTE_STR(COMPRESSDEV_NAME_QAT_PMD);
659 static const struct rte_driver compdev_qat_driver = {
660 	.name = qat_comp_drv_name,
661 	.alias = qat_comp_drv_name
662 };
663 int
664 qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
665 		struct qat_dev_cmd_param *qat_dev_cmd_param)
666 {
667 	int i = 0;
668 	if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
669 		QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");
670 		return 0;
671 	}
672 
673 	struct rte_compressdev_pmd_init_params init_params = {
674 		.name = "",
675 		.socket_id = qat_pci_dev->pci_dev->device.numa_node,
676 	};
677 	char name[RTE_COMPRESSDEV_NAME_MAX_LEN];
678 	struct rte_compressdev *compressdev;
679 	struct qat_comp_dev_private *comp_dev;
680 
681 	snprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN, "%s_%s",
682 			qat_pci_dev->name, "comp");
683 	QAT_LOG(DEBUG, "Creating QAT COMP device %s", name);
684 
685 	/* Populate subset device to use in compressdev device creation */
686 	qat_pci_dev->comp_rte_dev.driver = &compdev_qat_driver;
687 	qat_pci_dev->comp_rte_dev.numa_node =
688 					qat_pci_dev->pci_dev->device.numa_node;
689 	qat_pci_dev->comp_rte_dev.devargs = NULL;
690 
691 	compressdev = rte_compressdev_pmd_create(name,
692 			&(qat_pci_dev->comp_rte_dev),
693 			sizeof(struct qat_comp_dev_private),
694 			&init_params);
695 
696 	if (compressdev == NULL)
697 		return -ENODEV;
698 
699 	compressdev->dev_ops = &compress_qat_ops;
700 
701 	compressdev->enqueue_burst = qat_comp_pmd_enqueue_op_burst;
702 	compressdev->dequeue_burst = qat_comp_pmd_dequeue_frst_op_burst;
703 
704 	compressdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;
705 
706 	comp_dev = compressdev->data->dev_private;
707 	comp_dev->qat_dev = qat_pci_dev;
708 	comp_dev->compressdev = compressdev;
709 	qat_pci_dev->comp_dev = comp_dev;
710 
711 	switch (qat_pci_dev->qat_dev_gen) {
712 	case QAT_GEN1:
713 	case QAT_GEN2:
714 	case QAT_GEN3:
715 		comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;
716 		break;
717 	default:
718 		comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;
719 		QAT_LOG(DEBUG,
720 			"QAT gen %d capabilities unknown, default to GEN1",
721 					qat_pci_dev->qat_dev_gen);
722 		break;
723 	}
724 
725 	while (1) {
726 		if (qat_dev_cmd_param[i].name == NULL)
727 			break;
728 		if (!strcmp(qat_dev_cmd_param[i].name, COMP_ENQ_THRESHOLD_NAME))
729 			comp_dev->min_enq_burst_threshold =
730 					qat_dev_cmd_param[i].val;
731 		i++;
732 	}
733 
734 	QAT_LOG(DEBUG,
735 		    "Created QAT COMP device %s as compressdev instance %d",
736 			name, compressdev->data->dev_id);
737 	return 0;
738 }
739 
740 int
741 qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev)
742 {
743 	struct qat_comp_dev_private *comp_dev;
744 
745 	if (qat_pci_dev == NULL)
746 		return -ENODEV;
747 
748 	comp_dev = qat_pci_dev->comp_dev;
749 	if (comp_dev == NULL)
750 		return 0;
751 
752 	/* clean up any resources used by the device */
753 	qat_comp_dev_close(comp_dev->compressdev);
754 
755 	rte_compressdev_pmd_destroy(comp_dev->compressdev);
756 	qat_pci_dev->comp_dev = NULL;
757 
758 	return 0;
759 }
760