xref: /dpdk/drivers/compress/qat/qat_comp_pmd.c (revision c13cecf60f128cc6ae89557d9799f4f92d785cdc)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2015-2019 Intel Corporation
3  */
4 
5 #include <rte_malloc.h>
6 
7 #include "qat_comp.h"
8 #include "qat_comp_pmd.h"
9 
10 #define QAT_PMD_COMP_SGL_DEF_SEGMENTS 16
11 
12 struct stream_create_info {
13 	struct qat_comp_dev_private *comp_dev;
14 	int socket_id;
15 	int error;
16 };
17 
18 static const struct rte_compressdev_capabilities qat_comp_gen_capabilities[] = {
19 	{/* COMPRESSION - deflate */
20 	 .algo = RTE_COMP_ALGO_DEFLATE,
21 	 .comp_feature_flags = RTE_COMP_FF_MULTI_PKT_CHECKSUM |
22 				RTE_COMP_FF_CRC32_CHECKSUM |
23 				RTE_COMP_FF_ADLER32_CHECKSUM |
24 				RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
25 				RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
26 				RTE_COMP_FF_HUFFMAN_FIXED |
27 				RTE_COMP_FF_HUFFMAN_DYNAMIC |
28 				RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
29 				RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
30 				RTE_COMP_FF_OOP_LB_IN_SGL_OUT |
31 				RTE_COMP_FF_STATEFUL_DECOMPRESSION,
32 	 .window_size = {.min = 15, .max = 15, .increment = 0} },
33 	{RTE_COMP_ALGO_LIST_END, 0, {0, 0, 0} } };
34 
35 static void
36 qat_comp_stats_get(struct rte_compressdev *dev,
37 		struct rte_compressdev_stats *stats)
38 {
39 	struct qat_common_stats qat_stats = {0};
40 	struct qat_comp_dev_private *qat_priv;
41 
42 	if (stats == NULL || dev == NULL) {
43 		QAT_LOG(ERR, "invalid ptr: stats %p, dev %p", stats, dev);
44 		return;
45 	}
46 	qat_priv = dev->data->dev_private;
47 
48 	qat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_COMPRESSION);
49 	stats->enqueued_count = qat_stats.enqueued_count;
50 	stats->dequeued_count = qat_stats.dequeued_count;
51 	stats->enqueue_err_count = qat_stats.enqueue_err_count;
52 	stats->dequeue_err_count = qat_stats.dequeue_err_count;
53 }
54 
55 static void
56 qat_comp_stats_reset(struct rte_compressdev *dev)
57 {
58 	struct qat_comp_dev_private *qat_priv;
59 
60 	if (dev == NULL) {
61 		QAT_LOG(ERR, "invalid compressdev ptr %p", dev);
62 		return;
63 	}
64 	qat_priv = dev->data->dev_private;
65 
66 	qat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_COMPRESSION);
67 
68 }
69 
70 static int
71 qat_comp_qp_release(struct rte_compressdev *dev, uint16_t queue_pair_id)
72 {
73 	struct qat_comp_dev_private *qat_private = dev->data->dev_private;
74 	struct qat_qp **qp_addr =
75 		(struct qat_qp **)&(dev->data->queue_pairs[queue_pair_id]);
76 	struct qat_qp *qp = (struct qat_qp *)*qp_addr;
77 	uint32_t i;
78 
79 	QAT_LOG(DEBUG, "Release comp qp %u on device %d",
80 				queue_pair_id, dev->data->dev_id);
81 
82 	qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][queue_pair_id]
83 						= NULL;
84 
85 	for (i = 0; i < qp->nb_descriptors; i++) {
86 
87 		struct qat_comp_op_cookie *cookie = qp->op_cookies[i];
88 
89 		rte_free(cookie->qat_sgl_src_d);
90 		rte_free(cookie->qat_sgl_dst_d);
91 	}
92 
93 	return qat_qp_release((struct qat_qp **)
94 			&(dev->data->queue_pairs[queue_pair_id]));
95 }
96 
97 static int
98 qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
99 		  uint32_t max_inflight_ops, int socket_id)
100 {
101 	struct qat_qp *qp;
102 	int ret = 0;
103 	uint32_t i;
104 	struct qat_qp_config qat_qp_conf;
105 
106 	struct qat_qp **qp_addr =
107 			(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
108 	struct qat_comp_dev_private *qat_private = dev->data->dev_private;
109 	const struct qat_qp_hw_data *comp_hw_qps =
110 			qat_gen_config[qat_private->qat_dev->qat_dev_gen]
111 				      .qp_hw_data[QAT_SERVICE_COMPRESSION];
112 	const struct qat_qp_hw_data *qp_hw_data = comp_hw_qps + qp_id;
113 
114 	/* If qp is already in use free ring memory and qp metadata. */
115 	if (*qp_addr != NULL) {
116 		ret = qat_comp_qp_release(dev, qp_id);
117 		if (ret < 0)
118 			return ret;
119 	}
120 	if (qp_id >= qat_qps_per_service(comp_hw_qps,
121 					 QAT_SERVICE_COMPRESSION)) {
122 		QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
123 		return -EINVAL;
124 	}
125 
126 	qat_qp_conf.hw = qp_hw_data;
127 	qat_qp_conf.build_request = qat_comp_build_request;
128 	qat_qp_conf.cookie_size = sizeof(struct qat_comp_op_cookie);
129 	qat_qp_conf.nb_descriptors = max_inflight_ops;
130 	qat_qp_conf.socket_id = socket_id;
131 	qat_qp_conf.service_str = "comp";
132 
133 	ret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf);
134 	if (ret != 0)
135 		return ret;
136 
137 	/* store a link to the qp in the qat_pci_device */
138 	qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][qp_id]
139 								= *qp_addr;
140 
141 	qp = (struct qat_qp *)*qp_addr;
142 	qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;
143 
144 	for (i = 0; i < qp->nb_descriptors; i++) {
145 
146 		struct qat_comp_op_cookie *cookie =
147 				qp->op_cookies[i];
148 
149 		cookie->qp = qp;
150 		cookie->cookie_index = i;
151 
152 		cookie->qat_sgl_src_d = rte_zmalloc_socket(NULL,
153 					sizeof(struct qat_sgl) +
154 					sizeof(struct qat_flat_buf) *
155 					QAT_PMD_COMP_SGL_DEF_SEGMENTS,
156 					64, dev->data->socket_id);
157 
158 		cookie->qat_sgl_dst_d = rte_zmalloc_socket(NULL,
159 					sizeof(struct qat_sgl) +
160 					sizeof(struct qat_flat_buf) *
161 					QAT_PMD_COMP_SGL_DEF_SEGMENTS,
162 					64, dev->data->socket_id);
163 
164 		if (cookie->qat_sgl_src_d == NULL ||
165 				cookie->qat_sgl_dst_d == NULL) {
166 			QAT_LOG(ERR, "Can't allocate SGL"
167 				     " for device %s",
168 				     qat_private->qat_dev->name);
169 			return -ENOMEM;
170 		}
171 
172 		cookie->qat_sgl_src_phys_addr =
173 				rte_malloc_virt2iova(cookie->qat_sgl_src_d);
174 
175 		cookie->qat_sgl_dst_phys_addr =
176 				rte_malloc_virt2iova(cookie->qat_sgl_dst_d);
177 
178 		cookie->dst_nb_elems = cookie->src_nb_elems =
179 				QAT_PMD_COMP_SGL_DEF_SEGMENTS;
180 
181 		cookie->socket_id = dev->data->socket_id;
182 
183 		cookie->error = 0;
184 	}
185 
186 	return ret;
187 }
188 
189 
190 #define QAT_IM_BUFFER_DEBUG 0
191 static const struct rte_memzone *
192 qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
193 			      uint32_t buff_size)
194 {
195 	char inter_buff_mz_name[RTE_MEMZONE_NAMESIZE];
196 	const struct rte_memzone *memzone;
197 	uint8_t *mz_start = NULL;
198 	rte_iova_t mz_start_phys = 0;
199 	struct array_of_ptrs *array_of_pointers;
200 	int size_of_ptr_array;
201 	uint32_t full_size;
202 	uint32_t offset_of_sgls, offset_of_flat_buffs = 0;
203 	int i;
204 	int num_im_sgls = qat_gen_config[
205 		comp_dev->qat_dev->qat_dev_gen].comp_num_im_bufs_required;
206 
207 	QAT_LOG(DEBUG, "QAT COMP device %s needs %d sgls",
208 				comp_dev->qat_dev->name, num_im_sgls);
209 	snprintf(inter_buff_mz_name, RTE_MEMZONE_NAMESIZE,
210 				"%s_inter_buff", comp_dev->qat_dev->name);
211 	memzone = rte_memzone_lookup(inter_buff_mz_name);
212 	if (memzone != NULL) {
213 		QAT_LOG(DEBUG, "QAT COMP im buffer memzone created already");
214 		return memzone;
215 	}
216 
217 	/* Create a memzone to hold intermediate buffers and associated
218 	 * meta-data needed by the firmware. The memzone contains 3 parts:
219 	 *  - a list of num_im_sgls physical pointers to sgls
220 	 *  - the num_im_sgl sgl structures, each pointing to
221 	 *    QAT_NUM_BUFS_IN_IM_SGL flat buffers
222 	 *  - the flat buffers: num_im_sgl * QAT_NUM_BUFS_IN_IM_SGL
223 	 *    buffers, each of buff_size
224 	 * num_im_sgls depends on the hardware generation of the device
225 	 * buff_size comes from the user via the config file
226 	 */
227 
228 	size_of_ptr_array = num_im_sgls * sizeof(phys_addr_t);
229 	offset_of_sgls = (size_of_ptr_array + (~QAT_64_BYTE_ALIGN_MASK))
230 			& QAT_64_BYTE_ALIGN_MASK;
231 	offset_of_flat_buffs =
232 	    offset_of_sgls + num_im_sgls * sizeof(struct qat_inter_sgl);
233 	full_size = offset_of_flat_buffs +
234 			num_im_sgls * buff_size * QAT_NUM_BUFS_IN_IM_SGL;
235 
236 	memzone = rte_memzone_reserve_aligned(inter_buff_mz_name, full_size,
237 			comp_dev->compressdev->data->socket_id,
238 			RTE_MEMZONE_IOVA_CONTIG, QAT_64_BYTE_ALIGN);
239 	if (memzone == NULL) {
240 		QAT_LOG(ERR, "Can't allocate intermediate buffers"
241 				" for device %s", comp_dev->qat_dev->name);
242 		return NULL;
243 	}
244 
245 	mz_start = (uint8_t *)memzone->addr;
246 	mz_start_phys = memzone->phys_addr;
247 	QAT_LOG(DEBUG, "Memzone %s: addr = %p, phys = 0x%"PRIx64
248 			", size required %d, size created %zu",
249 			inter_buff_mz_name, mz_start, mz_start_phys,
250 			full_size, memzone->len);
251 
252 	array_of_pointers = (struct array_of_ptrs *)mz_start;
253 	for (i = 0; i < num_im_sgls; i++) {
254 		uint32_t curr_sgl_offset =
255 		    offset_of_sgls + i * sizeof(struct qat_inter_sgl);
256 		struct qat_inter_sgl *sgl =
257 		    (struct qat_inter_sgl *)(mz_start +	curr_sgl_offset);
258 		int lb;
259 		array_of_pointers->pointer[i] = mz_start_phys + curr_sgl_offset;
260 
261 		sgl->num_bufs = QAT_NUM_BUFS_IN_IM_SGL;
262 		sgl->num_mapped_bufs = 0;
263 		sgl->resrvd = 0;
264 
265 #if QAT_IM_BUFFER_DEBUG
266 		QAT_LOG(DEBUG, "  : phys addr of sgl[%i] in array_of_pointers"
267 			" = 0x%"PRIx64, i, array_of_pointers->pointer[i]);
268 		QAT_LOG(DEBUG, "  : virt address of sgl[%i] = %p", i, sgl);
269 #endif
270 		for (lb = 0; lb < QAT_NUM_BUFS_IN_IM_SGL; lb++) {
271 			sgl->buffers[lb].addr =
272 			  mz_start_phys + offset_of_flat_buffs +
273 			  (((i * QAT_NUM_BUFS_IN_IM_SGL) + lb) * buff_size);
274 			sgl->buffers[lb].len = buff_size;
275 			sgl->buffers[lb].resrvd = 0;
276 #if QAT_IM_BUFFER_DEBUG
277 			QAT_LOG(DEBUG,
278 			  "  : sgl->buffers[%d].addr = 0x%"PRIx64", len=%d",
279 			  lb, sgl->buffers[lb].addr, sgl->buffers[lb].len);
280 #endif
281 		}
282 	}
283 #if QAT_IM_BUFFER_DEBUG
284 	QAT_DP_HEXDUMP_LOG(DEBUG,  "IM buffer memzone start:",
285 			mz_start, offset_of_flat_buffs + 32);
286 #endif
287 	return memzone;
288 }
289 
290 static struct rte_mempool *
291 qat_comp_create_xform_pool(struct qat_comp_dev_private *comp_dev,
292 			   struct rte_compressdev_config *config,
293 			   uint32_t num_elements)
294 {
295 	char xform_pool_name[RTE_MEMPOOL_NAMESIZE];
296 	struct rte_mempool *mp;
297 
298 	snprintf(xform_pool_name, RTE_MEMPOOL_NAMESIZE,
299 			"%s_xforms", comp_dev->qat_dev->name);
300 
301 	QAT_LOG(DEBUG, "xformpool: %s", xform_pool_name);
302 	mp = rte_mempool_lookup(xform_pool_name);
303 
304 	if (mp != NULL) {
305 		QAT_LOG(DEBUG, "xformpool already created");
306 		if (mp->size != num_elements) {
307 			QAT_LOG(DEBUG, "xformpool wrong size - delete it");
308 			rte_mempool_free(mp);
309 			mp = NULL;
310 			comp_dev->xformpool = NULL;
311 		}
312 	}
313 
314 	if (mp == NULL)
315 		mp = rte_mempool_create(xform_pool_name,
316 				num_elements,
317 				qat_comp_xform_size(), 0, 0,
318 				NULL, NULL, NULL, NULL, config->socket_id,
319 				0);
320 	if (mp == NULL) {
321 		QAT_LOG(ERR, "Err creating mempool %s w %d elements of size %d",
322 			xform_pool_name, num_elements, qat_comp_xform_size());
323 		return NULL;
324 	}
325 
326 	return mp;
327 }
328 
329 static void
330 qat_comp_stream_init(struct rte_mempool *mp __rte_unused, void *opaque,
331 		     void *obj, unsigned int obj_idx)
332 {
333 	struct stream_create_info *info = opaque;
334 	struct qat_comp_stream *stream = obj;
335 	char mz_name[RTE_MEMZONE_NAMESIZE];
336 	const struct rte_memzone *memzone;
337 	struct qat_inter_sgl *ram_banks_desc;
338 
339 	/* find a memzone for RAM banks */
340 	snprintf(mz_name, RTE_MEMZONE_NAMESIZE, "%s_%u_rambanks",
341 		 info->comp_dev->qat_dev->name, obj_idx);
342 	memzone = rte_memzone_lookup(mz_name);
343 	if (memzone == NULL) {
344 		/* allocate a memzone for compression state and RAM banks */
345 		memzone = rte_memzone_reserve_aligned(mz_name,
346 			QAT_STATE_REGISTERS_MAX_SIZE
347 				+ sizeof(struct qat_inter_sgl)
348 				+ QAT_INFLATE_CONTEXT_SIZE,
349 			info->socket_id,
350 			RTE_MEMZONE_IOVA_CONTIG, QAT_64_BYTE_ALIGN);
351 		if (memzone == NULL) {
352 			QAT_LOG(ERR,
353 			    "Can't allocate RAM banks for device %s, object %u",
354 				info->comp_dev->qat_dev->name, obj_idx);
355 			info->error = -ENOMEM;
356 			return;
357 		}
358 	}
359 
360 	/* prepare the buffer list descriptor for RAM banks */
361 	ram_banks_desc = (struct qat_inter_sgl *)
362 		(((uint8_t *) memzone->addr) + QAT_STATE_REGISTERS_MAX_SIZE);
363 	ram_banks_desc->num_bufs = 1;
364 	ram_banks_desc->buffers[0].len = QAT_INFLATE_CONTEXT_SIZE;
365 	ram_banks_desc->buffers[0].addr = memzone->iova
366 			+ QAT_STATE_REGISTERS_MAX_SIZE
367 			+ sizeof(struct qat_inter_sgl);
368 
369 	memset(stream, 0, qat_comp_stream_size());
370 	stream->memzone = memzone;
371 	stream->state_registers_decomp = memzone->addr;
372 	stream->state_registers_decomp_phys = memzone->iova;
373 	stream->inflate_context = ((uint8_t *) memzone->addr)
374 			+ QAT_STATE_REGISTERS_MAX_SIZE;
375 	stream->inflate_context_phys = memzone->iova
376 			+ QAT_STATE_REGISTERS_MAX_SIZE;
377 }
378 
379 static void
380 qat_comp_stream_destroy(struct rte_mempool *mp __rte_unused,
381 			void *opaque __rte_unused, void *obj,
382 			unsigned obj_idx __rte_unused)
383 {
384 	struct qat_comp_stream *stream = obj;
385 
386 	rte_memzone_free(stream->memzone);
387 }
388 
389 static struct rte_mempool *
390 qat_comp_create_stream_pool(struct qat_comp_dev_private *comp_dev,
391 			    int socket_id,
392 			    uint32_t num_elements)
393 {
394 	char stream_pool_name[RTE_MEMPOOL_NAMESIZE];
395 	struct rte_mempool *mp;
396 
397 	snprintf(stream_pool_name, RTE_MEMPOOL_NAMESIZE,
398 		 "%s_streams", comp_dev->qat_dev->name);
399 
400 	QAT_LOG(DEBUG, "streampool: %s", stream_pool_name);
401 	mp = rte_mempool_lookup(stream_pool_name);
402 
403 	if (mp != NULL) {
404 		QAT_LOG(DEBUG, "streampool already created");
405 		if (mp->size != num_elements) {
406 			QAT_LOG(DEBUG, "streampool wrong size - delete it");
407 			rte_mempool_obj_iter(mp, qat_comp_stream_destroy, NULL);
408 			rte_mempool_free(mp);
409 			mp = NULL;
410 			comp_dev->streampool = NULL;
411 		}
412 	}
413 
414 	if (mp == NULL) {
415 		struct stream_create_info info = {
416 			.comp_dev = comp_dev,
417 			.socket_id = socket_id,
418 			.error = 0
419 		};
420 		mp = rte_mempool_create(stream_pool_name,
421 				num_elements,
422 				qat_comp_stream_size(), 0, 0,
423 				NULL, NULL, qat_comp_stream_init, &info,
424 				socket_id, 0);
425 		if (mp == NULL) {
426 			QAT_LOG(ERR,
427 			     "Err creating mempool %s w %d elements of size %d",
428 			     stream_pool_name, num_elements,
429 			     qat_comp_stream_size());
430 		} else if (info.error) {
431 			rte_mempool_obj_iter(mp, qat_comp_stream_destroy, NULL);
432 			QAT_LOG(ERR,
433 			     "Destoying mempool %s as at least one element failed initialisation",
434 			     stream_pool_name);
435 			rte_mempool_free(mp);
436 			mp = NULL;
437 		}
438 	}
439 
440 	return mp;
441 }
442 
443 static void
444 _qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev)
445 {
446 	/* Free intermediate buffers */
447 	if (comp_dev->interm_buff_mz) {
448 		rte_memzone_free(comp_dev->interm_buff_mz);
449 		comp_dev->interm_buff_mz = NULL;
450 	}
451 
452 	/* Free private_xform pool */
453 	if (comp_dev->xformpool) {
454 		/* Free internal mempool for private xforms */
455 		rte_mempool_free(comp_dev->xformpool);
456 		comp_dev->xformpool = NULL;
457 	}
458 
459 	/* Free stream pool */
460 	if (comp_dev->streampool) {
461 		rte_mempool_obj_iter(comp_dev->streampool,
462 				     qat_comp_stream_destroy, NULL);
463 		rte_mempool_free(comp_dev->streampool);
464 		comp_dev->streampool = NULL;
465 	}
466 }
467 
468 static int
469 qat_comp_dev_config(struct rte_compressdev *dev,
470 		struct rte_compressdev_config *config)
471 {
472 	struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
473 	int ret = 0;
474 
475 	if (RTE_PMD_QAT_COMP_IM_BUFFER_SIZE == 0) {
476 		QAT_LOG(WARNING,
477 			"RTE_PMD_QAT_COMP_IM_BUFFER_SIZE = 0 in config file, so"
478 			" QAT device can't be used for Dynamic Deflate. "
479 			"Did you really intend to do this?");
480 	} else {
481 		comp_dev->interm_buff_mz =
482 				qat_comp_setup_inter_buffers(comp_dev,
483 					RTE_PMD_QAT_COMP_IM_BUFFER_SIZE);
484 		if (comp_dev->interm_buff_mz == NULL) {
485 			ret = -ENOMEM;
486 			goto error_out;
487 		}
488 	}
489 
490 	if (config->max_nb_priv_xforms) {
491 		comp_dev->xformpool = qat_comp_create_xform_pool(comp_dev,
492 					    config, config->max_nb_priv_xforms);
493 		if (comp_dev->xformpool == NULL) {
494 			ret = -ENOMEM;
495 			goto error_out;
496 		}
497 	} else
498 		comp_dev->xformpool = NULL;
499 
500 	if (config->max_nb_streams) {
501 		comp_dev->streampool = qat_comp_create_stream_pool(comp_dev,
502 				     config->socket_id, config->max_nb_streams);
503 		if (comp_dev->streampool == NULL) {
504 			ret = -ENOMEM;
505 			goto error_out;
506 		}
507 	} else
508 		comp_dev->streampool = NULL;
509 
510 	return 0;
511 
512 error_out:
513 	_qat_comp_dev_config_clear(comp_dev);
514 	return ret;
515 }
516 
517 static int
518 qat_comp_dev_start(struct rte_compressdev *dev __rte_unused)
519 {
520 	return 0;
521 }
522 
523 static void
524 qat_comp_dev_stop(struct rte_compressdev *dev __rte_unused)
525 {
526 
527 }
528 
529 static int
530 qat_comp_dev_close(struct rte_compressdev *dev)
531 {
532 	int i;
533 	int ret = 0;
534 	struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
535 
536 	for (i = 0; i < dev->data->nb_queue_pairs; i++) {
537 		ret = qat_comp_qp_release(dev, i);
538 		if (ret < 0)
539 			return ret;
540 	}
541 
542 	_qat_comp_dev_config_clear(comp_dev);
543 
544 	return ret;
545 }
546 
547 
548 static void
549 qat_comp_dev_info_get(struct rte_compressdev *dev,
550 			struct rte_compressdev_info *info)
551 {
552 	struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
553 	const struct qat_qp_hw_data *comp_hw_qps =
554 		qat_gen_config[comp_dev->qat_dev->qat_dev_gen]
555 			      .qp_hw_data[QAT_SERVICE_COMPRESSION];
556 
557 	if (info != NULL) {
558 		info->max_nb_queue_pairs =
559 			qat_qps_per_service(comp_hw_qps,
560 					    QAT_SERVICE_COMPRESSION);
561 		info->feature_flags = dev->feature_flags;
562 		info->capabilities = comp_dev->qat_dev_capabilities;
563 	}
564 }
565 
566 static uint16_t
567 qat_comp_pmd_enq_deq_dummy_op_burst(void *qp __rte_unused,
568 				    struct rte_comp_op **ops __rte_unused,
569 				    uint16_t nb_ops __rte_unused)
570 {
571 	QAT_DP_LOG(ERR, "QAT PMD detected wrong FW version !");
572 	return 0;
573 }
574 
575 static struct rte_compressdev_ops compress_qat_dummy_ops = {
576 
577 	/* Device related operations */
578 	.dev_configure		= NULL,
579 	.dev_start		= NULL,
580 	.dev_stop		= qat_comp_dev_stop,
581 	.dev_close		= qat_comp_dev_close,
582 	.dev_infos_get		= NULL,
583 
584 	.stats_get		= NULL,
585 	.stats_reset		= qat_comp_stats_reset,
586 	.queue_pair_setup	= NULL,
587 	.queue_pair_release	= qat_comp_qp_release,
588 
589 	/* Compression related operations */
590 	.private_xform_create	= NULL,
591 	.private_xform_free	= qat_comp_private_xform_free
592 };
593 
594 static uint16_t
595 qat_comp_pmd_dequeue_first_op_burst(void *qp, struct rte_comp_op **ops,
596 				   uint16_t nb_ops)
597 {
598 	uint16_t ret = qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
599 	struct qat_qp *tmp_qp = (struct qat_qp *)qp;
600 
601 	if (ret) {
602 		if ((*ops)->debug_status ==
603 				(uint64_t)ERR_CODE_QAT_COMP_WRONG_FW) {
604 			tmp_qp->qat_dev->comp_dev->compressdev->enqueue_burst =
605 					qat_comp_pmd_enq_deq_dummy_op_burst;
606 			tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst =
607 					qat_comp_pmd_enq_deq_dummy_op_burst;
608 
609 			tmp_qp->qat_dev->comp_dev->compressdev->dev_ops =
610 					&compress_qat_dummy_ops;
611 			QAT_LOG(ERR, "QAT PMD detected wrong FW version !");
612 
613 		} else {
614 			tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst =
615 					(compressdev_dequeue_pkt_burst_t)
616 					qat_dequeue_op_burst;
617 		}
618 	}
619 	return ret;
620 }
621 
622 static struct rte_compressdev_ops compress_qat_ops = {
623 
624 	/* Device related operations */
625 	.dev_configure		= qat_comp_dev_config,
626 	.dev_start		= qat_comp_dev_start,
627 	.dev_stop		= qat_comp_dev_stop,
628 	.dev_close		= qat_comp_dev_close,
629 	.dev_infos_get		= qat_comp_dev_info_get,
630 
631 	.stats_get		= qat_comp_stats_get,
632 	.stats_reset		= qat_comp_stats_reset,
633 	.queue_pair_setup	= qat_comp_qp_setup,
634 	.queue_pair_release	= qat_comp_qp_release,
635 
636 	/* Compression related operations */
637 	.private_xform_create	= qat_comp_private_xform_create,
638 	.private_xform_free	= qat_comp_private_xform_free,
639 	.stream_create		= qat_comp_stream_create,
640 	.stream_free		= qat_comp_stream_free
641 };
642 
643 /* An rte_driver is needed in the registration of the device with compressdev.
644  * The actual qat pci's rte_driver can't be used as its name represents
645  * the whole pci device with all services. Think of this as a holder for a name
646  * for the compression part of the pci device.
647  */
648 static const char qat_comp_drv_name[] = RTE_STR(COMPRESSDEV_NAME_QAT_PMD);
649 static const struct rte_driver compdev_qat_driver = {
650 	.name = qat_comp_drv_name,
651 	.alias = qat_comp_drv_name
652 };
653 int
654 qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
655 		struct qat_dev_cmd_param *qat_dev_cmd_param)
656 {
657 	int i = 0;
658 	if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
659 		QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");
660 		return 0;
661 	}
662 
663 	struct rte_compressdev_pmd_init_params init_params = {
664 		.name = "",
665 		.socket_id = qat_pci_dev->pci_dev->device.numa_node,
666 	};
667 	char name[RTE_COMPRESSDEV_NAME_MAX_LEN];
668 	struct rte_compressdev *compressdev;
669 	struct qat_comp_dev_private *comp_dev;
670 
671 	snprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN, "%s_%s",
672 			qat_pci_dev->name, "comp");
673 	QAT_LOG(DEBUG, "Creating QAT COMP device %s", name);
674 
675 	/* Populate subset device to use in compressdev device creation */
676 	qat_pci_dev->comp_rte_dev.driver = &compdev_qat_driver;
677 	qat_pci_dev->comp_rte_dev.numa_node =
678 					qat_pci_dev->pci_dev->device.numa_node;
679 	qat_pci_dev->comp_rte_dev.devargs = NULL;
680 
681 	compressdev = rte_compressdev_pmd_create(name,
682 			&(qat_pci_dev->comp_rte_dev),
683 			sizeof(struct qat_comp_dev_private),
684 			&init_params);
685 
686 	if (compressdev == NULL)
687 		return -ENODEV;
688 
689 	compressdev->dev_ops = &compress_qat_ops;
690 
691 	compressdev->enqueue_burst = (compressdev_enqueue_pkt_burst_t)
692 			qat_enqueue_comp_op_burst;
693 	compressdev->dequeue_burst = qat_comp_pmd_dequeue_first_op_burst;
694 
695 	compressdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;
696 
697 	comp_dev = compressdev->data->dev_private;
698 	comp_dev->qat_dev = qat_pci_dev;
699 	comp_dev->compressdev = compressdev;
700 	qat_pci_dev->comp_dev = comp_dev;
701 
702 	switch (qat_pci_dev->qat_dev_gen) {
703 	case QAT_GEN1:
704 	case QAT_GEN2:
705 	case QAT_GEN3:
706 		comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;
707 		break;
708 	default:
709 		comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;
710 		QAT_LOG(DEBUG,
711 			"QAT gen %d capabilities unknown, default to GEN1",
712 					qat_pci_dev->qat_dev_gen);
713 		break;
714 	}
715 
716 	while (1) {
717 		if (qat_dev_cmd_param[i].name == NULL)
718 			break;
719 		if (!strcmp(qat_dev_cmd_param[i].name, COMP_ENQ_THRESHOLD_NAME))
720 			comp_dev->min_enq_burst_threshold =
721 					qat_dev_cmd_param[i].val;
722 		i++;
723 	}
724 
725 	QAT_LOG(DEBUG,
726 		    "Created QAT COMP device %s as compressdev instance %d",
727 			name, compressdev->data->dev_id);
728 	return 0;
729 }
730 
731 int
732 qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev)
733 {
734 	struct qat_comp_dev_private *comp_dev;
735 
736 	if (qat_pci_dev == NULL)
737 		return -ENODEV;
738 
739 	comp_dev = qat_pci_dev->comp_dev;
740 	if (comp_dev == NULL)
741 		return 0;
742 
743 	/* clean up any resources used by the device */
744 	qat_comp_dev_close(comp_dev->compressdev);
745 
746 	rte_compressdev_pmd_destroy(comp_dev->compressdev);
747 	qat_pci_dev->comp_dev = NULL;
748 
749 	return 0;
750 }
751