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Searched defs:N0 (Results 1 – 25 of 33) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp1131 SDValue N0, N1, N2; isOneUseSetCC() local
1203 reassociationCanBreakAddressingModePattern(unsigned Opc,const SDLoc & DL,SDNode * N,SDValue N0,SDValue N1) reassociationCanBreakAddressingModePattern() argument
1285 reassociateOpsCommutative(unsigned Opc,const SDLoc & DL,SDValue N0,SDValue N1,SDNodeFlags Flags) reassociateOpsCommutative() argument
1382 reassociateOps(unsigned Opc,const SDLoc & DL,SDValue N0,SDValue N1,SDNodeFlags Flags) reassociateOps() argument
1403 reassociateReduction(unsigned RedOpc,unsigned Opc,const SDLoc & DL,EVT VT,SDValue N0,SDValue N1,SDNodeFlags Flags) reassociateReduction() argument
1611 SDValue N0 = Op.getOperand(0); PromoteIntBinOp() local
1679 SDValue N0 = Op.getOperand(0); PromoteIntShiftOp() local
2138 SDValue N0 = N->getOperand(0); combine() local
2483 SDValue N0 = N->getOperand(0); foldSelectWithIdentityConstant() local
2715 SDValue N0 = N->getOperand(0); visitADDLike() local
2806 __anon29909ce20302(SDValue N0, SDValue N1) visitADDLike() argument
2963 SDValue N0 = N->getOperand(0); visitADD() local
3024 SDValue N0 = N->getOperand(0); visitADDSAT() local
3116 foldAddSubMasked1(bool IsAdd,SDValue N0,SDValue N1,SelectionDAG & DAG,const SDLoc & DL) foldAddSubMasked1() argument
3141 visitADDLikeCommutative(SDValue N0,SDValue N1,SDNode * LocReference) visitADDLikeCommutative() argument
3233 SDValue N0 = N->getOperand(0); visitADDC() local
3305 SDValue N0 = N->getOperand(0); visitADDO() local
3356 visitUADDOLike(SDValue N0,SDValue N1,SDNode * N) visitUADDOLike() argument
3381 SDValue N0 = N->getOperand(0); visitADDE() local
3400 SDValue N0 = N->getOperand(0); visitUADDO_CARRY() local
3565 combineCarryDiamond(SelectionDAG & DAG,const TargetLowering & TLI,SDValue N0,SDValue N1,SDNode * N) combineCarryDiamond() argument
3634 visitUADDO_CARRYLike(SDValue N0,SDValue N1,SDValue CarryIn,SDNode * N) visitUADDO_CARRYLike() argument
3674 visitSADDO_CARRYLike(SDValue N0,SDValue N1,SDValue CarryIn,SDNode * N) visitSADDO_CARRYLike() argument
3687 SDValue N0 = N->getOperand(0); visitSADDO_CARRY() local
3802 SDValue N0 = N->getOperand(0); visitSUB() local
4183 SDValue N0 = N->getOperand(0); visitSUBSAT() local
4223 SDValue N0 = N->getOperand(0); visitSUBC() local
4251 SDValue N0 = N->getOperand(0); visitSUBO() local
4295 SDValue N0 = N->getOperand(0); visitSUBE() local
4307 SDValue N0 = N->getOperand(0); visitUSUBO_CARRY() local
4322 SDValue N0 = N->getOperand(0); visitSSUBO_CARRY() local
4339 SDValue N0 = N->getOperand(0); visitMULFIX() local
4361 SDValue N0 = N->getOperand(0); visitMUL() local
4691 SDValue N0 = N->getOperand(0); simplifyDivRem() local
4737 SDValue N0 = N->getOperand(0); visitSDIV() local
4815 visitSDIVLike(SDValue N0,SDValue N1,SDNode * N) visitSDIVLike() argument
4885 SDValue N0 = N->getOperand(0); visitUDIV() local
4939 visitUDIVLike(SDValue N0,SDValue N1,SDNode * N) visitUDIVLike() argument
4982 buildOptimizedSREM(SDValue N0,SDValue N1,SDNode * N) buildOptimizedSREM() argument
4995 SDValue N0 = N->getOperand(0); visitREM() local
5088 SDValue N0 = N->getOperand(0); visitMULHS() local
5148 SDValue N0 = N->getOperand(0); visitMULHU() local
5226 SDValue N0 = N->getOperand(0); visitAVG() local
5270 SDValue N0 = N->getOperand(0); visitABD() local
5363 SDValue N0 = N->getOperand(0); visitSMUL_LOHI() local
5405 SDValue N0 = N->getOperand(0); visitUMUL_LOHI() local
5456 SDValue N0 = N->getOperand(0); visitMULO() local
5517 isSaturatingMinMax(SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,unsigned & BW,bool & Unsigned,SelectionDAG & DAG) isSaturatingMinMax() argument
5521 __anon29909ce20a02(SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) isSaturatingMinMax() argument
5620 PerformMinMaxFpToSatCombine(SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,SelectionDAG & DAG) PerformMinMaxFpToSatCombine() argument
5642 PerformUMinFpToSatCombine(SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,SelectionDAG & DAG) PerformUMinFpToSatCombine() argument
5679 SDValue N0 = N->getOperand(0); visitIMINMAX() local
5757 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); hoistLogicOpWithSameOpcodeHands() local
5937 foldLogicOfSetCCs(bool IsAnd,SDValue N0,SDValue N1,const SDLoc & DL) foldLogicOfSetCCs() argument
6362 visitANDLike(SDValue N0,SDValue N1,SDNode * N) visitANDLike() argument
6708 SDValue N0 = N->getOperand(0); unfoldExtremeBitClearingToShifts() local
6832 SDValue N0 = N->getOperand(0); foldAndToUsubsat() local
6946 SDValue N0 = N->getOperand(0); visitAND() local
7365 MatchBSwapHWordLow(SDNode * N,SDValue N0,SDValue N1,bool DemandHighBits) MatchBSwapHWordLow() argument
7495 SDValue N0 = N.getOperand(0); isBSwapHWordElement() local
7593 matchBSwapHWordOrAndAnd(const TargetLowering & TLI,SelectionDAG & DAG,SDNode * N,SDValue N0,SDValue N1,EVT VT,EVT ShiftAmountTy) matchBSwapHWordOrAndAnd() argument
7636 MatchBSwapHWord(SDNode * N,SDValue N0,SDValue N1) MatchBSwapHWord() argument
7701 visitORLike(SDValue N0,SDValue N1,SDNode * N) visitORLike() argument
7753 visitORCommutative(SelectionDAG & DAG,SDValue N0,SDValue N1,SDNode * N) visitORCommutative() argument
7834 SDValue N0 = N->getOperand(0); visitOR() local
8327 MatchFunnelPosNeg(SDValue N0,SDValue N1,SDValue Pos,SDValue Neg,SDValue InnerPos,SDValue InnerNeg,bool HasPos,unsigned PosOpcode,unsigned NegOpcode,const SDLoc & DL) MatchFunnelPosNeg() argument
9324 SDValue N0 = N->getOperand(0); unfoldMaskedMerge() local
9375 SDValue N0 = N->getOperand(0); visitXOR() local
9767 SDValue N0 = N->getOperand(0); visitRotate() local
9846 SDValue N0 = N->getOperand(0); visitSHL() local
10266 SDValue N0 = N->getOperand(0); foldBitOrderCrossLogicOp() local
10296 SDValue N0 = N->getOperand(0); visitSRA() local
10500 SDValue N0 = N->getOperand(0); visitSRL() local
10765 SDValue N0 = N->getOperand(0); visitFunnelShift() local
10878 SDValue N0 = N->getOperand(0); visitSHLSAT() local
10981 SDValue N0 = N->getOperand(0); visitABS() local
11016 SDValue N0 = N->getOperand(0); visitBSWAP() local
11079 SDValue N0 = N->getOperand(0); visitBITREVERSE() local
11093 SDValue N0 = N->getOperand(0); visitCTLZ() local
11110 SDValue N0 = N->getOperand(0); visitCTLZ_ZERO_UNDEF() local
11122 SDValue N0 = N->getOperand(0); visitCTTZ() local
11139 SDValue N0 = N->getOperand(0); visitCTTZ_ZERO_UNDEF() local
11151 SDValue N0 = N->getOperand(0); visitCTPOP() local
11470 SDValue N0 = N->getOperand(0); foldVSelectToSignBitSplatMask() local
11528 SDValue N0 = N->getOperand(0); visitSELECT() local
12154 SDValue N0 = N->getOperand(0); visitVSELECT() local
12442 SDValue N0 = N->getOperand(0); visitSELECT_CC() local
12500 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); visitSETCC() local
12679 SDValue N0 = N->getOperand(0); tryToFoldExtendSelectLoad() local
12726 SDValue N0 = N->getOperand(0); tryToFoldExtendOfConstant() local
12806 ExtendUsesToFormExtLoad(EVT VT,SDNode * N,SDValue N0,unsigned ExtOpc,SmallVectorImpl<SDNode * > & ExtendNodes,const TargetLowering & TLI) ExtendUsesToFormExtLoad() argument
12888 SDValue N0 = N->getOperand(0); CombineExtLoad() local
12995 SDValue N0 = N->getOperand(0); CombineZExtLogicopShiftLoad() local
13111 tryToFoldExtOfExtload(SelectionDAG & DAG,DAGCombiner & Combiner,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType) tryToFoldExtOfExtload() argument
13141 tryToFoldExtOfLoad(SelectionDAG & DAG,DAGCombiner & Combiner,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType,ISD::NodeType ExtOpc) tryToFoldExtOfLoad() argument
13184 tryToFoldExtOfMaskedLoad(SelectionDAG & DAG,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType,ISD::NodeType ExtOpc) tryToFoldExtOfMaskedLoad() argument
13247 SDValue N0 = N->getOperand(0); foldSextSetcc() local
13372 SDValue N0 = N->getOperand(0); visitSIGN_EXTEND() local
13641 SDValue N0 = N->getOperand(0); visitZERO_EXTEND() local
13919 SDValue N0 = N->getOperand(0); visitANY_EXTEND() local
14088 SDValue N0 = N->getOperand(0); visitAssertExt() local
14137 SDValue N0 = N->getOperand(0); visitAssertAlign() local
14179 SDValue N0 = N->getOperand(0); reduceLoadWidth() local
14412 SDValue N0 = N->getOperand(0); visitSIGN_EXTEND_INREG() local
14642 SDValue N0 = N->getOperand(0); visitEXTEND_VECTOR_INREG() local
14667 SDValue N0 = N->getOperand(0); visitTRUNCATE() local
15059 SDValue N0 = N->getOperand(0); foldBitcastedFPLogic() local
15122 SDValue N0 = N->getOperand(0); visitBITCAST() local
15389 SDValue N0 = N->getOperand(0); visitFREEZE() local
15562 SDValue N0 = N->getOperand(0); visitFADDForFMACombine() local
15799 SDValue N0 = N->getOperand(0); visitFSUBForFMACombine() local
16128 SDValue N0 = N->getOperand(0); visitFMULForFMADistributiveCombine() local
16232 SDValue N0 = N->getOperand(0); visitFADD() local
16426 SDValue N0 = N->getOperand(1); visitSTRICT_FADD() local
16452 SDValue N0 = N->getOperand(0); visitFSUB() local
16642 SDValue N0 = N->getOperand(0); visitFMUL() local
16790 SDValue N0 = N->getOperand(0); visitFMA() local
16917 SDValue N0 = N->getOperand(0); visitFMAD() local
16948 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); combineRepeatedFPDivisors() local
17012 SDValue N0 = N->getOperand(0); visitFDIV() local
17159 SDValue N0 = N->getOperand(0); visitFREM() local
17188 SDValue N0 = N->getOperand(0); visitFSQRT() local
17229 SDValue N0 = N->getOperand(0); visitFCOPYSIGN() local
17367 SDValue N0 = N->getOperand(0); foldFPToIntToFP() local
17380 SDValue N0 = N->getOperand(0); visitSINT_TO_FP() local
17432 SDValue N0 = N->getOperand(0); visitUINT_TO_FP() local
17472 SDValue N0 = N->getOperand(0); FoldIntToFPToInt() local
17513 SDValue N0 = N->getOperand(0); visitFP_TO_SINT() local
17528 SDValue N0 = N->getOperand(0); visitFP_TO_UINT() local
17543 SDValue N0 = N->getOperand(0); visitXRINT() local
17558 SDValue N0 = N->getOperand(0); visitFP_ROUND() local
17625 SDValue N0 = N->getOperand(0); visitFP_EXTEND() local
17682 SDValue N0 = N->getOperand(0); visitFCEIL() local
17693 SDValue N0 = N->getOperand(0); visitFTRUNC() local
17718 SDValue N0 = N->getOperand(0); visitFFREXP() local
17727 SDValue N0 = N->getOperand(0); visitFFLOOR() local
17738 SDValue N0 = N->getOperand(0); visitFNEG() local
17768 SDValue N0 = N->getOperand(0); visitFMinMax() local
17826 SDValue N0 = N->getOperand(0); visitFABS() local
19589 SDValue N0 = Value.getOperand(0); ReduceLoadOpStoreWidth() local
24263 SDValue N0 = N->getOperand(0); foldExtractSubvectorFromShuffleVector() local
24602 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1); foldShuffleOfConcatUndefs() local
24652 SDValue N0 = N->getOperand(0); partitionShuffleOfConcats() local
24732 SDValue N0 = SVN->getOperand(0); combineShuffleOfScalars() local
24873 SDValue N0 = SVN->getOperand(0); combineShuffleToAnyExtendVectorInreg() local
25021 SDValue N0 = peekThroughBitcasts(SVN->getOperand(0)); combineTruncationShuffle() local
25378 SDValue N0 = N->getOperand(0); visitVECTOR_SHUFFLE() local
26123 SDValue N0 = N->getOperand(0); visitINSERT_SUBVECTOR() local
26283 SDValue N0 = N->getOperand(0); visitFP_TO_FP16() local
26296 SDValue N0 = N->getOperand(0); visitFP16_TO_FP() local
26311 SDValue N0 = N->getOperand(0); visitFP_TO_BF16() local
26326 SDValue N0 = N->getOperand(0); visitVECREDUCE() local
26623 SDValue N0 = N->getOperand(0); scalarizeBinOpOfSplats() local
26675 SDValue N0 = N->getOperand(0); SimplifyVCastOp() local
26816 SimplifySelect(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2) SimplifySelect() argument
27042 foldSelectCCToShiftAnd(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC) foldSelectCCToShiftAnd() argument
27115 SDValue N0 = N->getOperand(0); foldSelectOfBinops() local
27170 SDValue N0 = N->getOperand(0); foldSignChangeInBitcast() local
27213 convertSelectOfFPConstantsToLoadOffset(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC) convertSelectOfFPConstantsToLoadOffset() argument
27267 SimplifySelectCC(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,bool NotExtCompare) SimplifySelectCC() argument
27432 SimplifySetCC(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & DL,bool foldBooleans) SimplifySetCC() argument
[all...]
H A DTargetLowering.cpp3762 buildLegalVectorShuffle(EVT VT,const SDLoc & DL,SDValue N0,SDValue N1,MutableArrayRef<int> Mask,SelectionDAG & DAG) const buildLegalVectorShuffle() argument
3912 foldSetCCWithAnd(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & DL,DAGCombinerInfo & DCI) const foldSetCCWithAnd() argument
4016 optimizeSetCCOfSignedTruncationCheck(EVT SCCVT,SDValue N0,SDValue N1,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCOfSignedTruncationCheck() argument
4105 optimizeSetCCByHoistingAndByConstFromLogicalShift(EVT SCCVT,SDValue N0,SDValue N1C,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCByHoistingAndByConstFromLogicalShift() argument
4176 foldSetCCWithBinOp(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & DL,DAGCombinerInfo & DCI) const foldSetCCWithBinOp() argument
4217 simplifySetCCWithCTPOP(const TargetLowering & TLI,EVT VT,SDValue N0,const APInt & C1,ISD::CondCode Cond,const SDLoc & dl,SelectionDAG & DAG) simplifySetCCWithCTPOP() argument
4290 foldSetCCWithRotate(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & dl,SelectionDAG & DAG) foldSetCCWithRotate() argument
4333 foldSetCCWithFunnelShift(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & dl,SelectionDAG & DAG) foldSetCCWithFunnelShift() argument
4401 SimplifySetCC(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,bool foldBooleans,DAGCombinerInfo & DCI,const SDLoc & dl) const SimplifySetCC() argument
6122 SDValue N0 = N->getOperand(0); buildSDIVPow2WithCMov() local
6219 SDValue N0 = N->getOperand(0); BuildSDIV() local
6345 SDValue N0 = N->getOperand(0); BuildUDIV() local
[all...]
H A DSelectionDAG.cpp3242 SDValue N0 = Op.getOperand(0); computeKnownBits() local
3253 SDValue N0 = Op.getOperand(0); computeKnownBits() local
4059 computeOverflowForSignedAdd(SDValue N0,SDValue N1) const computeOverflowForSignedAdd() argument
4074 computeOverflowForUnsignedAdd(SDValue N0,SDValue N1) const computeOverflowForUnsignedAdd() argument
4097 computeOverflowForSignedSub(SDValue N0,SDValue N1) const computeOverflowForSignedSub() argument
4115 computeOverflowForUnsignedSub(SDValue N0,SDValue N1) const computeOverflowForUnsignedSub() argument
4128 computeOverflowForUnsignedMul(SDValue N0,SDValue N1) const computeOverflowForUnsignedMul() argument
4141 computeOverflowForSignedMul(SDValue N0,SDValue N1) const computeOverflowForSignedMul() argument
4366 SDValue N0 = Op.getOperand(0); ComputeNumSignBits() local
10836 SDValue N0 = N.getOperand(0); salvageDebugInfo() local
10905 SDValue N0 = N.getOperand(0); salvageDebugInfo() local
[all...]
H A DInstrEmitter.cpp551 SDValue N0 = Node->getOperand(0); EmitSubregNode() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp615 SDValue N0 = Node->getOperand(0); tryShrinkShlLogicImm() local
693 SDValue N0 = Node->getOperand(0); trySignedBitfieldExtract() local
698 __anon6ef9331d0102(SDValue N0, unsigned Msb, unsigned Lsb, SDLoc DL, MVT VT) trySignedBitfieldExtract() argument
977 SDValue N0 = Node->getOperand(0); Select() local
1007 SDValue N0 = Node->getOperand(0); Select() local
1091 SDValue N0 = Node->getOperand(0); Select() local
1124 SDValue N0 = Node->getOperand(0); Select() local
1357 SDValue N0 = Node->getOperand(0); Select() local
2692 SDValue N0 = N.getOperand(0); selectSExtBits() local
2734 SDValue N0 = N.getOperand(0); selectSHXADDOp() local
2783 SDValue N0 = N.getOperand(0); selectSHXADDOp() local
2830 SDValue N0 = N.getOperand(0); selectSHXADD_UWOp() local
3264 SDValue N0 = N->getOperand(0); doPeepholeSExtW() local
[all...]
H A DRISCVISelLowering.cpp12302 SDValue N0 = N->getOperand(0); transformAddShlImm() local
12414 SDValue N0 = N->getOperand(0); combineSelectAndUseCommutative() local
12448 SDValue N0 = N->getOperand(0); transformAddImmMulImm() local
12492 SDValue N0 = N->getOperand(0); combineAddOfBooleanXor() local
12535 SDValue N0 = N->getOperand(0); combineSubOfBoolean() local
12579 SDValue N0 = N->getOperand(0); performSUBCombine() local
12603 SDValue N0 = N->getOperand(0); combineDeMorganOfBoolean() local
12648 SDValue N0 = N->getOperand(0); performTRUNCATECombine() local
12677 SDValue N0 = N->getOperand(0); performANDCombine() local
12712 combineOrOfCZERO(SDNode * N,SDValue N0,SDValue N1,SelectionDAG & DAG) combineOrOfCZERO() argument
12761 SDValue N0 = N->getOperand(0); performORCombine() local
12775 SDValue N0 = N->getOperand(0); performXORCombine() local
12834 SDValue N0 = N->getOperand(0); performMULCombine() local
12904 SDValue N0 = N.getOperand(0); narrowIndex() local
12942 SDValue N0 = N->getOperand(0); performSETCCCombine() local
14278 SDValue N0 = N->getOperand(0); performSRACombine() local
15353 SDValue N0 = Op.getOperand(0); PerformDAGCombine() local
16072 SDValue N0 = N->getOperand(0); PerformDAGCombine() local
16125 SDValue N0 = N->getOperand(0); isDesirableToCommuteWithShift() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.h290 Register N0, N2, N3; global() member
H A DAMDGPUISelDAGToDAG.cpp727 getBaseWithOffsetUsingSplitOR(SelectionDAG & DAG,SDValue Addr,SDValue & N0,SDValue & N1) getBaseWithOffsetUsingSplitOR() argument
1061 SDValue N0 = Addr.getOperand(0); SelectDS1Addr1Offset() local
1240 SDValue N0 = Addr.getOperand(0); SelectDSReadWrite2() local
1333 SDValue N0 = Addr; SelectMUBUF() local
1476 SDValue N0 = Addr.getOperand(0); SelectMUBUFScratchOffen() local
1628 SDValue N0, N1; SelectFlatOffsetImpl() local
2090 SDValue N0, N1; SelectSMRDBaseOffset() local
2179 SDValue N0 = Index.getOperand(0); SelectMOVRELOffset() local
[all...]
H A DAMDGPUISelLowering.cpp3472 SDValue N0 = Op.getOperand(0); LowerFP_TO_FP16() local
3859 SDValue N0 = N->getOperand(0); performAssertSZExtCombine() local
4184 getMul24(SelectionDAG & DAG,const SDLoc & SL,SDValue N0,SDValue N1,unsigned Size,bool Signed) getMul24() argument
4226 SDValue N0 = N->getOperand(0); performMulCombine() local
4304 SDValue N0 = N->getOperand(0); performMulLoHiCombine() local
4358 SDValue N0 = N->getOperand(0); performMulhsCombine() local
4391 SDValue N0 = N->getOperand(0); performMulhuCombine() local
4672 shouldFoldFNegIntoSrc(SDNode * N,SDValue N0) shouldFoldFNegIntoSrc() argument
4694 SDValue N0 = N->getOperand(0); performFNegCombine() local
4956 SDValue N0 = N->getOperand(0); performFAbsCombine() local
5200 SDValue N0 = N->getOperand(0); PerformDAGCombine() local
5950 isReassocProfitable(MachineRegisterInfo & MRI,Register N0,Register N1) const isReassocProfitable() argument
[all...]
H A DSIISelLowering.cpp9794 SDValue N0 = Offset; splitBufferOffsets() local
9857 SDValue N0 = CombinedOffset.getOperand(0); setBufferOffsets() local
11117 SDValue N0 = N->getOperand(0); performSHLPtrCombine() local
12302 SDValue N0 = N->getOperand(0); performRcpCombine() local
12661 SDValue N0 = N->getOperand(0); performFCanonicalizeCombine() local
13286 getFusedOpcode(const SelectionDAG & DAG,const SDNode * N0,const SDNode * N1) const getFusedOpcode() argument
13349 getMad64_32(SelectionDAG & DAG,const SDLoc & SL,EVT VT,SDValue N0,SDValue N1,SDValue N2,bool Signed) getMad64_32() argument
16005 isReassocProfitable(SelectionDAG & DAG,SDValue N0,SDValue N1) const isReassocProfitable() argument
16019 isReassocProfitable(MachineRegisterInfo & MRI,Register N0,Register N1) const isReassocProfitable() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1502 SDValue N0 = N->getOperand(0); tryOptimizeRem8Extend() local
1842 SDValue N0 = N.getOperand(0); matchWrapper() local
3872 SDValue N0 = Node->getOperand(0); matchBitExtract() local
4033 SDValue N0 = Node->getOperand(0); matchBEXTRFromAndImm() local
4157 SDValue N0 = Node->getOperand(0); emitPCMPISTR() local
4190 SDValue N0 = Node->getOperand(0); emitPCMPESTR() local
4595 SDValue N0 = N->getOperand(0); tryVPTERNLOG() local
4818 SDValue N0 = SetccOp0; tryVPTESTM() local
4977 SDValue N0 = N->getOperand(0); tryMatchBitSelect() local
5258 SDValue N0 = Node->getOperand(0); Select() local
5307 SDValue N0 = Node->getOperand(0); Select() local
5404 SDValue N0 = Node->getOperand(0); Select() local
5482 SDValue N0 = Node->getOperand(0); Select() local
5607 SDValue N0 = Node->getOperand(0); Select() local
5789 SDValue N0 = Node->getOperand(IsStrictCmp ? 1 : 0); Select() local
5852 SDValue N0 = Node->getOperand(0); Select() local
[all...]
H A DX86ISelLowering.cpp5715 SDValue N0 = N.getOperand(0); getFauxShuffleMask() local
5737 SDValue N0 = peekThroughBitcasts(N.getOperand(0)); getFauxShuffleMask() local
5938 SDValue N0 = N.getOperand(0); getFauxShuffleMask() local
12298 lowerShuffleOfExtractsAsVperm(const SDLoc & DL,SDValue N0,SDValue N1,ArrayRef<int> Mask,SelectionDAG & DAG) lowerShuffleOfExtractsAsVperm() argument
18066 SDValue N0 = Op.getOperand(0); LowerINSERT_VECTOR_ELT() local
19423 SDValue N0 = Op.getOperand(IsStrict ? 1 : 0); lowerUINT_TO_FP_v2i32() local
19629 SDValue N0 = Op.getOperand(OpNo); lowerUINT_TO_FP_vec() local
21634 SDValue N0 = Op.getOperand(0); LowerFROUND() local
21786 SDValue N0 = Op.getOperand(0); LowerFGETSIGN() local
27876 SDValue N0 = Op.getOperand(0); LowerCTTZ() local
27989 SDValue N0 = Op.getOperand(0); LowerABS() local
32189 SDValue N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Ops0); ReplaceNodeResults() local
39579 SDValue N0 = V.getOperand(0); combineCommutableSHUFP() local
39600 SDValue N0 = N.getOperand(0); combineCommutableSHUFP() local
39683 SDValue N0 = peekThroughOneUseBitcasts(N.getOperand(0)); canonicalizeShuffleWithOp() local
39727 SDValue N0 = peekThroughOneUseBitcasts(N.getOperand(0)); canonicalizeShuffleWithOp() local
40089 SDValue N0 = N.getOperand(0); combineTargetShuffle() local
40187 SDValue N0 = N.getOperand(0); combineTargetShuffle() local
40247 SDValue N0 = N.getOperand(0); combineTargetShuffle() local
40337 SDValue N0 = N.getOperand(0); combineTargetShuffle() local
40370 SDValue N0 = N.getOperand(0); combineTargetShuffle() local
40784 SDValue N0 = N->getOperand(0); combineShuffleOfConcatUndef() local
41272 SDValue N0 = Op.getOperand(0); SimplifyDemandedVectorEltsForTargetNode() local
41309 SDValue N0 = Op.getOperand(0); SimplifyDemandedVectorEltsForTargetNode() local
42823 if (SDValue N0 = combineBitcastToBoolVector() local
42836 if (SDValue N0 = combineBitcastToBoolVector() local
42848 if (SDValue N0 = combineBitcastToBoolVector(VT, Src0, DL, DAG, Subtarget)) combineBitcastToBoolVector() local
42861 if (SDValue N0 = combineBitcastToBoolVector(VT, Src0, DL, DAG, Subtarget)) combineBitcastToBoolVector() local
42874 SDValue N0 = N->getOperand(0); combineBitcast() local
44328 combineToExtendBoolVectorInReg(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N0,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineToExtendBoolVectorInReg() argument
46455 SDValue N0 = N->getOperand(0); reduceVMULWidth() local
46618 SDValue N0 = N->getOperand(0); combineMulToPMADDWD() local
46719 SDValue N0 = N->getOperand(0); combineMulToPMULDQ() local
46989 SDValue N0 = N->getOperand(0); combineShiftLeft() local
47035 SDValue N0 = N->getOperand(0); combineShiftRightArithmetic() local
47095 SDValue N0 = N->getOperand(0); combineShiftRightLogical() local
47152 SDValue N0 = N->getOperand(0); combineHorizOpWithShuffle() local
47297 SDValue N0 = N->getOperand(0); combineVectorPack() local
47495 SDValue N0 = N->getOperand(0); combineVectorShiftVar() local
47528 SDValue N0 = N->getOperand(0); combineVectorShiftImm() local
47717 SDValue N0 = N->getOperand(0); combineCompareEqual() local
47824 SDValue N0 = N->getOperand(0); combineAndNotIntoANDNP() local
47887 SDValue N0 = N->getOperand(0); combineAndShuffleNot() local
47943 SDValue N0 = N->getOperand(0); PromoteMaskArithmetic() local
48036 SDValue N0 = N->getOperand(0); convertIntLogicToFPLogic() local
48101 SDValue N0 = N->getOperand(0); combineBitOpWithMOVMSK() local
48136 SDValue N0 = N->getOperand(0); combineBitOpWithShift() local
48179 SDValue N0 = N->getOperand(0); combineBitOpWithPACK() local
48547 SDValue N0 = N->getOperand(0); combineAnd() local
48817 SDValue N0 = peekThroughBitcasts(N->getOperand(0)); canonicalizeBitSelect() local
48875 SDValue N0 = N->getOperand(0); matchLogicBlend() local
49091 SDValue N0 = Node->getOperand(0); foldMaskedMerge() local
49323 combineOrXorWithSETCC(SDNode * N,SDValue N0,SDValue N1,SelectionDAG & DAG) combineOrXorWithSETCC() argument
49354 SDValue N0 = N->getOperand(0); combineOr() local
49517 SDValue N0 = N->getOperand(0); foldXorTruncShiftIntoCmp() local
50720 __anon97398207be02(SDValue Op, SDValue &N0, SDValue &N1, SmallVectorImpl<int> &ShuffleMask) isHorizontalBinOp() argument
51112 __anon97398207c902(SDValue N0, SDValue N1) combineTruncatedArithmetic() argument
51264 SDValue N0 = SSatVal.getOperand(0); detectPMADDUBSW() local
51742 SDValue N0 = N->getOperand(0); combineXorSubCTLZ() local
51790 SDValue N0 = N->getOperand(0); combineXor() local
51880 SDValue N0 = N->getOperand(0); combineBITREVERSE() local
51944 SDValue N0 = N->getOperand(0); combineFAndFNotToFAndn() local
52185 SDValue N0 = N->getOperand(0); combineAndnp() local
52358 SDValue N0 = N->getOperand(0); combineSextInRegCmov() local
52422 SDValue N0 = N->getOperand(0); combineSignExtendInReg() local
52585 SDValue N0 = N->getOperand(0); combineExtSetcc() local
52630 SDValue N0 = N->getOperand(0); combineSext() local
52846 SDValue N0 = N->getOperand(0); combineZext() local
52946 __anon97398207d102(SDValue N0, SDValue N1) combineSetCC() argument
52964 __anon97398207d202(SDValue N0, SDValue N1) combineSetCC() argument
53963 __anon97398207d302(SDValue N0, SDValue N1, bool Negate) combineX86AddSub() argument
54153 SDValue N0 = DAG.getNode(ISD::TRUNCATE, DL, TruncVT, Mul.getOperand(0)); matchPMADDWD() local
54170 matchPMADDWD_2(SelectionDAG & DAG,SDValue N0,SDValue N1,const SDLoc & DL,EVT VT,const X86Subtarget & Subtarget) matchPMADDWD_2() argument
54310 combineAddOfPMADDWD(SelectionDAG & DAG,SDValue N0,SDValue N1,const SDLoc & DL,EVT VT) combineAddOfPMADDWD() argument
54479 SDValue N0 = N->getOperand(0); combineSubABS() local
56486 SDValue N0 = Op.getOperand(0); IsDesirableToPromoteOp() local
56500 SDValue N0 = Op.getOperand(0); IsDesirableToPromoteOp() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp145 SDValue N0 = N.getOperand(0); MatchWrapper() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp575 SDValue N0 = Op.getOperand(0); in isADDADDMUL() local
1538 SDValue N0 = N->getOperand(0); PerformDAGCombine() local
1574 SDValue N0 = N->getOperand(0); PerformDAGCombine() local
1611 SDValue N0 = N->getOperand(0); PerformDAGCombine() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9590 SDNode *N0 = N->getOperand(0).getNode(); isAddSubSExt() local
9601 SDNode *N0 = N->getOperand(0).getNode(); isAddSubZExt() local
9615 SDNode *N0 = Op.getOperand(0).getNode(); LowerMUL() local
9715 LowerSDIV_v4i16(SDValue N0,SDValue N1,const SDLoc & dl,SelectionDAG & DAG) LowerSDIV_v4i16() argument
9761 SDValue N0 = Op.getOperand(0); LowerSDIV() local
9798 SDValue N0 = Op.getOperand(0); LowerUDIV() local
12602 SDValue N0 = N->getOperand(0); combineSelectAndUseCommutative() local
12625 AddCombineToVPADD(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineToVPADD() argument
12653 AddCombineVUZPToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineVUZPToVPADDL() argument
12706 AddCombineBUILD_VECTORToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineBUILD_VECTORToVPADDL() argument
13540 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDCombineWithOperands() argument
13563 SDValue N0 = N->getOperand(0); TryDistrubutionADDVecReduce() local
13579 __anon0445ea3b1302(SDValue N0, SDValue N1) TryDistrubutionADDVecReduce() argument
13623 __anon0445ea3b1402(SDValue N0, SDValue N1, bool IsForward) TryDistrubutionADDVecReduce() argument
13627 __anon0445ea3b1502(SDValue N0, SDValue N1) TryDistrubutionADDVecReduce() argument
13715 SDValue N0 = N->getOperand(0); PerformADDVecReduce() local
14020 SDValue N0 = N->getOperand(0); PerformADDCombine() local
14063 SDValue N0 = N->getOperand(0); PerformSUBCombine() local
14120 SDValue N0 = N->getOperand(0); PerformVMULCombine() local
14150 SDValue N0 = N->getOperand(0); PerformMVEVMULLCombine() local
14314 SDNode *N0 = N->getOperand(0).getNode(); CombineANDShift() local
14517 SDValue N0 = N->getOperand(0); PerformORCombineToBFI() local
14672 SDValue N0 = N->getOperand(0); PerformORCombine_i1() local
14736 SDValue N0 = N->getOperand(0); PerformORCombine() local
14812 SDValue N0 = N->getOperand(0); PerformXORCombine() local
14898 SDValue N0 = N->getOperand(0); PerformBFICombine() local
15211 SDValue N0 = N->getOperand(0); PerformVMOVrhCombine() local
17079 SDValue N0 = N->getOperand(0); PerformVECREDUCE_ADDCombine() local
17713 SDValue N0 = N->getOperand(0); PerformShiftCombine() local
17776 SDValue N0 = N->getOperand(0); PerformSplittingToWideningLoad() local
17858 SDValue N0 = N->getOperand(0); PerformExtendCombine() local
17954 SDValue N0 = N->getOperand(0); PerformMinMaxCombine() local
18688 SDValue N0 = N->getOperand(0); PerformSplittingMVEEXTToWideningLoad() local
[all...]
H A DARMISelDAGToDAG.cpp436 SDValue N0 = N.getOperand(0); PreprocessISelDAG() local
3900 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); Select() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1446 SDValue N0 = N->getOperand(0); combineSelectAndUseCommutative() local
1460 SDValue N0 = N->getOperand(0); PerformSUBCombine() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelDAGToDAG.cpp574 SDValue N0 = N.getOperand(0); matchWrapper() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4558 SDValue N0 = N.getOperand(0); isAddSubSExt() local
4569 SDValue N0 = N.getOperand(0); isAddSubZExt() local
4644 selectUmullSmull(SDValue & N0,SDValue & N1,SelectionDAG & DAG,SDLoc DL,bool & IsMLA) selectUmullSmull() argument
4718 SDValue N0 = Op.getOperand(0); LowerMUL() local
6500 isReassocProfitable(SelectionDAG & DAG,SDValue N0,SDValue N1) const isReassocProfitable() argument
13107 SDValue N0 = N->getOperand(0); LowerBUILD_VECTOR() local
16854 SDValue N0 = N->getOperand(0); BuildSREMPow2() local
17082 SDValue N0 = N->getOperand(0); performMulCombine() local
17155 __anon5c8f63cd1f02(SDValue N0, unsigned N1) performMulCombine() argument
17159 __anon5c8f63cd2002(SDValue N0, SDValue N1) performMulCombine() argument
17162 __anon5c8f63cd2102(SDValue N0, SDValue N1) performMulCombine() argument
17305 SDValue N0 = N->getOperand(0); performIntToFpCombine() local
17484 SDValue N0 = N->getOperand(0); tryCombineToBSL() local
17989 SDValue N0 = N->getOperand(0); performFirstTrueTestVectorCombine() local
18019 SDValue N0 = N->getOperand(0); performLastTrueTestVectorCombine() local
18054 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); performExtractVectorEltCombine() local
18119 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); performConcatVectorsCombine() local
18843 SDValue N0 = CSel.getOperand(0); performNegCSelCombine() local
18993 SDValue N0 = N->getOperand(0).getOperand(0); performVectorAddSubExtCombine() local
19063 SDValue N0 = N->getOperand(0); performTruncateCombine() local
22772 SDValue N0 = N->getOperand(0); performVSelectCombine() local
22842 SDValue N0 = N->getOperand(0); performSelectCombine() local
23553 SDValue N0 = N->getOperand(0); performFPExtendCombine() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1036 SDValue N0 = I->getOperand(0), N1 = I->getOperand(1); ppSimplifyOrSelect0() local
1446 SDValue N0 = N.getOperand(0); SelectGlobalAddress() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5094 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const NVPTXSubtarget & Subtarget,CodeGenOptLevel OptLevel) PerformADDCombineWithOperands() argument
5208 SDValue N0 = N->getOperand(0); PerformADDCombine() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp9990 SDValue N0 = peekThroughBitcasts(Op.getOperand(0)); LowerROTL() local
16371 SDValue N0 = N->getOperand(0); BuildSDIVPow2() local
17445 SDValue N0 = Op.getOperand(0); getNegatedExpression() local
17553 SDValue N0 = N->getOperand(0); stripModuloOnShift() local
17587 SDValue N0 = N->getOperand(0); combineSHL() local
17909 SDValue N0 = N->getOperand(0); combineFMALike() local
[all...]
H A DPPCISelDAGToDAG.cpp5209 SDValue N0 = N->getOperand(0); tryAsSingleRLDIMI() local
5528 SDValue N0 = N->getOperand(0); Select() local
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3675 isReassocProfitable(SelectionDAG & DAG,SDValue N0,SDValue N1) isReassocProfitable() argument
3686 isReassocProfitable(MachineRegisterInfo & MRI,Register N0,Register N1) isReassocProfitable() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6678 SDLoc DL(N0); in combineSIGN_EXTEND() local
6607 SDValue N0 = N->getOperand(0); combineZERO_EXTEND() local
6657 SDValue N0 = N->getOperand(0); combineSIGN_EXTEND_INREG() local
[all...]

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