| /llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 77 return Decoder->tryAddingSymbolicOperand(MI, Value, Address, IsBranch, Offset, in tryAddingSymbolicOperand() argument
99 DecodeGR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR32BitRegisterClass() argument
105 DecodeGRH32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGRH32BitRegisterClass() argument
111 DecodeGR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR64BitRegisterClass() argument
117 DecodeGR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR128BitRegisterClass() argument
123 DecodeADDR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR32BitRegisterClass() argument
129 DecodeADDR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR64BitRegisterClass() argument
135 DecodeFP32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP32BitRegisterClass() argument
141 DecodeFP64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP64BitRegisterClass() argument
147 DecodeFP128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP128BitRegisterClass() argument
153 DecodeVR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR32BitRegisterClass() argument
159 DecodeVR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR64BitRegisterClass() argument
165 DecodeVR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR128BitRegisterClass() argument
171 DecodeAR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAR32BitRegisterClass() argument
177 DecodeCR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCR64BitRegisterClass() argument
199 decodeU1ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU1ImmOperand() argument
205 decodeU2ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU2ImmOperand() argument
211 decodeU3ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU3ImmOperand() argument
217 decodeU4ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU4ImmOperand() argument
223 decodeU8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU8ImmOperand() argument
229 decodeU12ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU12ImmOperand() argument
235 decodeU16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU16ImmOperand() argument
241 decodeU32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU32ImmOperand() argument
247 decodeS8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS8ImmOperand() argument
253 decodeS16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS16ImmOperand() argument
259 decodeS20ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS20ImmOperand() argument
265 decodeS32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS32ImmOperand() argument
272 decodeLenOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeLenOperand() argument
282 decodePCDBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,bool isBranch,const MCDisassembler * Decoder) decodePCDBLOperand() argument
295 decodePC12DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC12DBLBranchOperand() argument
301 decodePC16DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC16DBLBranchOperand() argument
307 decodePC24DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC24DBLBranchOperand() argument
313 decodePC32DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLBranchOperand() argument
319 decodePC32DBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLOperand() argument
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 94 const MCDisassembler *Decoder) { in DecodeCRRCRegisterClass()
100 const MCDisassembler *Decoder) { in DecodeCRBITRCRegisterClass()
106 const MCDisassembler *Decoder) { in DecodeF4RCRegisterClass()
112 const MCDisassembler *Decoder) { in DecodeF8RCRegisterClass()
118 const MCDisassembler *Decoder) { in DecodeFpRCRegisterClass()
126 const MCDisassembler *Decoder) { in DecodeVFRCRegisterClass()
132 const MCDisassembler *Decoder) { in DecodeVRRCRegisterClass()
138 const MCDisassembler *Decoder) { in DecodeVSRCRegisterClass()
144 const MCDisassembler *Decoder) { in DecodeVSFRCRegisterClass()
150 const MCDisassembler *Decoder) { in DecodeVSSRCRegisterClass()
[all …]
|
| /llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 431 DecodeFPR128RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR128RegisterClass() argument
443 DecodeFPR128_loRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR128_loRegisterClass() argument
451 DecodeFPR128_0to7RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR128_0to7RegisterClass() argument
459 DecodeFPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR64RegisterClass() argument
471 DecodeFPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR32RegisterClass() argument
483 DecodeFPR16RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR16RegisterClass() argument
495 DecodeFPR8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR8RegisterClass() argument
507 DecodeGPR64commonRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR64commonRegisterClass() argument
520 DecodeGPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR64RegisterClass() argument
532 DecodeGPR64x8ClassRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR64x8ClassRegisterClass() argument
547 DecodeGPR64spRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR64spRegisterClass() argument
558 DecodeMatrixIndexGPR32_8_11RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const void * Decoder) DecodeMatrixIndexGPR32_8_11RegisterClass() argument
572 DecodeMatrixIndexGPR32_12_15RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeMatrixIndexGPR32_12_15RegisterClass() argument
585 DecodeGPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR32RegisterClass() argument
597 DecodeGPR32spRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR32spRegisterClass() argument
609 DecodeZPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeZPRRegisterClass() argument
621 DecodeZPR_4bRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeZPR_4bRegisterClass() argument
629 DecodeZPR_3bRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeZPR_3bRegisterClass() argument
637 DecodeZPR2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeZPR2RegisterClass() argument
648 DecodeZPR3RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeZPR3RegisterClass() argument
659 DecodeZPR4RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeZPR4RegisterClass() argument
670 DecodeZPR2Mul2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const void * Decoder) DecodeZPR2Mul2RegisterClass() argument
681 DecodeZPR4Mul4RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const void * Decoder) DecodeZPR4Mul4RegisterClass() argument
692 DecodeZPR2StridedRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const void * Decoder) DecodeZPR2StridedRegisterClass() argument
704 DecodeZPR4StridedRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const void * Decoder) DecodeZPR4StridedRegisterClass() argument
717 DecodeMatrixTileListRegisterClass(MCInst & Inst,unsigned RegMask,uint64_t Address,const MCDisassembler * Decoder) DecodeMatrixTileListRegisterClass() argument
738 DecodeMatrixTile(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMatrixTile() argument
749 DecodePPRorPNRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePPRorPNRRegisterClass() argument
761 DecodePPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePPRRegisterClass() argument
773 DecodePNRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePNRRegisterClass() argument
785 DecodePPR_3bRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePPR_3bRegisterClass() argument
795 DecodePNR_p8to15RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePNR_p8to15RegisterClass() argument
805 DecodePPR2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const void * Decoder) DecodePPR2RegisterClass() argument
817 DecodePPR2Mul2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const void * Decoder) DecodePPR2Mul2RegisterClass() argument
828 DecodeQQRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeQQRegisterClass() argument
839 DecodeQQQRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeQQQRegisterClass() argument
850 DecodeQQQQRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeQQQQRegisterClass() argument
861 DecodeDDRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeDDRegisterClass() argument
872 DecodeDDDRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeDDDRegisterClass() argument
883 DecodeDDDDRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeDDDDRegisterClass() argument
894 DecodeFixedPointScaleImm32(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeFixedPointScaleImm32() argument
903 DecodeFixedPointScaleImm64(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeFixedPointScaleImm64() argument
910 DecodePCRelLabel16(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodePCRelLabel16() argument
925 DecodePCRelLabel19(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodePCRelLabel19() argument
940 DecodeMemExtend(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeMemExtend() argument
948 DecodeMRSSystemRegister(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeMRSSystemRegister() argument
958 DecodeMSRSystemRegister(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeMSRSystemRegister() argument
966 DecodeFMOVLaneInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMOVLaneInstruction() argument
1001 DecodeVecShiftR64Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR64Imm() argument
1007 DecodeVecShiftR64ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR64ImmNarrow() argument
1013 DecodeVecShiftR32Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR32Imm() argument
1019 DecodeVecShiftR32ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR32ImmNarrow() argument
1025 DecodeVecShiftR16Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR16Imm() argument
1031 DecodeVecShiftR16ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR16ImmNarrow() argument
1037 DecodeVecShiftR8Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR8Imm() argument
1043 DecodeVecShiftL64Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL64Imm() argument
1049 DecodeVecShiftL32Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL32Imm() argument
1055 DecodeVecShiftL16Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL16Imm() argument
1061 DecodeVecShiftL8Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL8Imm() argument
1067 DecodeThreeAddrSRegInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeThreeAddrSRegInstruction() argument
1129 DecodeMoveImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeMoveImmInstruction() argument
1162 DecodeUnsignedLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeUnsignedLdStInstruction() argument
1221 DecodeSignedLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSignedLdStInstruction() argument
1419 DecodeExclusiveLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeExclusiveLdStInstruction() argument
1502 DecodePairLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodePairLdStInstruction() argument
1636 DecodeAuthLoadInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAuthLoadInstruction() argument
1669 DecodeAddSubERegInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAddSubERegInstruction() argument
1726 DecodeLogicalImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeLogicalImmInstruction() argument
1757 DecodeModImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeModImmInstruction() argument
1796 DecodeModImmTiedInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeModImmTiedInstruction() argument
1814 DecodeAdrInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAdrInstruction() argument
1832 DecodeAddSubImmShift(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAddSubImmShift() argument
1867 DecodeUnconditionalBranch(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeUnconditionalBranch() argument
1888 DecodeSystemPStateImm0_15Instruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSystemPStateImm0_15Instruction() argument
1909 DecodeSystemPStateImm0_1Instruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSystemPStateImm0_1Instruction() argument
1931 DecodeTestAndBranch(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeTestAndBranch() argument
1955 DecodeGPRSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegClassID,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPRSeqPairsClassRegisterClass() argument
1967 DecodeWSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeWSeqPairsClassRegisterClass() argument
1975 DecodeXSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeXSeqPairsClassRegisterClass() argument
1983 DecodeSyspXzrInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSyspXzrInstruction() argument
2003 DecodeSVELogicalImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSVELogicalImmInstruction() argument
2019 DecodeSImm(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeSImm() argument
2034 DecodeImm8OptLsl(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeImm8OptLsl() argument
2047 DecodeSVEIncDecImm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeSVEIncDecImm() argument
2053 DecodeSVCROp(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeSVCROp() argument
2063 DecodeCPYMemOpInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeCPYMemOpInstruction() argument
2088 DecodeSETMemOpInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSETMemOpInstruction() argument
2112 DecodePRFMRegInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodePRFMRegInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 354 DecodeUImmWithOffset(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeUImmWithOffset() argument
528 DecodeINSVE_DF(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeINSVE_DF() argument
577 DecodeDAHIDATIMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDAHIDATIMMR6() argument
591 DecodeDAHIDATI(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDAHIDATI() argument
606 DecodeAddiGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddiGroupBranch() argument
645 DecodePOP35GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP35GroupBranchMMR6() argument
679 DecodeDaddiGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDaddiGroupBranch() argument
718 DecodePOP37GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP37GroupBranchMMR6() argument
752 DecodePOP65GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP65GroupBranchMMR6() argument
791 DecodePOP75GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP75GroupBranchMMR6() argument
830 DecodeBlezlGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezlGroupBranch() argument
873 DecodeBgtzlGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzlGroupBranch() argument
917 DecodeBgtzGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzGroupBranch() argument
966 DecodeBlezGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezGroupBranch() argument
1009 DecodeDEXT(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDEXT() argument
1051 DecodeDINS(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDINS() argument
1093 DecodeCRC(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCRC() argument
1339 DecodeCPU16RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCPU16RegsRegisterClass() argument
1345 DecodeGPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR64RegisterClass() argument
1356 DecodeGPRMM16RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16RegisterClass() argument
1366 DecodeGPRMM16ZeroRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16ZeroRegisterClass() argument
1376 DecodeGPRMM16MovePRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16MovePRegisterClass() argument
1386 DecodeGPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR32RegisterClass() argument
1396 DecodePtrRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePtrRegisterClass() argument
1405 DecodeDSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDSPRRegisterClass() argument
1411 DecodeFGR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGR64RegisterClass() argument
1422 DecodeFGR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGR32RegisterClass() argument
1433 DecodeCCRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCCRRegisterClass() argument
1443 DecodeFCCRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCCRegisterClass() argument
1453 DecodeFGRCCRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGRCCRegisterClass() argument
1463 DecodeMem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMem() argument
1483 DecodeMemEVA(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemEVA() argument
1503 DecodeLoadByte15(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLoadByte15() argument
1519 DecodeCacheOp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheOp() argument
1535 DecodeCacheOpMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheOpMM() argument
1551 DecodePrefeOpMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePrefeOpMM() argument
1567 DecodeCacheeOp_CacheOpR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheeOp_CacheOpR6() argument
1582 DecodeSyncI(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSyncI() argument
1596 DecodeSyncI_MM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSyncI_MM() argument
1609 DecodeSynciR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSynciR6() argument
1623 DecodeMSA128Mem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128Mem() argument
1670 DecodeMemMMImm4(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm4() argument
1727 DecodeMemMMSPImm5Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMSPImm5Lsl2() argument
1742 DecodeMemMMGPImm7Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMGPImm7Lsl2() argument
1757 DecodeMemMMReglistImm4Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMReglistImm4Lsl2() argument
1781 DecodeMemMMImm9(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm9() argument
1801 DecodeMemMMImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm12() argument
1835 DecodeMemMMImm16(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm16() argument
1851 DecodeFMem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem() argument
1868 DecodeFMemMMR2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemMMR2() argument
1886 DecodeFMem2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem2() argument
1902 DecodeFMem3(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem3() argument
1919 DecodeFMemCop2R6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemCop2R6() argument
1936 DecodeFMemCop2MMR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemCop2MMR6() argument
1953 DecodeSpecial3LlSc(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSpecial3LlSc() argument
1974 DecodeHWRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHWRegsRegisterClass() argument
1984 DecodeAFGR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAFGR64RegisterClass() argument
1995 DecodeACC64DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeACC64DSPRegisterClass() argument
2006 DecodeHI32DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHI32DSPRegisterClass() argument
2017 DecodeLO32DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLO32DSPRegisterClass() argument
2028 DecodeMSA128BRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128BRegisterClass() argument
2039 DecodeMSA128HRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128HRegisterClass() argument
2050 DecodeMSA128WRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128WRegisterClass() argument
2061 DecodeMSA128DRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128DRegisterClass() argument
2072 DecodeMSACtrlRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSACtrlRegisterClass() argument
2083 DecodeCOP0RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCOP0RegisterClass() argument
2094 DecodeCOP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCOP2RegisterClass() argument
2105 DecodeBranchTarget(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget() argument
2113 DecodeBranchTarget1SImm16(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget1SImm16() argument
2121 DecodeJumpTarget(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTarget() argument
2129 DecodeBranchTarget21(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget21() argument
2138 DecodeBranchTarget21MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget21MM() argument
2147 DecodeBranchTarget26(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget26() argument
2156 DecodeBranchTarget7MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget7MM() argument
2164 DecodeBranchTarget10MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget10MM() argument
2172 DecodeBranchTargetMM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTargetMM() argument
2180 DecodeBranchTarget26MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget26MM() argument
2189 DecodeJumpTargetMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTargetMM() argument
2197 DecodeJumpTargetXMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTargetXMM() argument
2205 DecodeAddiur2Simm7(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeAddiur2Simm7() argument
2217 DecodeLi16Imm(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeLi16Imm() argument
2227 DecodePOOL16BEncodedField(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodePOOL16BEncodedField() argument
2235 DecodeUImmWithOffsetAndScale(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeUImmWithOffsetAndScale() argument
2245 DecodeSImmWithOffsetAndScale(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeSImmWithOffsetAndScale() argument
2252 DecodeInsSize(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeInsSize() argument
2264 DecodeSimm19Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm19Lsl2() argument
2271 DecodeSimm18Lsl3(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm18Lsl3() argument
2277 DecodeSimm9SP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm9SP() argument
2292 DecodeANDI16Imm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeANDI16Imm() argument
2303 DecodeRegListOperand(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument
2331 DecodeRegListOperand16(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand16() argument
2355 DecodeMovePOperands(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMovePOperands() argument
2381 DecodeMovePRegPair(MCInst & Inst,unsigned RegPair,uint64_t Address,const MCDisassembler * Decoder) DecodeMovePRegPair() argument
2424 DecodeSimm23Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm23Lsl2() argument
2432 DecodeBgtzGroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzGroupBranchMMR6() argument
2481 DecodeBlezGroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezGroupBranchMMR6() argument
2526 DecodeFIXMEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFIXMEInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 69 DecodeARRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeARRegisterClass() argument
82 DecodeSRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeSRRegisterClass() argument
100 tryAddingSymbolicOperand(int64_t Value,bool isBranch,uint64_t Address,uint64_t Offset,uint64_t InstSize,MCInst & MI,const void * Decoder) tryAddingSymbolicOperand() argument
107 decodeCallOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeCallOperand() argument
114 decodeJumpOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeJumpOperand() argument
121 decodeBranchOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeBranchOperand() argument
142 decodeL32ROperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeL32ROperand() argument
151 decodeImm8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm8Operand() argument
159 decodeImm8_sh8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm8_sh8Operand() argument
166 decodeImm12Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm12Operand() argument
173 decodeUimm4Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeUimm4Operand() argument
180 decodeUimm5Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeUimm5Operand() argument
187 decodeImm1_16Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm1_16Operand() argument
195 decodeShimm1_31Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeShimm1_31Operand() argument
204 decodeB4constOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeB4constOperand() argument
215 decodeB4constuOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeB4constuOperand() argument
223 decodeMem8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem8Operand() argument
231 decodeMem16Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem16Operand() argument
239 decodeMem32Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem32Operand() argument
[all...] |
| /llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 110 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass()
120 const MCDisassembler *Decoder) { in DecodeFPR32RegisterClass()
130 const MCDisassembler *Decoder) { in DecodesFPR32RegisterClass()
140 const MCDisassembler *Decoder) { in DecodesFPR64RegisterClass()
150 const MCDisassembler *Decoder) { in DecodesFPR64_VRegisterClass()
160 const MCDisassembler *Decoder) { in DecodeFPR64RegisterClass()
172 const MCDisassembler *Decoder) { in DecodesFPR128RegisterClass()
182 const MCDisassembler *Decoder) { in DecodesGPRRegisterClass()
192 const MCDisassembler *Decoder) { in DecodemGPRRegisterClass()
204 const MCDisassembler *Decoder) { in DecodeGPRSPRegisterClass()
[all …]
|
| /llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 129 const MCDisassembler *Decoder) { in DecodeI32RegisterClass()
139 const MCDisassembler *Decoder) { in DecodeI64RegisterClass()
149 const MCDisassembler *Decoder) { in DecodeF32RegisterClass()
159 const MCDisassembler *Decoder) { in DecodeF128RegisterClass()
169 const MCDisassembler *Decoder) { in DecodeV64RegisterClass()
183 const MCDisassembler *Decoder) { in DecodeVMRegisterClass()
193 const MCDisassembler *Decoder) { in DecodeVM512RegisterClass()
203 const MCDisassembler *Decoder) { in DecodeMISCRegisterClass()
317 const MCDisassembler *Decoder) { in DecodeASX()
350 const MCDisassembler *Decoder) { in DecodeAS()
[all …]
|
| /llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 73 DecodeGPRRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument
86 DecodeGPRX1X5RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRX1X5RegisterClass() argument
97 DecodeFPR16RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR16RegisterClass() argument
108 DecodeFPR32RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR32RegisterClass() argument
119 DecodeFPR32CRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR32CRegisterClass() argument
130 DecodeFPR64RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR64RegisterClass() argument
141 DecodeFPR64CRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR64CRegisterClass() argument
152 DecodeGPRNoX0RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRNoX0RegisterClass() argument
162 DecodeGPRNoX0X2RegisterClass(MCInst & Inst,uint64_t RegNo,uint32_t Address,const MCDisassembler * Decoder) DecodeGPRNoX0X2RegisterClass() argument
172 DecodeGPRCRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRCRegisterClass() argument
183 DecodeGPRPairRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairRegisterClass() argument
194 DecodeSR07RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const void * Decoder) DecodeSR07RegisterClass() argument
205 DecodeVRRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRRegisterClass() argument
216 DecodeVRM2RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRM2RegisterClass() argument
233 DecodeVRM4RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRM4RegisterClass() argument
250 DecodeVRM8RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRM8RegisterClass() argument
267 decodeVMaskReg(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) decodeVMaskReg() argument
280 decodeUImmOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeUImmOperand() argument
289 decodeUImmNonZeroOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeUImmNonZeroOperand() argument
298 decodeSImmOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmOperand() argument
308 decodeSImmNonZeroOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmNonZeroOperand() argument
317 decodeSImmOperandAndLsl1(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmOperandAndLsl1() argument
328 decodeCLUIImmOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeCLUIImmOperand() argument
338 decodeFRMArg(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeFRMArg() argument
388 decodeRVCInstrRdRs1ImmZero(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1ImmZero() argument
400 decodeCSSPushPopchk(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeCSSPushPopchk() argument
410 decodeRVCInstrRdSImm(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdSImm() argument
422 decodeRVCInstrRdRs1UImm(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1UImm() argument
435 decodeRVCInstrRdRs2(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs2() argument
445 decodeRVCInstrRdRs1Rs2(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1Rs2() argument
456 decodeXTHeadMemPair(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeXTHeadMemPair() argument
481 decodeZcmpRlist(MCInst & Inst,uint32_t Imm,uint64_t Address,const void * Decoder) decodeZcmpRlist() argument
489 decodeRegReg(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRegReg() argument
498 decodeZcmpSpimm(MCInst & Inst,uint32_t Imm,uint64_t Address,const void * Decoder) decodeZcmpSpimm() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 862 tryAddingSymbolicOperand(uint64_t Address,int32_t Value,bool isBranch,uint64_t InstSize,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument
879 tryAddingPcLoadReferenceComment(uint64_t Address,int Value,const MCDisassembler * Decoder) tryAddingPcLoadReferenceComment() argument
1298 DecodeGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument
1309 DecodeCLRMGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCLRMGPRRegisterClass() argument
1323 DecodeGPRnopcRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnopcRegisterClass() argument
1336 DecodeGPRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnospRegisterClass() argument
1349 DecodeGPRwithAPSRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSRRegisterClass() argument
1364 DecodeGPRwithZRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRRegisterClass() argument
1382 DecodeGPRwithZRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRnospRegisterClass() argument
1392 DecodetGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPRRegisterClass() argument
1405 DecodeGPRPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairRegisterClass() argument
1423 DecodeGPRPairnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairnospRegisterClass() argument
1437 DecodeGPRspRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRspRegisterClass() argument
1448 DecodetcGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetcGPRRegisterClass() argument
1479 DecoderGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecoderGPRRegisterClass() argument
1505 DecodeSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegisterClass() argument
1516 DecodeHPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHPRRegisterClass() argument
1533 DecodeDPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegisterClass() argument
1549 DecodeDPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_8RegisterClass() argument
1557 DecodeSPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPR_8RegisterClass() argument
1565 DecodeDPR_VFP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_VFP2RegisterClass() argument
1580 DecodeQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeQPRRegisterClass() argument
1601 DecodeDPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairRegisterClass() argument
1623 DecodeDPairSpacedRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairSpacedRegisterClass() argument
1634 DecodePredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredicateOperand() argument
1654 DecodeCCOutOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCCOutOperand() argument
1664 DecodeSORegImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegImmOperand() argument
1702 DecodeSORegRegOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegRegOperand() argument
1738 DecodeRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument
1786 DecodeSPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegListOperand() argument
1811 DecodeDPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegListOperand() argument
1837 DecodeBitfieldMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBitfieldMaskOperand() argument
1865 DecodeCopMemInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCopMemInstruction() argument
2044 DecodeAddrMode2IdxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode2IdxInstruction() argument
2150 DecodeSORegMemOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegMemOperand() argument
2194 DecodeTSBInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSBInstruction() argument
2207 DecodeAddrMode3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode3Instruction() argument
2399 DecodeRFEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRFEInstruction() argument
2429 DecodeQADDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeQADDInstruction() argument
2454 DecodeMemMultipleWritebackInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMultipleWritebackInstruction() argument
2546 DecodeHINTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeHINTInstruction() argument
2569 DecodeCPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCPSInstruction() argument
2617 DecodeT2CPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2CPSInstruction() argument
2660 DecodeT2HintSpaceInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2HintSpaceInstruction() argument
2685 DecodeT2MOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2MOVTWInstruction() argument
2710 DecodeArmMOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeArmMOVTWInstruction() argument
2738 DecodeSMLAInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSMLAInstruction() argument
2767 DecodeTSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSTInstruction() argument
2789 DecodeSETPANInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSETPANInstruction() argument
2818 DecodeAddrModeImm12Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrModeImm12Operand() argument
2839 DecodeAddrMode5Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5Operand() argument
2860 DecodeAddrMode5FP16Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5FP16Operand() argument
2881 DecodeAddrMode7Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode7Operand() argument
2887 DecodeT2BInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BInstruction() argument
2914 DecodeBranchImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchImmInstruction() argument
2944 DecodeAddrMode6Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode6Operand() argument
2962 DecodeVLDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDInstruction() argument
3239 DecodeVLDST1Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST1Instruction() argument
3253 DecodeVLDST2Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST2Instruction() argument
3269 DecodeVLDST3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST3Instruction() argument
3283 DecodeVLDST4Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST4Instruction() argument
3294 DecodeVSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTInstruction() argument
3565 DecodeVLD1DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1DupInstruction() argument
3613 DecodeVLD2DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2DupInstruction() argument
3662 DecodeVLD3DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3DupInstruction() argument
3698 DecodeVLD4DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4DupInstruction() argument
3751 DecodeVMOVModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVModImmInstruction() argument
3797 DecodeMVEModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEModImmInstruction() argument
3826 DecodeMVEVADCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVADCInstruction() argument
3852 DecodeVSHLMaxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSHLMaxInstruction() argument
3872 DecodeShiftRight8Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight8Imm() argument
3879 DecodeShiftRight16Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight16Imm() argument
3886 DecodeShiftRight32Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight32Imm() argument
3893 DecodeShiftRight64Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight64Imm() argument
3900 DecodeTBLInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTBLInstruction() argument
3937 DecodeThumbAddSpecialReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSpecialReg() argument
3962 DecodeThumbBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBROperand() argument
3971 DecodeT2BROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BROperand() argument
3980 DecodeThumbCmpBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCmpBROperand() argument
3989 DecodeThumbAddrModeRR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeRR() argument
4005 DecodeThumbAddrModeIS(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeIS() argument
4020 DecodeThumbAddrModePC(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModePC() argument
4031 DecodeThumbAddrModeSP(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeSP() argument
4040 DecodeT2AddrModeSOReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeSOReg() argument
4070 DecodeT2LoadShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadShift() argument
4154 DecodeT2LoadImm8(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm8() argument
4239 DecodeT2LoadImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm12() argument
4319 DecodeT2LoadT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadT() argument
4359 DecodeT2LoadLabel(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadLabel() argument
4412 DecodeT2Imm8S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8S4() argument
4426 DecodeT2Imm7S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7S4() argument
4442 DecodeT2AddrModeImm8s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8s4() argument
4458 DecodeT2AddrModeImm7s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7s4() argument
4474 DecodeT2AddrModeImm0_1020s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm0_1020s4() argument
4489 DecodeT2Imm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8() argument
4502 DecodeT2Imm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7() argument
4517 DecodeT2AddrModeImm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8() argument
4565 DecodeTAddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeTAddrModeImm7() argument
4582 DecodeT2AddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7() argument
4600 DecodeT2LdStPre(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LdStPre() argument
4662 DecodeT2AddrModeImm12(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm12() argument
4689 DecodeThumbAddSPImm(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPImm() argument
4701 DecodeThumbAddSPReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPReg() argument
4727 DecodeThumbCPS(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCPS() argument
4739 DecodePostIdxReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePostIdxReg() argument
4753 DecodeMveAddrModeRQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeRQ() argument
4769 DecodeMveAddrModeQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeQ() argument
4792 DecodeThumbBLXOffset(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLXOffset() argument
4817 DecodeCoprocessor(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocessor() argument
4833 DecodeThumbTableBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbTableBranch() argument
4851 DecodeThumb2BCCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumb2BCCInstruction() argument
4893 DecodeT2SOImm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2SOImm() argument
4925 DecodeThumbBCCTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBCCTargetOperand() argument
4934 DecodeThumbBLTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLTargetOperand() argument
4958 DecodeMemBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMemBarrierOption() argument
4968 DecodeInstSyncBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeInstSyncBarrierOption() argument
4977 DecodeMSRMask(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMSRMask() argument
5079 DecodeBankedReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBankedReg() argument
5095 DecodeDoubleRegLoad(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegLoad() argument
5117 DecodeDoubleRegStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegStore() argument
5143 DecodeLDRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreImm() argument
5169 DecodeLDRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreReg() argument
5197 DecodeSTRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreImm() argument
5223 DecodeSTRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreReg() argument
5248 DecodeVLD1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1LN() argument
5315 DecodeVST1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST1LN() argument
5380 DecodeVLD2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2LN() argument
5447 DecodeVST2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST2LN() argument
5510 DecodeVLD3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3LN() argument
5580 DecodeVST3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST3LN() argument
5643 DecodeVLD4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4LN() argument
5724 DecodeVST4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST4LN() argument
5796 DecodeVMOVSRR(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVSRR() argument
5822 DecodeVMOVRRS(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVRRS() argument
5848 DecodeIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeIT() argument
5878 DecodeT2LDRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LDRDPreInstruction() argument
5915 DecodeT2STRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2STRDPreInstruction() argument
5949 DecodeT2Adr(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Adr() argument
5976 DecodeT2ShifterImmOperand(MCInst & Inst,uint32_t Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2ShifterImmOperand() argument
5986 DecodeSwap(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSwap() argument
6013 DecodeVCVTD(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTD() argument
6072 DecodeVCVTQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTQ() argument
6133 DecodeNEONComplexLane64Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeNEONComplexLane64Instruction() argument
6164 DecodeLDR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLDR() argument
6192 DecoderForMRRC2AndMCRR2(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecoderForMRRC2AndMCRR2() argument
6238 DecodeForVMRSandVMSR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeForVMRSandVMSR() argument
6290 DecodeBFLabelOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFLabelOperand() argument
6309 DecodeBFAfterTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFAfterTargetOperand() argument
6321 DecodePredNoALOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredNoALOperand() argument
6329 DecodeLOLoop(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLOLoop() argument
6392 DecodeLongShiftOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLongShiftOperand() argument
6405 DecodetGPROddRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPROddRegisterClass() argument
6416 DecodetGPREvenRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPREvenRegisterClass() argument
6428 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSR_NZCVnospRegisterClass() argument
6444 DecodeVSCCLRM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSCCLRM() argument
6471 DecodeMQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQPRRegisterClass() argument
6487 DecodeMQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQPRRegisterClass() argument
6503 DecodeMQQQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQQQPRRegisterClass() argument
6514 DecodeVPTMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVPTMaskOperand() argument
6545 DecodeVpredROperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredROperand() argument
6558 DecodeVpredNOperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredNOperand() argument
6569 DecodeRestrictedIPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedIPredicateOperand() argument
6576 DecodeRestrictedSPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedSPredicateOperand() argument
6598 DecodeRestrictedUPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedUPredicateOperand() argument
6605 DecodeRestrictedFPPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedFPPredicateOperand() argument
6636 DecodeVCVTImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTImmOperand() argument
6680 DecodeVSTRVLDR_SYSREG(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTRVLDR_SYSREG() argument
6723 DecodeMVE_MEM_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder,unsigned Rn,OperandDecoder RnDecoder,OperandDecoder AddrDecoder) DecodeMVE_MEM_pre() argument
6744 DecodeMVE_MEM_1_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_1_pre() argument
6754 DecodeMVE_MEM_2_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_2_pre() argument
6764 DecodeMVE_MEM_3_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_3_pre() argument
6774 DecodePowerTwoOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePowerTwoOperand() argument
6787 DecodeMVEPairVectorIndexOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEPairVectorIndexOperand() argument
6797 DecodeMVEVMOVQtoDReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVQtoDReg() argument
6821 DecodeMVEVMOVDRegtoQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVDRegtoQ() argument
6847 DecodeMVEOverlappingLongShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEOverlappingLongShift() argument
6927 DecodeMVEVCVTt1fp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCVTt1fp() argument
6947 DecodeMVEVCMP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCMP() argument
6984 DecodeMveVCTP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveVCTP() argument
6995 DecodeMVEVPNOT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVPNOT() argument
7004 DecodeT2AddSubSPImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddSubSPImm() argument
7039 DecodeLazyLoadStoreMul(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLazyLoadStoreMul() argument
[all...] |
| /llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 60 DecodeGPRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument
69 DecodeFPR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR32RegisterClass() argument
78 DecodeFPR64RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR64RegisterClass() argument
87 DecodeCFRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCFRRegisterClass() argument
96 DecodeFCSRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCSRRegisterClass() argument
105 DecodeLSX128RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLSX128RegisterClass() argument
114 DecodeLASX256RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLASX256RegisterClass() argument
123 DecodeSCRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSCRRegisterClass() argument
133 decodeUImmOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeUImmOperand() argument
142 decodeSImmOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmOperand() argument
[all...] |
| /llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 43 uint64_t Address, const void *Decoder) { in DecodeRegisterClass() argument
52 const void *Decoder) { in DecodeDR32RegisterClass() argument
58 const void *Decoder) { in DecodeDR16RegisterClass() argument
64 const void *Decoder) { in DecodeDR8RegisterClass() argument
70 const void *Decoder) { in DecodeAR32RegisterClass() argument
76 const void *Decoder) { in DecodeAR16RegisterClass() argument
82 DecodeXR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR32RegisterClass() argument
88 DecodeXR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR16RegisterClass() argument
94 DecodeFPDRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeFPDRRegisterClass() argument
103 DecodeFPCSCRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeFPCSCRegisterClass() argument
110 DecodeCCRCRegisterClass(MCInst & Inst,APInt & Insn,uint64_t Address,const void * Decoder) DecodeCCRCRegisterClass() argument
115 DecodeImm32(MCInst & Inst,uint64_t Imm,uint64_t Address,const void * Decoder) DecodeImm32() argument
[all...] |
| /llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 143 const MCDisassembler *Decoder) { in DecodeIntRegsRegisterClass()
153 const MCDisassembler *Decoder) { in DecodeI64RegsRegisterClass()
161 const MCDisassembler *Decoder) { in DecodePointerLikeRegClass0()
167 const MCDisassembler *Decoder) { in DecodeFPRegsRegisterClass()
177 const MCDisassembler *Decoder) { in DecodeDFPRegsRegisterClass()
187 const MCDisassembler *Decoder) { in DecodeQFPRegsRegisterClass()
200 const MCDisassembler *Decoder) { in DecodeCoprocRegsRegisterClass()
210 const MCDisassembler *Decoder) { in DecodeFCCRegsRegisterClass()
219 const MCDisassembler *Decoder) { in DecodeASRRegsRegisterClass()
228 const MCDisassembler *Decoder) { in DecodePRRegsRegisterClass()
[all …]
|
| /llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 72 DecodeGPR8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR8RegisterClass() argument
83 DecodeLD8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLD8RegisterClass() argument
143 decodeFIOARr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFIOARr() argument
156 decodeFIORdA(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFIORdA() argument
169 decodeFIOBIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFIOBIT() argument
179 decodeCallTarget(MCInst & Inst,unsigned Field,uint64_t Address,const MCDisassembler * Decoder) decodeCallTarget() argument
187 decodeFRd(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFRd() argument
196 decodeFLPMX(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFLPMX() argument
205 decodeFFMULRdRr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFFMULRdRr() argument
219 decodeFMOVWRdRr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFMOVWRdRr() argument
232 decodeFWRdK(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFWRdK() argument
249 decodeFMUL2RdRr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFMUL2RdRr() argument
262 decodeMemri(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeMemri() argument
279 decodeFBRk(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFBRk() argument
299 decodeCondBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeCondBranch() argument
333 decodeLoadStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeLoadStore() argument
[all...] |
| /llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 178 const MCDisassembler *Decoder) { in DecodeGRRegsRegisterClass()
188 const MCDisassembler *Decoder) { in DecodeRRegsRegisterClass()
198 const MCDisassembler *Decoder) { in DecodeBitpOperand()
210 const MCDisassembler *Decoder) { in DecodeNegImmOperand()
251 const MCDisassembler *Decoder) { in Decode2OpInstructionFail()
321 const MCDisassembler *Decoder) { in Decode2RInstruction()
334 const MCDisassembler *Decoder) { in Decode2RImmInstruction()
347 const MCDisassembler *Decoder) { in DecodeR2RInstruction()
360 const MCDisassembler *Decoder) { in Decode2RSrcDstInstruction()
374 const MCDisassembler *Decoder) { in DecodeRUSInstruction()
[all …]
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| /llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 81 return *static_cast<HexagonDisassembler const *>(Decoder); in disassembler() argument
86 HexagonDisassembler const &Disassembler = disassembler(Decoder); in signedDecoder() argument
551 DecodeIntRegsLow8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsLow8RegisterClass() argument
557 DecodeIntRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsRegisterClass() argument
573 DecodeGeneralSubRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGeneralSubRegsRegisterClass() argument
586 DecodeHvxVRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxVRRegisterClass() argument
602 DecodeDoubleRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeDoubleRegsRegisterClass() argument
615 DecodeGeneralDoubleLow8RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGeneralDoubleLow8RegsRegisterClass() argument
625 DecodeHvxWRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxWRRegisterClass() argument
643 DecodeHvxVQRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxVQRRegisterClass() argument
653 DecodePredRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodePredRegsRegisterClass() argument
662 DecodeHvxQRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxQRRegisterClass() argument
671 DecodeCtrRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeCtrRegsRegisterClass() argument
699 DecodeCtrRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeCtrRegs64RegisterClass() argument
727 DecodeModRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeModRegsRegisterClass() argument
745 unsignedImmDecoder(MCInst & MI,unsigned tmp,uint64_t,const MCDisassembler * Decoder) unsignedImmDecoder() argument
755 s32_0ImmDecoder(MCInst & MI,unsigned tmp,uint64_t,const MCDisassembler * Decoder) s32_0ImmDecoder() argument
765 brtargetDecoder(MCInst & MI,unsigned tmp,uint64_t Address,const MCDisassembler * Decoder) brtargetDecoder() argument
811 DecodeSysRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeSysRegsRegisterClass() argument
838 DecodeSysRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeSysRegs64RegisterClass() argument
853 DecodeGuestRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGuestRegsRegisterClass() argument
880 DecodeGuestRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGuestRegs64RegisterClass() argument
[all...] |
| /llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 176 const MCDisassembler *Decoder) { in decodeRiMemoryValue()
189 const MCDisassembler *Decoder) { in decodeRrMemoryValue()
202 const MCDisassembler *Decoder) { in decodeSplsValue()
216 const MCDisassembler *Decoder) { in tryAddingSymbolicOperand()
222 const MCDisassembler *Decoder) { in decodeBranch()
231 const MCDisassembler *Decoder) { in decodeShiftImm()
240 const MCDisassembler *Decoder) { in decodePredicateOperand()
|
| /llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 133 const MCDisassembler *Decoder) { in DecodeGPR32RegisterClass()
146 const MCDisassembler *Decoder) { in DecodeGBR32ShortRegister()
181 const MCDisassembler *Decoder) { in DecodeSymbolicOperand()
189 const MCDisassembler *Decoder) { in DecodeSymbolicOperandOff()
199 const MCDisassembler *Decoder) { in DecodeBranchTargetS()
231 const MCDisassembler *Decoder) { in DecodeStLImmInstruction()
248 const MCDisassembler *Decoder) { in DecodeLdLImmInstruction()
266 const MCDisassembler *Decoder) { in DecodeLdRLImmInstruction()
283 const MCDisassembler *Decoder) { in DecodeMoveHRegInstruction()
309 const MCDisassembler *Decoder) { in DecodeCCRU6Instruction()
[all …]
|
| /llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.h | 33 bool (Decoder::*Routine)(const uint8_t *, unsigned &, unsigned, bool); member
186 Decoder(ScopedPrinter &SW, bool isAArch64) : SW(SW), in Decoder() function
|
| H A D | COFFDumper.cpp | 1766 ARM::WinEH::Decoder Decoder(W, Obj->getMachine() != printUnwindInfo() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 90 const MCDisassembler *Decoder) { in decodeSOPPBrTarget() argument
104 decodeSMEMOffset(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) decodeSMEMOffset() argument
118 decodeBoolReg(MCInst & Inst,unsigned Val,uint64_t Addr,const MCDisassembler * Decoder) decodeBoolReg() argument
125 decodeSplitBarrier(MCInst & Inst,unsigned Val,uint64_t Addr,const MCDisassembler * Decoder) decodeSplitBarrier() argument
131 decodeDpp8FI(MCInst & Inst,unsigned Val,uint64_t Addr,const MCDisassembler * Decoder) decodeDpp8FI() argument
172 decodeSrcOp(MCInst & Inst,unsigned EncSize,AMDGPUDisassembler::OpWidthTy OpWidth,unsigned Imm,unsigned EncImm,bool MandatoryLiteral,unsigned ImmWidth,AMDGPU::OperandSemantics Sema,const MCDisassembler * Decoder) decodeSrcOp() argument
190 decodeAV10(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeAV10() argument
199 decodeSrcReg9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcReg9() argument
209 decodeSrcA9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcA9() argument
219 decodeSrcAV10(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcAV10() argument
233 decodeSrcRegOrImm9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcRegOrImm9() argument
244 decodeSrcRegOrImmA9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcRegOrImmA9() argument
253 decodeSrcRegOrImmDeferred9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcRegOrImmDeferred9() argument
306 DecodeVGPR_16_Lo128RegisterClass(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) DecodeVGPR_16_Lo128RegisterClass() argument
317 decodeOperand_VSrcT16_Lo128(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeOperand_VSrcT16_Lo128() argument
333 decodeOperand_VSrcT16(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeOperand_VSrcT16() argument
349 decodeOperand_KImmFP(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) decodeOperand_KImmFP() argument
355 decodeOperandVOPDDstY(MCInst & Inst,unsigned Val,uint64_t Addr,const void * Decoder) decodeOperandVOPDDstY() argument
376 decodeAVLdSt(MCInst & Inst,unsigned Imm,AMDGPUDisassembler::OpWidthTy Opw,const MCDisassembler * Decoder) decodeAVLdSt() argument
411 decodeAVLdSt(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeAVLdSt() argument
417 decodeOperand_VSrc_f64(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) decodeOperand_VSrc_f64() argument
[all...] |
| /llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 75 DecodeGR8RegisterClass(MCInst & MI,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR8RegisterClass() argument
93 DecodeGR16RegisterClass(MCInst & MI,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR16RegisterClass() argument
112 DecodeCGImm(MCInst & MI,uint64_t Bits,uint64_t Address,const MCDisassembler * Decoder) DecodeCGImm() argument
130 DecodeMemOperand(MCInst & MI,uint64_t Bits,uint64_t Address,const MCDisassembler * Decoder) DecodeMemOperand() argument
|
| /llvm-project/llvm/lib/DebugInfo/GSYM/ |
| H A D | ObjectFileTransformer.cpp | 52 const uint32_t NameSize = Decoder.getU32(&Offset); in getUUID() local
|
| /llvm-project/llvm/utils/TableGen/ |
| H A D | DecoderEmitter.cpp | 96 std::string Decoder; member
1051 for (const auto &Decoder : Decoders) { emitDecoderFunction() local
1182 const std::string &Decoder = OpInfo.Decoder; emitBinaryParser() local
1245 SmallString<256> Decoder; getDecoderIndex() local
1868 std::string Decoder; findOperandDecoderMethod() local
1893 std::string Decoder = findOperandDecoderMethod(TypeRecord); getOpInfo() local
[all...] |
| /llvm-project/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 128 const MCDisassembler *Decoder) { in decodeMemoryOpValue()
|