Lines Matching defs:Decoder
83 const MCDisassembler *Decoder);
87 const MCDisassembler *Decoder);
91 const MCDisassembler *Decoder);
95 const MCDisassembler *Decoder);
99 const MCDisassembler *Decoder);
103 const MCDisassembler *Decoder);
107 const MCDisassembler *Decoder);
111 const MCDisassembler *Decoder);
115 const MCDisassembler *Decoder);
119 const MCDisassembler *Decoder);
123 const MCDisassembler *Decoder);
127 const MCDisassembler *Decoder);
131 const MCDisassembler *Decoder);
135 const MCDisassembler *Decoder);
139 const MCDisassembler *Decoder);
143 const MCDisassembler *Decoder);
147 const MCDisassembler *Decoder);
151 const MCDisassembler *Decoder);
155 const MCDisassembler *Decoder);
159 const MCDisassembler *Decoder);
163 const MCDisassembler *Decoder);
167 const MCDisassembler *Decoder);
171 const MCDisassembler *Decoder);
175 const MCDisassembler *Decoder);
179 const MCDisassembler *Decoder);
183 const MCDisassembler *Decoder);
187 const MCDisassembler *Decoder);
191 const MCDisassembler *Decoder);
195 const MCDisassembler *Decoder);
199 const MCDisassembler *Decoder);
203 const MCDisassembler *Decoder);
209 const MCDisassembler *Decoder);
215 const MCDisassembler *Decoder);
221 const MCDisassembler *Decoder);
227 const MCDisassembler *Decoder);
233 const MCDisassembler *Decoder);
239 const MCDisassembler *Decoder);
242 const MCDisassembler *Decoder);
245 const MCDisassembler *Decoder);
249 const MCDisassembler *Decoder);
252 const MCDisassembler *Decoder);
256 const MCDisassembler *Decoder);
260 const MCDisassembler *Decoder);
264 const MCDisassembler *Decoder);
267 const MCDisassembler *Decoder);
271 const MCDisassembler *Decoder);
274 const MCDisassembler *Decoder);
278 const MCDisassembler *Decoder);
282 const MCDisassembler *Decoder);
286 const MCDisassembler *Decoder);
290 const MCDisassembler *Decoder);
294 const MCDisassembler *Decoder);
298 const MCDisassembler *Decoder);
302 const MCDisassembler *Decoder);
306 const MCDisassembler *Decoder);
309 const MCDisassembler *Decoder);
313 const MCDisassembler *Decoder);
316 const MCDisassembler *Decoder);
319 const MCDisassembler *Decoder);
323 const MCDisassembler *Decoder);
327 const MCDisassembler *Decoder);
331 const MCDisassembler *Decoder);
335 const MCDisassembler *Decoder);
339 const MCDisassembler *Decoder);
343 const MCDisassembler *Decoder);
348 const MCDisassembler *Decoder);
353 const MCDisassembler *Decoder) {
355 Decoder);
361 const MCDisassembler *Decoder);
364 const MCDisassembler *Decoder);
368 const MCDisassembler *Decoder);
372 const MCDisassembler *Decoder);
375 const MCDisassembler *Decoder);
379 const MCDisassembler *Decoder);
383 const MCDisassembler *Decoder);
389 const MCDisassembler *Decoder);
394 const MCDisassembler *Decoder);
398 const MCDisassembler *Decoder);
403 const MCDisassembler *Decoder);
408 const MCDisassembler *Decoder);
413 const MCDisassembler *Decoder);
418 const MCDisassembler *Decoder);
423 const MCDisassembler *Decoder);
428 const MCDisassembler *Decoder);
433 const MCDisassembler *Decoder);
438 const MCDisassembler *Decoder);
443 const MCDisassembler *Decoder);
448 const MCDisassembler *Decoder);
453 const MCDisassembler *Decoder);
458 const MCDisassembler *Decoder);
462 const MCDisassembler *Decoder);
466 const MCDisassembler *Decoder);
470 const MCDisassembler *Decoder);
474 const MCDisassembler *Decoder);
478 const MCDisassembler *Decoder);
482 const MCDisassembler *Decoder);
486 const MCDisassembler *Decoder);
490 const MCDisassembler *Decoder);
527 const MCDisassembler *Decoder) {
555 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
558 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
565 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
576 const MCDisassembler *Decoder) {
579 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
581 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
590 const MCDisassembler *Decoder) {
593 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
595 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
605 const MCDisassembler *Decoder) {
631 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
634 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
644 const MCDisassembler *Decoder) {
651 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
653 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
658 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
660 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
665 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
678 const MCDisassembler *Decoder) {
704 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
707 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
717 const MCDisassembler *Decoder) {
724 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
726 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
731 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
733 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
738 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
751 const MCDisassembler *Decoder) {
776 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
779 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
790 const MCDisassembler *Decoder) {
815 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
818 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
829 const MCDisassembler *Decoder) {
858 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
861 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
872 const MCDisassembler *Decoder) {
902 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
905 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
916 const MCDisassembler *Decoder) {
950 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
954 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
965 const MCDisassembler *Decoder) {
994 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
996 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1008 const MCDisassembler *Decoder) {
1037 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt)));
1039 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs)));
1050 const MCDisassembler *Decoder) {
1080 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt)));
1082 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs)));
1092 const MCDisassembler *Decoder) {
1095 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1097 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1099 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1338 const MCDisassembler *Decoder) {
1344 const MCDisassembler *Decoder) {
1348 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo);
1355 const MCDisassembler *Decoder) {
1358 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo);
1365 const MCDisassembler *Decoder) {
1368 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo);
1375 const MCDisassembler *Decoder) {
1378 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo);
1385 const MCDisassembler *Decoder) {
1388 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo);
1395 const MCDisassembler *Decoder) {
1396 if (static_cast<const MipsDisassembler *>(Decoder)->isGP64())
1397 return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder);
1399 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
1404 const MCDisassembler *Decoder) {
1405 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
1410 const MCDisassembler *Decoder) {
1414 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo);
1421 const MCDisassembler *Decoder) {
1425 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo);
1432 const MCDisassembler *Decoder) {
1435 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo);
1442 const MCDisassembler *Decoder) {
1445 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo);
1452 const MCDisassembler *Decoder) {
1456 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo);
1462 const MCDisassembler *Decoder) {
1467 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1468 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1482 const MCDisassembler *Decoder) {
1487 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1488 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1502 const MCDisassembler *Decoder) {
1507 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1508 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1518 const MCDisassembler *Decoder) {
1523 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1534 const MCDisassembler *Decoder) {
1539 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1550 const MCDisassembler *Decoder) {
1555 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1566 const MCDisassembler *Decoder) {
1571 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1581 const MCDisassembler *Decoder) {
1585 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1595 const MCDisassembler *Decoder) {
1599 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1608 const MCDisassembler *Decoder) {
1612 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1622 const MCDisassembler *Decoder) {
1627 Reg = getReg(Decoder, Mips::MSA128BRegClassID, Reg);
1628 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1669 const MCDisassembler *Decoder) {
1678 if (DecodeGPRMM16RegisterClass(Inst, Reg, Address, Decoder)
1688 if (DecodeGPRMM16ZeroRegisterClass(Inst, Reg, Address, Decoder)
1694 if (DecodeGPRMM16RegisterClass(Inst, Base, Address, Decoder)
1726 const MCDisassembler *Decoder) {
1730 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1741 const MCDisassembler *Decoder) {
1745 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1756 const MCDisassembler *Decoder) {
1768 if (DecodeRegListOperand16(Inst, Insn, Address, Decoder)
1780 const MCDisassembler *Decoder) {
1785 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1786 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1800 const MCDisassembler *Decoder) {
1805 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1806 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1811 if (DecodeRegListOperand(Inst, Insn, Address, Decoder)
1834 const MCDisassembler *Decoder) {
1839 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1840 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1850 const MCDisassembler *Decoder) {
1855 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1856 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1867 const MCDisassembler *Decoder) {
1874 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1875 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1885 const MCDisassembler *Decoder) {
1890 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1891 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1901 const MCDisassembler *Decoder) {
1906 Reg = getReg(Decoder, Mips::COP3RegClassID, Reg);
1907 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1918 const MCDisassembler *Decoder) {
1923 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1924 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1935 const MCDisassembler *Decoder) {
1940 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1941 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1952 const MCDisassembler *Decoder) {
1957 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt);
1958 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1973 const MCDisassembler *Decoder) {
1983 const MCDisassembler *Decoder) {
1987 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2);
1994 const MCDisassembler *Decoder) {
1998 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo);
2005 const MCDisassembler *Decoder) {
2009 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo);
2016 const MCDisassembler *Decoder) {
2020 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo);
2027 const MCDisassembler *Decoder) {
2031 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo);
2038 const MCDisassembler *Decoder) {
2042 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo);
2049 const MCDisassembler *Decoder) {
2053 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo);
2060 const MCDisassembler *Decoder) {
2064 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo);
2071 const MCDisassembler *Decoder) {
2075 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo);
2082 const MCDisassembler *Decoder) {
2086 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo);
2093 const MCDisassembler *Decoder) {
2097 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo);
2104 const MCDisassembler *Decoder) {
2112 const MCDisassembler *Decoder) {
2120 const MCDisassembler *Decoder) {
2128 const MCDisassembler *Decoder) {
2137 const MCDisassembler *Decoder) {
2146 const MCDisassembler *Decoder) {
2155 const MCDisassembler *Decoder) {
2163 const MCDisassembler *Decoder) {
2171 const MCDisassembler *Decoder) {
2179 const MCDisassembler *Decoder) {
2188 const MCDisassembler *Decoder) {
2196 const MCDisassembler *Decoder) {
2204 const MCDisassembler *Decoder) {
2216 const MCDisassembler *Decoder) {
2226 const MCDisassembler *Decoder) {
2234 const MCDisassembler *Decoder) {
2244 const MCDisassembler *Decoder) {
2251 const MCDisassembler *Decoder) {
2263 const MCDisassembler *Decoder) {
2270 const MCDisassembler *Decoder) {
2276 const MCDisassembler *Decoder) {
2291 const MCDisassembler *Decoder) {
2302 const MCDisassembler *Decoder) {
2330 const MCDisassembler *Decoder) {
2354 const MCDisassembler *Decoder) {
2356 if (DecodeMovePRegPair(Inst, RegPair, Address, Decoder) ==
2361 if (static_cast<const MipsDisassembler*>(Decoder)->hasMips32r6())
2366 if (DecodeGPRMM16MovePRegisterClass(Inst, RegRs, Address, Decoder) ==
2371 if (DecodeGPRMM16MovePRegisterClass(Inst, RegRt, Address, Decoder) ==
2380 const MCDisassembler *Decoder) {
2423 const MCDisassembler *Decoder) {
2431 const MCDisassembler *Decoder) {
2466 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs)));
2470 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
2480 const MCDisassembler *Decoder) {
2511 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs)));
2513 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
2525 const MCDisassembler *Decoder) {