RISCVDisassembler.cpp - OpenGrok cross reference for /llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp

Lines Matching defs:Decoder
77                                            const MCDisassembler *Decoder) {
78   bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
90                                               const MCDisassembler *Decoder) {
91   bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
103                                               const MCDisassembler *Decoder) {
104   bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
116                                                const MCDisassembler *Decoder) {
127                                              const MCDisassembler *Decoder) {
138                                              const MCDisassembler *Decoder) {
149                                               const MCDisassembler *Decoder) {
160                                              const MCDisassembler *Decoder) {
171                                               const MCDisassembler *Decoder) {
182                                                const MCDisassembler *Decoder) {
187   return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder);
192                              const MCDisassembler *Decoder) {
197   return DecodeGPRNoX0RegisterClass(Inst, RegNo, Address, Decoder);
202                                             const MCDisassembler *Decoder) {
213                                                const MCDisassembler *Decoder) {
218       static_cast<const RISCVDisassembler *>(Decoder);
229                                             const void *Decoder) {
240                                           const MCDisassembler *Decoder) {
251                                             const MCDisassembler *Decoder) {
256       static_cast<const RISCVDisassembler *>(Decoder);
268                                             const MCDisassembler *Decoder) {
273       static_cast<const RISCVDisassembler *>(Decoder);
285                                             const MCDisassembler *Decoder) {
290       static_cast<const RISCVDisassembler *>(Decoder);
302                                             const MCDisassembler *Decoder) {
312                                    const MCDisassembler *Decoder) {
325                                       const MCDisassembler *Decoder) {
333                                               const MCDisassembler *Decoder) {
336   if (!Decoder->getSubtargetInfo().hasFeature(RISCV::Feature64Bit) &&
347                                              const MCDisassembler *Decoder) {
350   return decodeUImmOperand<N>(Inst, Imm, Address, Decoder);
355                                  const MCDisassembler *Decoder) {
358   return decodeUImmLog2XLenOperand(Inst, Imm, Address, Decoder);
364                                       const MCDisassembler *Decoder) {
374                                              const MCDisassembler *Decoder) {
377   return decodeSImmOperand<N>(Inst, Imm, Address, Decoder);
383                                              const MCDisassembler *Decoder) {
394                                          const MCDisassembler *Decoder) {
404                                  const MCDisassembler *Decoder) {
414                                  const MCDisassembler *Decoder) {
425                                                const MCDisassembler *Decoder);
429                                          const MCDisassembler *Decoder);
433                                             const MCDisassembler *Decoder);
437                                         const MCDisassembler *Decoder);
441                                            const MCDisassembler *Decoder);
445                                         const MCDisassembler *Decoder);
448                                     uint64_t Address, const void *Decoder);
451                                  const MCDisassembler *Decoder);
454                                     uint64_t Address, const void *Decoder);
458                                         const MCDisassembler *Decoder);
464                                                const MCDisassembler *Decoder) {
467       DecodeGPRNoX0RegisterClass(Inst, Rd, Address, Decoder);
476                                         const MCDisassembler *Decoder) {
479       DecodeGPRX1X5RegisterClass(Inst, Rs1, Address, Decoder);
486                                          const MCDisassembler *Decoder) {
491       decodeSImmOperand<6>(Inst, SImm6, Address, Decoder);
498                                             const MCDisassembler *Decoder) {
504       decodeUImmOperand<6>(Inst, UImm6, Address, Decoder);
511                                         const MCDisassembler *Decoder) {
514   DecodeGPRRegisterClass(Inst, Rd, Address, Decoder);
515   DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
521                                            const MCDisassembler *Decoder) {
524   DecodeGPRRegisterClass(Inst, Rd, Address, Decoder);
526   DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
532                                         const MCDisassembler *Decoder) {
537   DecodeGPRRegisterClass(Inst, Rd1, Address, Decoder);
538   DecodeGPRRegisterClass(Inst, Rd2, Address, Decoder);
539   DecodeGPRRegisterClass(Inst, Rs1, Address, Decoder);
541       decodeUImmOperand<2>(Inst, UImm2, Address, Decoder);
557                                     uint64_t Address, const void *Decoder) {
565                                  const MCDisassembler *Decoder) {
568   DecodeGPRRegisterClass(Inst, Rs1, Address, Decoder);
569   DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
574                                     uint64_t Address, const void *Decoder) {