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Searched defs:MI (Results 1 – 25 of 868) sorted by relevance

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/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGenericMachineInstrs.h40 static bool classof(const MachineInstr *MI) { in classof() argument
74 static bool classof(const MachineInstr *MI) { in classof() argument
86 static bool classof(const MachineInstr *MI) { in classof() argument
116 static bool classof(const MachineInstr *MI) { in classof() argument
124 static bool classof(const MachineInstr *MI) { in classof() argument
133 classof(const MachineInstr * MI) classof() argument
148 classof(const MachineInstr * MI) classof() argument
156 classof(const MachineInstr * MI) classof() argument
176 classof(const MachineInstr * MI) classof() argument
192 classof(const MachineInstr * MI) classof() argument
207 classof(const MachineInstr * MI) classof() argument
215 classof(const MachineInstr * MI) classof() argument
224 classof(const MachineInstr * MI) classof() argument
232 classof(const MachineInstr * MI) classof() argument
243 classof(const MachineInstr * MI) classof() argument
256 classof(const MachineInstr * MI) classof() argument
271 classof(const MachineInstr * MI) classof() argument
286 classof(const MachineInstr * MI) classof() argument
294 classof(const MachineInstr * MI) classof() argument
302 classof(const MachineInstr * MI) classof() argument
310 classof(const MachineInstr * MI) classof() argument
322 classof(const MachineInstr * MI) classof() argument
333 classof(const MachineInstr * MI) classof() argument
341 classof(const MachineInstr * MI) classof() argument
353 classof(const MachineInstr * MI) classof() argument
367 classof(const MachineInstr * MI) classof() argument
376 classof(const MachineInstr * MI) classof() argument
384 classof(const MachineInstr * MI) classof() argument
403 classof(const MachineInstr * MI) classof() argument
455 classof(const MachineInstr * MI) classof() argument
478 classof(const MachineInstr * MI) classof() argument
495 classof(const MachineInstr * MI) classof() argument
537 classof(const MachineInstr * MI) classof() argument
553 classof(const MachineInstr * MI) classof() argument
647 classof(const MachineInstr * MI) classof() argument
658 classof(const MachineInstr * MI) classof() argument
698 classof(const MachineInstr * MI) classof() argument
721 classof(const MachineInstr * MI) classof() argument
744 classof(const MachineInstr * MI) classof() argument
759 classof(const MachineInstr * MI) classof() argument
767 classof(const MachineInstr * MI) classof() argument
775 classof(const MachineInstr * MI) classof() argument
786 classof(const MachineInstr * MI) classof() argument
798 classof(const MachineInstr * MI) classof() argument
808 classof(const MachineInstr * MI) classof() argument
820 classof(const MachineInstr * MI) classof() argument
845 classof(const MachineInstr * MI) classof() argument
853 classof(const MachineInstr * MI) classof() argument
861 classof(const MachineInstr * MI) classof() argument
871 classof(const MachineInstr * MI) classof() argument
879 classof(const MachineInstr * MI) classof() argument
887 classof(const MachineInstr * MI) classof() argument
898 classof(const MachineInstr * MI) classof() argument
[all...]
H A DGISelChangeObserver.h88 O->erasingInstr(MI); in createdInstr() argument
92 O->createdInstr(MI); in changingInstr() argument
96 O->changingInstr(MI); in changedInstr() argument
84 erasingInstr(MachineInstr & MI) erasingInstr() argument
101 MF_HandleInsertion(MachineInstr & MI) MF_HandleInsertion() argument
102 MF_HandleRemoval(MachineInstr & MI) MF_HandleRemoval() argument
[all...]
/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kInstPrinter.h61 printPCRelImm(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCRelImm() argument
66 printARI8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARI8Mem() argument
69 printARI16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARI16Mem() argument
72 printARI32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARI32Mem() argument
76 printARIPI8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARIPI8Mem() argument
79 printARIPI16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARIPI16Mem() argument
82 printARIPI32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARIPI32Mem() argument
86 printARIPD8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARIPD8Mem() argument
89 printARIPD16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARIPD16Mem() argument
92 printARIPD32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARIPD32Mem() argument
96 printARID8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARID8Mem() argument
99 printARID16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARID16Mem() argument
102 printARID32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARID32Mem() argument
106 printARII8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARII8Mem() argument
109 printARII16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARII16Mem() argument
112 printARII32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printARII32Mem() argument
116 printAS8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printAS8Mem() argument
119 printAS16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printAS16Mem() argument
122 printAS32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printAS32Mem() argument
126 printAL8Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printAL8Mem() argument
129 printAL16Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printAL16Mem() argument
132 printAL32Mem(const MCInst * MI,unsigned opNum,raw_ostream & O) printAL32Mem() argument
136 printPCD8Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCD8Mem() argument
140 printPCD16Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCD16Mem() argument
144 printPCD32Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCD32Mem() argument
149 printPCI8Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCI8Mem() argument
153 printPCI16Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCI16Mem() argument
157 printPCI32Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCI32Mem() argument
[all...]
H A DM68kMemOperandPrinter.h27 void printARIMem(const InstTy *MI, unsigned OpNum, raw_ostream &O) { in printARIMem()
33 void printARIPIMem(const InstTy *MI, unsigned OpNum, raw_ostream &O) { in printARIPIMem()
39 void printARIPDMem(const InstTy *MI, unsigned OpNum, raw_ostream &O) { in printARIPDMem()
45 void printARIDMem(const InstTy *MI, unsigned OpNum, raw_ostream &O) { in printARIDMem()
53 void printARIIMem(const InstTy *MI, unsigned OpNum, raw_ostream &O) { in printARIIMem()
63 void printPCDMem(const InstTy *MI, uint64_t Address, unsigned OpNum, in printPCDMem()
70 void printPCIMem(const InstTy *MI, uint64_t Address, unsigned OpNum, in printPCIMem()
/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86IntelInstPrinter.h52 printbytemem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printbytemem() argument
56 printwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printwordmem() argument
60 printdwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printdwordmem() argument
64 printqwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printqwordmem() argument
68 printxmmwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printxmmwordmem() argument
72 printymmwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printymmwordmem() argument
76 printzmmwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printzmmwordmem() argument
80 printtbytemem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printtbytemem() argument
86 printSrcIdx8(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx8() argument
90 printSrcIdx16(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx16() argument
94 printSrcIdx32(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx32() argument
98 printSrcIdx64(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx64() argument
102 printDstIdx8(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx8() argument
106 printDstIdx16(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx16() argument
110 printDstIdx32(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx32() argument
114 printDstIdx64(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx64() argument
118 printMemOffs8(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs8() argument
122 printMemOffs16(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs16() argument
126 printMemOffs32(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs32() argument
130 printMemOffs64(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs64() argument
[all...]
H A DX86ATTInstPrinter.h51 printbytemem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printbytemem() argument
54 printwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printwordmem() argument
57 printdwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printdwordmem() argument
60 printqwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printqwordmem() argument
63 printxmmwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printxmmwordmem() argument
66 printymmwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printymmwordmem() argument
69 printzmmwordmem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printzmmwordmem() argument
72 printtbytemem(const MCInst * MI,unsigned OpNo,raw_ostream & O) printtbytemem() argument
76 printSrcIdx8(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx8() argument
79 printSrcIdx16(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx16() argument
82 printSrcIdx32(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx32() argument
85 printSrcIdx64(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSrcIdx64() argument
88 printDstIdx8(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx8() argument
91 printDstIdx16(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx16() argument
94 printDstIdx32(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx32() argument
97 printDstIdx64(const MCInst * MI,unsigned OpNo,raw_ostream & O) printDstIdx64() argument
100 printMemOffs8(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs8() argument
103 printMemOffs16(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs16() argument
106 printMemOffs32(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs32() argument
109 printMemOffs64(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOffs64() argument
[all...]
H A DX86InstPrinterCommon.cpp29 void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op, in printCondCode() argument
59 printCondFlags(const MCInst * MI,unsigned Op,raw_ostream & O) printCondFlags() argument
80 printSSEAVXCC(const MCInst * MI,unsigned Op,raw_ostream & O) printSSEAVXCC() argument
120 printVPCOMMnemonic(const MCInst * MI,raw_ostream & OS) printVPCOMMnemonic() argument
150 printVPCMPMnemonic(const MCInst * MI,raw_ostream & OS) printVPCMPMnemonic() argument
237 printCMPMnemonic(const MCInst * MI,bool IsVCmp,raw_ostream & OS) printCMPMnemonic() argument
316 printRoundingControl(const MCInst * MI,unsigned Op,raw_ostream & O) printRoundingControl() argument
342 printPCRelImm(const MCInst * MI,uint64_t Address,unsigned OpNo,raw_ostream & O) printPCRelImm() argument
372 printOptionalSegReg(const MCInst * MI,unsigned OpNo,raw_ostream & O) printOptionalSegReg() argument
380 printInstFlags(const MCInst * MI,raw_ostream & O,const MCSubtargetInfo & STI) printInstFlags() argument
432 printVKPair(const MCInst * MI,unsigned OpNo,raw_ostream & OS) printVKPair() argument
[all...]
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h318 commuteOpcode(const MachineInstr & MI) commuteOpcode() argument
408 isSALU(const MachineInstr & MI) isSALU() argument
416 isVALU(const MachineInstr & MI) isVALU() argument
424 isImage(const MachineInstr & MI) isImage() argument
432 isVMEM(const MachineInstr & MI) isVMEM() argument
440 isSOP1(const MachineInstr & MI) isSOP1() argument
448 isSOP2(const MachineInstr & MI) isSOP2() argument
456 isSOPC(const MachineInstr & MI) isSOPC() argument
464 isSOPK(const MachineInstr & MI) isSOPK() argument
472 isSOPP(const MachineInstr & MI) isSOPP() argument
480 isPacked(const MachineInstr & MI) isPacked() argument
488 isVOP1(const MachineInstr & MI) isVOP1() argument
496 isVOP2(const MachineInstr & MI) isVOP2() argument
504 isVOP3(const MachineInstr & MI) isVOP3() argument
512 isSDWA(const MachineInstr & MI) isSDWA() argument
520 isVOPC(const MachineInstr & MI) isVOPC() argument
528 isMUBUF(const MachineInstr & MI) isMUBUF() argument
536 isMTBUF(const MachineInstr & MI) isMTBUF() argument
544 isSMRD(const MachineInstr & MI) isSMRD() argument
554 isDS(const MachineInstr & MI) isDS() argument
562 isLDSDMA(const MachineInstr & MI) isLDSDMA() argument
570 isGWS(const MachineInstr & MI) isGWS() argument
580 isMIMG(const MachineInstr & MI) isMIMG() argument
588 isVIMAGE(const MachineInstr & MI) isVIMAGE() argument
596 isVSAMPLE(const MachineInstr & MI) isVSAMPLE() argument
604 isGather4(const MachineInstr & MI) isGather4() argument
612 isFLAT(const MachineInstr & MI) isFLAT() argument
618 isSegmentSpecificFLAT(const MachineInstr & MI) isSegmentSpecificFLAT() argument
628 isFLATGlobal(const MachineInstr & MI) isFLATGlobal() argument
636 isFLATScratch(const MachineInstr & MI) isFLATScratch() argument
649 isEXP(const MachineInstr & MI) isEXP() argument
653 isDualSourceBlendEXP(const MachineInstr & MI) isDualSourceBlendEXP() argument
665 isAtomicNoRet(const MachineInstr & MI) isAtomicNoRet() argument
673 isAtomicRet(const MachineInstr & MI) isAtomicRet() argument
681 isAtomic(const MachineInstr & MI) isAtomic() argument
691 mayWriteLDSThroughDMA(const MachineInstr & MI) mayWriteLDSThroughDMA() argument
695 isWQM(const MachineInstr & MI) isWQM() argument
703 isDisableWQM(const MachineInstr & MI) isDisableWQM() argument
716 isVGPRSpill(const MachineInstr & MI) isVGPRSpill() argument
728 isSGPRSpill(const MachineInstr & MI) isSGPRSpill() argument
744 isSpill(const MachineInstr & MI) isSpill() argument
760 isDPP(const MachineInstr & MI) isDPP() argument
768 isTRANS(const MachineInstr & MI) isTRANS() argument
776 isVOP3P(const MachineInstr & MI) isVOP3P() argument
784 isVINTRP(const MachineInstr & MI) isVINTRP() argument
792 isMAI(const MachineInstr & MI) isMAI() argument
800 isMFMA(const MachineInstr & MI) isMFMA() argument
805 isDOT(const MachineInstr & MI) isDOT() argument
809 isWMMA(const MachineInstr & MI) isWMMA() argument
817 isMFMAorWMMA(const MachineInstr & MI) isMFMAorWMMA() argument
821 isSWMMAC(const MachineInstr & MI) isSWMMAC() argument
833 isLDSDIR(const MachineInstr & MI) isLDSDIR() argument
841 isVINTERP(const MachineInstr & MI) isVINTERP() argument
849 isScalarUnit(const MachineInstr & MI) isScalarUnit() argument
853 usesVM_CNT(const MachineInstr & MI) usesVM_CNT() argument
857 usesLGKM_CNT(const MachineInstr & MI) usesLGKM_CNT() argument
872 isScalarStore(const MachineInstr & MI) isScalarStore() argument
880 isFixedSize(const MachineInstr & MI) isFixedSize() argument
888 hasFPClamp(const MachineInstr & MI) hasFPClamp() argument
896 hasIntClamp(const MachineInstr & MI) hasIntClamp() argument
900 getClampMask(const MachineInstr & MI) getClampMask() argument
908 usesFPDPRounding(const MachineInstr & MI) usesFPDPRounding() argument
916 isFPAtomic(const MachineInstr & MI) isFPAtomic() argument
924 isNeverUniform(const MachineInstr & MI) isNeverUniform() argument
939 doesNotReadTiedSource(const MachineInstr & MI) doesNotReadTiedSource() argument
970 isVGPRCopy(const MachineInstr & MI) isVGPRCopy() argument
978 hasVGPRUses(const MachineInstr & MI) hasVGPRUses() argument
1016 isInlineConstant(const MachineInstr & MI,const MachineOperand & UseMO,const MachineOperand & DefMO) isInlineConstant() argument
1029 isInlineConstant(const MachineInstr & MI,unsigned OpIdx) isInlineConstant() argument
1034 isInlineConstant(const MachineInstr & MI,unsigned OpIdx,const MachineOperand & MO) isInlineConstant() argument
1119 getOpSize(const MachineInstr & MI,unsigned OpNo) getOpSize() argument
1227 getNamedOperand(const MachineInstr & MI,unsigned OpName) getNamedOperand() argument
1233 getNamedImmOperand(const MachineInstr & MI,unsigned OpName) getNamedImmOperand() argument
[all...]
/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DR600InstPrinter.cpp62 unsigned CT = MI argument
21 printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & O) printInst() argument
28 printAbs(const MCInst * MI,unsigned OpNo,raw_ostream & O) printAbs() argument
33 printBankSwizzle(const MCInst * MI,unsigned OpNo,raw_ostream & O) printBankSwizzle() argument
57 printClamp(const MCInst * MI,unsigned OpNo,raw_ostream & O) printClamp() argument
76 printKCache(const MCInst * MI,unsigned OpNo,raw_ostream & O) printKCache() argument
88 printLast(const MCInst * MI,unsigned OpNo,raw_ostream & O) printLast() argument
93 printLiteral(const MCInst * MI,unsigned OpNo,raw_ostream & O) printLiteral() argument
106 printNeg(const MCInst * MI,unsigned OpNo,raw_ostream & O) printNeg() argument
111 printOMOD(const MCInst * MI,unsigned OpNo,raw_ostream & O) printOMOD() argument
128 printMemOperand(const MCInst * MI,unsigned OpNo,raw_ostream & O) printMemOperand() argument
135 printOperand(const MCInst * MI,unsigned OpNo,raw_ostream & O) printOperand() argument
170 printRel(const MCInst * MI,unsigned OpNo,raw_ostream & O) printRel() argument
175 printRSel(const MCInst * MI,unsigned OpNo,raw_ostream & O) printRSel() argument
205 printUpdateExecMask(const MCInst * MI,unsigned OpNo,raw_ostream & O) printUpdateExecMask() argument
210 printUpdatePred(const MCInst * MI,unsigned OpNo,raw_ostream & O) printUpdatePred() argument
215 printWrite(const MCInst * MI,unsigned OpNo,raw_ostream & O) printWrite() argument
[all...]
H A DAMDGPUInstPrinter.cpp43 printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & OS) printInst() argument
50 printU4ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU4ImmOperand() argument
56 printU16ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU16ImmOperand() argument
74 printU4ImmDecOperand(const MCInst * MI,unsigned OpNo,raw_ostream & O) printU4ImmDecOperand() argument
79 printU8ImmDecOperand(const MCInst * MI,unsigned OpNo,raw_ostream & O) printU8ImmDecOperand() argument
84 printU16ImmDecOperand(const MCInst * MI,unsigned OpNo,raw_ostream & O) printU16ImmDecOperand() argument
89 printU32ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU32ImmOperand() argument
95 printNamedBit(const MCInst * MI,unsigned OpNo,raw_ostream & O,StringRef BitName) printNamedBit() argument
102 printOffset(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOffset() argument
119 printFlatOffset(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printFlatOffset() argument
138 printOffset0(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOffset0() argument
147 printOffset1(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOffset1() argument
156 printSMRDOffset8(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSMRDOffset8() argument
162 printSMEMOffset(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSMEMOffset() argument
168 printSMEMOffsetMod(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSMEMOffsetMod() argument
175 printSMRDLiteralOffset(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSMRDLiteralOffset() argument
181 printCPol(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printCPol() argument
209 printTH(const MCInst * MI,int64_t TH,int64_t Scope,raw_ostream & O) printTH() argument
292 printDMask(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDMask() argument
300 printDim(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDim() argument
312 printR128A16(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printR128A16() argument
320 printFORMAT(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printFORMAT() argument
325 printSymbolicFormat(const MCInst * MI,const MCSubtargetInfo & STI,raw_ostream & O) printSymbolicFormat() argument
385 printVOPDst(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printVOPDst() argument
446 printVINTRPDst(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printVINTRPDst() argument
679 printBLGP(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printBLGP() argument
701 printCBSZ(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printCBSZ() argument
711 printABID(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printABID() argument
734 printWaitVDST(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printWaitVDST() argument
741 printWaitVAVDst(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printWaitVAVDst() argument
748 printWaitVMVSrc(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printWaitVMVSrc() argument
755 printWaitEXP(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printWaitEXP() argument
772 printOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperand() argument
792 printRegularOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printRegularOperand() argument
967 printOperandAndFPInputMods(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperandAndFPInputMods() argument
1020 printOperandAndIntInputMods(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperandAndIntInputMods() argument
1049 printDPP8(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDPP8() argument
1063 printDPPCtrl(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDPPCtrl() argument
1157 printDppRowMask(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDppRowMask() argument
1164 printDppBankMask(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDppBankMask() argument
1171 printDppBoundCtrl(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDppBoundCtrl() argument
1180 printDppFI(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDppFI() argument
1189 printSDWASel(const MCInst * MI,unsigned OpNo,raw_ostream & O) printSDWASel() argument
1206 printSDWADstSel(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSDWADstSel() argument
1213 printSDWASrc0Sel(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSDWASrc0Sel() argument
1220 printSDWASrc1Sel(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSDWASrc1Sel() argument
1227 printSDWADstUnused(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSDWADstUnused() argument
1242 printExpSrcN(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O,unsigned N) printExpSrcN() argument
1261 printExpSrc0(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printExpSrc0() argument
1267 printExpSrc1(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printExpSrc1() argument
1273 printExpSrc2(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printExpSrc2() argument
1279 printExpSrc3(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printExpSrc3() argument
1285 printExpTgt(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printExpTgt() argument
1319 printPackedModifier(const MCInst * MI,StringRef Name,unsigned Mod,raw_ostream & O) printPackedModifier() argument
1385 printOpSel(const MCInst * MI,unsigned,const MCSubtargetInfo & STI,raw_ostream & O) printOpSel() argument
1412 printOpSelHi(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOpSelHi() argument
1418 printNegLo(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printNegLo() argument
1424 printNegHi(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printNegHi() argument
1430 printIndexKey8bit(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printIndexKey8bit() argument
1440 printIndexKey16bit(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printIndexKey16bit() argument
1450 printInterpSlot(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printInterpSlot() argument
1469 printInterpAttr(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printInterpAttr() argument
1476 printInterpAttrChan(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printInterpAttrChan() argument
1483 printGPRIdxMode(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printGPRIdxMode() argument
1506 printMemOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMemOperand() argument
1514 printIfSet(const MCInst * MI,unsigned OpNo,raw_ostream & O,StringRef Asm,StringRef Default) printIfSet() argument
1526 printIfSet(const MCInst * MI,unsigned OpNo,raw_ostream & O,char Asm) printIfSet() argument
1534 printOModSI(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOModSI() argument
1546 printSendMsg(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSendMsg() argument
1610 printSwizzle(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSwizzle() argument
1680 printSWaitCnt(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSWaitCnt() argument
1715 printDepCtr(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printDepCtr() argument
1742 printSDelayALU(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSDelayALU() argument
1785 printHwreg(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printHwreg() argument
1803 printEndpgm(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printEndpgm() argument
1814 printByteSel(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printByteSel() argument
[all...]
/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZInstPrinter.cpp
/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaInstPrinter.cpp70 void XtensaInstPrinter::printInst(const MCInst *MI, uint64_t Address, in printInst() argument
81 void XtensaInstPrinter::printOperand(const MCInst *MI, int OpNum, in printOperand() argument
86 void XtensaInstPrinter::printMemOperand(const MCInst *MI, int OpNum, in printMemOperand() argument
93 void XtensaInstPrinter::printBranchTarget(const MCInst *MI, int OpNum, in printBranchTarget() argument
108 printJumpTarget(const MCInst * MI,int OpNum,raw_ostream & OS) printJumpTarget() argument
124 printCallOperand(const MCInst * MI,int OpNum,raw_ostream & OS) printCallOperand() argument
139 printL32RTarget(const MCInst * MI,int OpNum,raw_ostream & O) printL32RTarget() argument
157 printImm8_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printImm8_AsmOperand() argument
169 printImm8_sh8_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printImm8_sh8_AsmOperand() argument
181 printImm12_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printImm12_AsmOperand() argument
192 printImm12m_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printImm12m_AsmOperand() argument
203 printUimm4_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printUimm4_AsmOperand() argument
213 printUimm5_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printUimm5_AsmOperand() argument
223 printShimm1_31_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printShimm1_31_AsmOperand() argument
234 printImm1_16_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printImm1_16_AsmOperand() argument
245 printOffset8m8_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printOffset8m8_AsmOperand() argument
256 printOffset8m16_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printOffset8m16_AsmOperand() argument
267 printOffset8m32_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printOffset8m32_AsmOperand() argument
279 printOffset4m32_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printOffset4m32_AsmOperand() argument
290 printB4const_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printB4const_AsmOperand() argument
321 printB4constu_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O) printB4constu_AsmOperand() argument
[all...]
/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiInstPrinter.cpp48 (MI->getOperand(2).getImm() == AddOffset || in usesGivenOffset() argument
38 printInst(const MCInst * MI,raw_ostream & OS,StringRef Alias,unsigned OpNo0,unsigned OpNo1) printInst() argument
55 isPreIncrementForm(const MCInst * MI,int AddOffset) isPreIncrementForm() argument
60 isPostIncrementForm(const MCInst * MI,int AddOffset) isPostIncrementForm() argument
65 decIncOperator(const MCInst * MI) decIncOperator() argument
71 printMemoryLoadIncrement(const MCInst * MI,raw_ostream & OS,StringRef Opcode,int AddOffset) printMemoryLoadIncrement() argument
90 printMemoryStoreIncrement(const MCInst * MI,raw_ostream & OS,StringRef Opcode,int AddOffset) printMemoryStoreIncrement() argument
109 printAlias(const MCInst * MI,raw_ostream & OS) printAlias() argument
140 printInst(const MCInst * MI,uint64_t Address,StringRef Annotation,const MCSubtargetInfo &,raw_ostream & OS) printInst() argument
149 printOperand(const MCInst * MI,unsigned OpNo,raw_ostream & OS,const char * Modifier) printOperand() argument
163 printMemImmOperand(const MCInst * MI,unsigned OpNo,raw_ostream & OS) printMemImmOperand() argument
177 printHi16ImmOperand(const MCInst * MI,unsigned OpNo,raw_ostream & OS) printHi16ImmOperand() argument
189 printHi16AndImmOperand(const MCInst * MI,unsigned OpNo,raw_ostream & OS) printHi16AndImmOperand() argument
201 printLo16AndImmOperand(const MCInst * MI,unsigned OpNo,raw_ostream & OS) printLo16AndImmOperand() argument
237 printMemRiOperand(const MCInst * MI,int OpNo,raw_ostream & OS,const char *) printMemRiOperand() argument
252 printMemRrOperand(const MCInst * MI,int OpNo,raw_ostream & OS,const char *) printMemRrOperand() argument
273 printMemSplsOperand(const MCInst * MI,int OpNo,raw_ostream & OS,const char *) printMemSplsOperand() argument
288 printCCOperand(const MCInst * MI,int OpNo,raw_ostream & OS) printCCOperand() argument
299 printPredicateOperand(const MCInst * MI,unsigned OpNo,raw_ostream & OS) printPredicateOperand() argument
[all...]
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h514 changeAddrMode_abs_io(const MachineInstr & MI) changeAddrMode_abs_io() argument
517 changeAddrMode_io_abs(const MachineInstr & MI) changeAddrMode_io_abs() argument
520 changeAddrMode_io_rr(const MachineInstr & MI) changeAddrMode_io_rr() argument
523 changeAddrMode_rr_io(const MachineInstr & MI) changeAddrMode_rr_io() argument
526 changeAddrMode_rr_ur(const MachineInstr & MI) changeAddrMode_rr_ur() argument
529 changeAddrMode_ur_rr(const MachineInstr & MI) changeAddrMode_ur_rr() argument
[all...]
/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp223 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
234 getLdStUImm12OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getLdStUImm12OpValue() argument
255 getAdrLabelOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAdrLabelOpValue() argument
281 getAddSubImmOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddSubImmOpValue() argument
318 getCondBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getCondBranchTargetOpValue() argument
339 getPAuthPCRelOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPAuthPCRelOpValue() argument
362 getLoadLiteralOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getLoadLiteralOpValue() argument
382 getMemExtendOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMemExtendOpValue() argument
391 getMoveWideImmOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMoveWideImmOpValue() argument
411 getTestBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getTestBranchTargetOpValue() argument
432 getBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getBranchTargetOpValue() argument
460 getVecShifterOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShifterOpValue() argument
485 getFixedPointScaleOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getFixedPointScaleOpValue() argument
493 getVecShiftR64OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftR64OpValue() argument
502 getVecShiftR32OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftR32OpValue() argument
511 getVecShiftR16OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftR16OpValue() argument
520 getVecShiftR8OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftR8OpValue() argument
529 getVecShiftL64OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftL64OpValue() argument
538 getVecShiftL32OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftL32OpValue() argument
547 getVecShiftL16OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftL16OpValue() argument
556 getVecShiftL8OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVecShiftL8OpValue() argument
566 EncodeRegAsMultipleOf(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const EncodeRegAsMultipleOf() argument
576 EncodePNR_p8to15(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const EncodePNR_p8to15() argument
584 EncodeZPR2StridedRegisterClass(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const EncodeZPR2StridedRegisterClass() argument
594 EncodeZPR4StridedRegisterClass(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const EncodeZPR4StridedRegisterClass() argument
604 EncodeMatrixTileListRegisterClass(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const EncodeMatrixTileListRegisterClass() argument
613 encodeMatrixIndexGPR32(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeMatrixIndexGPR32() argument
621 getImm8OptLsl(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImm8OptLsl() argument
639 getSVEIncDecImm(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSVEIncDecImm() argument
651 getMoveVecShifterOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMoveVecShifterOpValue() argument
661 fixMOVZ(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const fixMOVZ() argument
693 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
722 fixMulHigh(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const fixMulHigh() argument
732 fixLoadStoreExclusive(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const fixLoadStoreExclusive() argument
742 fixOneOperandFPComparison(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const fixOneOperandFPComparison() argument
[all...]
H A DAArch64InstPrinter.cpp75 printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & O) printInst() argument
784 printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & O) printInst() argument
847 printRangePrefetchAlias(const MCInst * MI,const MCSubtargetInfo & STI,raw_ostream & O,StringRef Annot) printRangePrefetchAlias() argument
897 printSysAlias(const MCInst * MI,const MCSubtargetInfo & STI,raw_ostream & O) printSysAlias() argument
1017 printSyspAlias(const MCInst * MI,const MCSubtargetInfo & STI,raw_ostream & O) printSyspAlias() argument
1078 printMatrix(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMatrix() argument
1109 printMatrixTileVector(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMatrixTileVector() argument
1122 printMatrixTile(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMatrixTile() argument
1130 printSVCROp(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSVCROp() argument
1141 printOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperand() argument
1156 printImm(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printImm() argument
1163 printImmHex(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printImmHex() argument
1171 printSImm(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSImm() argument
1183 printPostIncOperand(const MCInst * MI,unsigned OpNo,unsigned Imm,raw_ostream & O) printPostIncOperand() argument
1196 printVRegOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printVRegOperand() argument
1205 printSysCROperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSysCROperand() argument
1213 printAddSubImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddSubImm() argument
1236 printLogicalImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printLogicalImm() argument
1245 printShifter(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printShifter() argument
1258 printShiftedRegister(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printShiftedRegister() argument
1265 printExtendedRegister(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printExtendedRegister() argument
1272 printArithExtend(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printArithExtend() argument
1319 printMemExtend(const MCInst * MI,unsigned OpNum,raw_ostream & O,char SrcRegKind,unsigned Width) printMemExtend() argument
1328 printRegWithShiftExtend(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printRegWithShiftExtend() argument
1346 printPredicateAsCounter(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPredicateAsCounter() argument
1375 printCondCode(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printCondCode() argument
1382 printInverseCondCode(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printInverseCondCode() argument
1389 printAMNoIndex(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAMNoIndex() argument
1398 printImmScale(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printImmScale() argument
1406 printImmRangeScale(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printImmRangeScale() argument
1414 printUImm12Offset(const MCInst * MI,unsigned OpNum,unsigned Scale,raw_ostream & O) printUImm12Offset() argument
1425 printAMIndexedWB(const MCInst * MI,unsigned OpNum,unsigned Scale,raw_ostream & O) printAMIndexedWB() argument
1441 printRPRFMOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printRPRFMOperand() argument
1454 printPrefetchOp(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPrefetchOp() argument
1474 printPSBHintOp(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPSBHintOp() argument
1485 printBTIHintOp(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printBTIHintOp() argument
1496 printFPImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printFPImmOperand() argument
1605 printGPRSeqPairsClassOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printGPRSeqPairsClassOperand() argument
1623 printMatrixTileList(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMatrixTileList() argument
1648 printVectorList(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O,StringRef LayoutSuffix) printVectorList() argument
1732 printImplicitlyTypedVectorList(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printImplicitlyTypedVectorList() argument
1740 printTypedVectorList(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printTypedVectorList() argument
1757 printVectorIndex(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorIndex() argument
1764 printMatrixIndex(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMatrixIndex() argument
1770 printAlignedLabel(const MCInst * MI,uint64_t Address,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAlignedLabel() argument
1799 printAdrAdrpLabel(const MCInst * MI,uint64_t Address,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAdrAdrpLabel() argument
1825 printBarrierOption(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printBarrierOption() argument
1848 printBarriernXSOption(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printBarriernXSOption() argument
1886 printMRSSystemRegister(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMRSSystemRegister() argument
1913 printMSRSystemRegister(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMSRSystemRegister() argument
1940 printSystemPStateField(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSystemPStateField() argument
1955 printSIMDType10Operand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printSIMDType10Operand() argument
1964 printComplexRotationOp(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printComplexRotationOp() argument
1971 printSVEPattern(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSVEPattern() argument
1981 printSVEVecLenSpecifier(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSVEVecLenSpecifier() argument
1997 printSVERegOp(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSVERegOp() argument
2036 printImm8OptLsl(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printImm8OptLsl() argument
2061 printSVELogicalImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSVELogicalImm() argument
2080 printZPRasFPR(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printZPRasFPR() argument
2098 printExactFPImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printExactFPImm() argument
2108 printGPR64as32(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printGPR64as32() argument
2115 printGPR64x8(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printGPR64x8() argument
2122 printSyspXzrPair(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSyspXzrPair() argument
[all...]
/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp88 printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & O) printInst() argument
341 printOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperand() argument
381 printOperand(const MCInst * MI,uint64_t Address,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printOperand() argument
395 printThumbLdrLabelOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printThumbLdrLabelOperand() argument
426 printSORegRegOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSORegRegOperand() argument
446 printSORegImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSORegImmOperand() argument
463 printAM2PreOrOffsetIndexOp(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printAM2PreOrOffsetIndexOp() argument
494 printAddrModeTBB(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printAddrModeTBB() argument
508 printAddrModeTBH(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printAddrModeTBH() argument
523 printAddrMode2Operand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode2Operand() argument
542 printAddrMode2OffsetOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode2OffsetOperand() argument
568 printAM3PreOrOffsetIndexOp(const MCInst * MI,unsigned Op,raw_ostream & O,bool AlwaysPrintImm0) printAM3PreOrOffsetIndexOp() argument
598 printAddrMode3Operand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode3Operand() argument
613 printAddrMode3OffsetOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode3OffsetOperand() argument
632 printPostIdxImm8Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPostIdxImm8Operand() argument
641 printPostIdxRegOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPostIdxRegOperand() argument
651 printPostIdxImm8s4Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPostIdxImm8s4Operand() argument
661 printMveAddrModeRQOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMveAddrModeRQOperand() argument
679 printLdStmModeOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printLdStmModeOperand() argument
688 printAddrMode5Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode5Operand() argument
714 printAddrMode5FP16Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode5FP16Operand() argument
740 printAddrMode6Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode6Operand() argument
755 printAddrMode7Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode7Operand() argument
765 printAddrMode6OffsetOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrMode6OffsetOperand() argument
778 printBitfieldInvMaskImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printBitfieldInvMaskImmOperand() argument
792 printMemBOption(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMemBOption() argument
799 printInstSyncBOption(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printInstSyncBOption() argument
806 printTraceSyncBOption(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printTraceSyncBOption() argument
813 printShiftImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printShiftImmOperand() argument
828 printPKHLSLShiftImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPKHLSLShiftImm() argument
839 printPKHASRShiftImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPKHASRShiftImm() argument
851 printRegisterList(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printRegisterList() argument
871 printGPRPairOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printGPRPairOperand() argument
880 printSetendOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSetendOperand() argument
890 printCPSIMod(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printCPSIMod() argument
896 printCPSIFlag(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printCPSIFlag() argument
908 printMSRMaskOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMSRMaskOperand() argument
990 printBankedRegOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printBankedRegOperand() argument
1004 printPredicateOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPredicateOperand() argument
1016 printMandatoryRestrictedPredicateOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMandatoryRestrictedPredicateOperand() argument
1024 printMandatoryPredicateOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMandatoryPredicateOperand() argument
1032 printMandatoryInvertedPredicateOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMandatoryInvertedPredicateOperand() argument
1040 printSBitModifierOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printSBitModifierOperand() argument
1050 printNoHashImmediate(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printNoHashImmediate() argument
1056 printPImmediate(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPImmediate() argument
1062 printCImmediate(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printCImmediate() argument
1068 printCoprocOptionImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printCoprocOptionImm() argument
1074 printPCLabel(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printPCLabel() argument
1080 printAdrLabelOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAdrLabelOperand() argument
1101 printThumbS4ImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printThumbS4ImmOperand() argument
1108 printThumbSRImm(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printThumbSRImm() argument
1115 printThumbITMask(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printThumbITMask() argument
1130 printThumbAddrModeRROperand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printThumbAddrModeRROperand() argument
1151 printThumbAddrModeImm5SOperand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O,unsigned Scale) printThumbAddrModeImm5SOperand() argument
1174 printThumbAddrModeImm5S1Operand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printThumbAddrModeImm5S1Operand() argument
1181 printThumbAddrModeImm5S2Operand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printThumbAddrModeImm5S2Operand() argument
1188 printThumbAddrModeImm5S4Operand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printThumbAddrModeImm5S4Operand() argument
1195 printThumbAddrModeSPOperand(const MCInst * MI,unsigned Op,const MCSubtargetInfo & STI,raw_ostream & O) printThumbAddrModeSPOperand() argument
1205 printT2SOOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2SOOperand() argument
1221 printAddrModeImm12Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printAddrModeImm12Operand() argument
1252 printT2AddrModeImm8Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2AddrModeImm8Operand() argument
1279 printT2AddrModeImm8s4Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2AddrModeImm8s4Operand() argument
1314 printT2AddrModeImm0_1020s4Operand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2AddrModeImm0_1020s4Operand() argument
1330 printT2AddrModeImm8OffsetOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2AddrModeImm8OffsetOperand() argument
1345 printT2AddrModeImm8s4OffsetOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2AddrModeImm8s4OffsetOperand() argument
1362 printT2AddrModeSoRegOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printT2AddrModeSoRegOperand() argument
1387 printFPImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printFPImmOperand() argument
1394 printVMOVModImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVMOVModImmOperand() argument
1406 printImmPlusOneOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printImmPlusOneOperand() argument
1413 printRotImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printRotImmOperand() argument
1424 printModImmOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printModImmOperand() argument
1466 printFBits16(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printFBits16() argument
1471 printFBits32(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printFBits32() argument
1476 printVectorIndex(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorIndex() argument
1482 printVectorListOne(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListOne() argument
1490 printVectorListTwo(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListTwo() argument
1503 printVectorListTwoSpaced(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListTwoSpaced() argument
1516 printVectorListThree(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListThree() argument
1531 printVectorListFour(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListFour() argument
1548 printVectorListOneAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListOneAllLanes() argument
1557 printVectorListTwoAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListTwoAllLanes() argument
1571 printVectorListThreeAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListThreeAllLanes() argument
1587 printVectorListFourAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListFourAllLanes() argument
1606 printVectorListTwoSpacedAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListTwoSpacedAllLanes() argument
1619 printVectorListThreeSpacedAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListThreeSpacedAllLanes() argument
1634 printVectorListFourSpacedAllLanes(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListFourSpacedAllLanes() argument
1650 printVectorListThreeSpaced(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListThreeSpaced() argument
1666 printVectorListFourSpaced(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVectorListFourSpaced() argument
1684 printMVEVectorList(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMVEVectorList() argument
1698 printComplexRotationOp(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printComplexRotationOp() argument
1705 printVPTPredicateOperand(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVPTPredicateOperand() argument
1713 printVPTMask(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printVPTMask() argument
1729 printMveSaturateOp(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O) printMveSaturateOp() argument
[all...]
H A DARMMCCodeEmitter.cpp233 getLdStmModeOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getLdStmModeOpValue() argument
308 getCCOutOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getCCOutOpValue() argument
316 getModImmOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & ST) const getModImmOpValue() argument
335 getT2SOImmOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2SOImmOpValue() argument
376 getNEONVcvtImm32OpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getNEONVcvtImm32OpValue() argument
470 NEONThumb2DataIPostEncoder(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const NEONThumb2DataIPostEncoder() argument
490 NEONThumb2LoadStorePostEncoder(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const NEONThumb2LoadStorePostEncoder() argument
504 NEONThumb2DupPostEncoder(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const NEONThumb2DupPostEncoder() argument
517 NEONThumb2V8PostEncoder(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const NEONThumb2V8PostEncoder() argument
530 VFPThumb2PostEncoder(const MCInst & MI,unsigned EncodedValue,const MCSubtargetInfo & STI) const VFPThumb2PostEncoder() argument
542 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
581 EncodeAddrModeOpValues(const MCInst & MI,unsigned OpIdx,unsigned & Reg,unsigned & Imm,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const EncodeAddrModeOpValues() argument
610 getBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,unsigned FixupKind,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) getBranchTargetOpValue() argument
648 getThumbBLTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbBLTargetOpValue() argument
661 getThumbBLXTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbBLXTargetOpValue() argument
673 getThumbBRTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbBRTargetOpValue() argument
685 getThumbBCCTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbBCCTargetOpValue() argument
697 getThumbCBTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbCBTargetOpValue() argument
707 HasConditionalBranch(const MCInst & MI) HasConditionalBranch() argument
726 getBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getBranchTargetOpValue() argument
740 getARMBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getARMBranchTargetOpValue() argument
756 getARMBLTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getARMBLTargetOpValue() argument
771 getARMBLXTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getARMBLXTargetOpValue() argument
784 getThumbBranchTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbBranchTargetOpValue() argument
813 getAdrLabelOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAdrLabelOpValue() argument
854 getT2AdrLabelOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AdrLabelOpValue() argument
874 getITMaskOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getITMaskOpValue() argument
901 getThumbAdrLabelOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getThumbAdrLabelOpValue() argument
914 getThumbAddrModeRegRegOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> &,const MCSubtargetInfo & STI) const getThumbAddrModeRegRegOpValue() argument
930 getMVEShiftImmOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMVEShiftImmOpValue() argument
964 getAddrModeImm12OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrModeImm12OpValue() argument
1019 getT2ScaledImmOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2ScaledImmOpValue() argument
1050 getMveAddrModeRQOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMveAddrModeRQOpValue() argument
1070 getMveAddrModeQOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMveAddrModeQOpValue() argument
1101 getT2AddrModeImm8s4OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AddrModeImm8s4OpValue() argument
1143 getT2AddrModeImm7s4OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AddrModeImm7s4OpValue() argument
1170 getT2AddrModeImm0_1020s4OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AddrModeImm0_1020s4OpValue() argument
1182 getHiLoImmOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getHiLoImmOpValue() argument
1270 getLdStSORegOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getLdStSORegOpValue() argument
1304 getAddrMode2OffsetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode2OffsetOpValue() argument
1327 getPostIdxRegOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPostIdxRegOpValue() argument
1339 getAddrMode3OffsetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode3OffsetOpValue() argument
1359 getAddrMode3OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode3OpValue() argument
1396 getAddrModeThumbSPOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrModeThumbSPOpValue() argument
1412 getAddrModeISOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrModeISOpValue() argument
1427 getAddrModePCOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrModePCOpValue() argument
1438 getAddrMode5OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode5OpValue() argument
1478 getAddrMode5FP16OpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode5FP16OpValue() argument
1517 getSORegRegOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSORegRegOpValue() argument
1565 getSORegImmOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSORegImmOpValue() argument
1612 getT2AddrModeSORegOpValue(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AddrModeSORegOpValue() argument
1632 getT2AddrModeImmOpValue(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AddrModeImmOpValue() argument
1657 getT2AddrModeImm8OffsetOpValue(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2AddrModeImm8OffsetOpValue() argument
1674 getT2SORegOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getT2SORegOpValue() argument
1717 getBitfieldInvertedMaskOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getBitfieldInvertedMaskOpValue() argument
1731 getRegisterListOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getRegisterListOpValue() argument
1778 getAddrMode6AddressOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode6AddressOpValue() argument
1802 getAddrMode6OneLane32AddressOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode6OneLane32AddressOpValue() argument
1829 getAddrMode6DupAddressOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode6DupAddressOpValue() argument
1850 getAddrMode6OffsetOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAddrMode6OffsetOpValue() argument
1859 getShiftRight8Imm(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getShiftRight8Imm() argument
1866 getShiftRight16Imm(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getShiftRight16Imm() argument
1873 getShiftRight32Imm(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getShiftRight32Imm() argument
1880 getShiftRight64Imm(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getShiftRight64Imm() argument
1886 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
1920 getBFTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getBFTargetOpValue() argument
1930 getBFAfterTargetOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getBFAfterTargetOpValue() argument
1952 getVPTMaskOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVPTMaskOpValue() argument
1984 getRestrictedCondCodeOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getRestrictedCondCodeOpValue() argument
2012 getPowerTwoOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPowerTwoOpValue() argument
2022 getMVEPairVectorIndexOpValue(const MCInst & MI,unsigned OpIdx,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMVEPairVectorIndexOpValue() argument
[all...]
/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsInstPrinter.cpp32 assert(MI.getOperand(OpNo).isReg() && "Register operand expected."); in isReg() argument
80 printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & O) printInst() argument
128 printOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperand() argument
145 printJumpOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printJumpOperand() argument
158 printBranchOperand(const MCInst * MI,uint64_t Address,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printBranchOperand() argument
179 printUImm(const MCInst * MI,int opNum,const MCSubtargetInfo & STI,raw_ostream & O) printUImm() argument
194 printMemOperand(const MCInst * MI,int opNum,const MCSubtargetInfo & STI,raw_ostream & O) printMemOperand() argument
223 printMemOperandEA(const MCInst * MI,int opNum,const MCSubtargetInfo & STI,raw_ostream & O) printMemOperandEA() argument
233 printFCCOperand(const MCInst * MI,int opNum,const MCSubtargetInfo &,raw_ostream & O) printFCCOperand() argument
241 printSHFMask(const MCInst * MI,int opNum,raw_ostream & O) printSHFMask() argument
245 printAlias(const char * Str,const MCInst & MI,uint64_t Address,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & OS,bool IsBranch) printAlias() argument
257 printAlias(const char * Str,const MCInst & MI,uint64_t Address,unsigned OpNo0,unsigned OpNo1,const MCSubtargetInfo & STI,raw_ostream & OS,bool IsBranch) printAlias() argument
270 printAlias(const MCInst & MI,uint64_t Address,const MCSubtargetInfo & STI,raw_ostream & OS) printAlias() argument
341 printSaveRestore(const MCInst * MI,const MCSubtargetInfo & STI,raw_ostream & O) printSaveRestore() argument
353 printRegisterList(const MCInst * MI,int opNum,const MCSubtargetInfo &,raw_ostream & O) printRegisterList() argument
[all...]
H A DMipsMCCodeEmitter.cpp133 void MipsMCCodeEmitter::encodeInstruction(const MCInst &MI, in encodeInstruction()
225 getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValue()
247 getBranchTargetOpValue1SImm16(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValue1SImm16()
269 getBranchTargetOpValueMMR6(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMMR6()
292 getBranchTargetOpValueLsl2MMR6(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueLsl2MMR6()
315 getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTarget7OpValueMM()
336 getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMMPC10()
357 getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMM()
379 getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo, in getBranchTarget21OpValue()
401 getBranchTarget21OpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTarget21OpValueMM()
[all …]
/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp44 getDirectBrEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDirectBrEncoding() argument
154 getCondBrEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getCondBrEncoding() argument
167 getAbsDirectBrEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAbsDirectBrEncoding() argument
180 getAbsCondBrEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAbsCondBrEncoding() argument
193 getVSRpEvenEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVSRpEvenEncoding() argument
202 getImm16Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImm16Encoding() argument
214 getImm34Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI,MCFixupKind Fixup) const getImm34Encoding() argument
229 getImm34EncodingNoPCRel(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImm34EncodingNoPCRel() argument
237 getImm34EncodingPCRel(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImm34EncodingPCRel() argument
244 getDispRIEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispRIEncoding() argument
258 getDispRIXEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispRIXEncoding() argument
272 getDispRIX16Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispRIX16Encoding() argument
289 getDispRIHashEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispRIHashEncoding() argument
304 getDispRI34PCRelEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispRI34PCRelEncoding() argument
387 getDispRI34Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispRI34Encoding() argument
396 getDispSPE8Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispSPE8Encoding() argument
406 getDispSPE4Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispSPE4Encoding() argument
416 getDispSPE2Encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getDispSPE2Encoding() argument
425 getTLSRegEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getTLSRegEncoding() argument
445 getTLSCallEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getTLSCallEncoding() argument
458 get_crbitm_encoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const get_crbitm_encoding() argument
472 getOpIdxForMO(const MCInst & MI,const MCOperand & MO) getOpIdxForMO() argument
483 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
503 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
[all...]
H A DPPCInstPrinter.cpp55 void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address, in printInst() argument
218 printPredicateOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O,const char * Modifier) printPredicateOperand() argument
316 printATBitsAsHint(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printATBitsAsHint() argument
326 printU1ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU1ImmOperand() argument
334 printU2ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU2ImmOperand() argument
342 printU3ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU3ImmOperand() argument
350 printU4ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU4ImmOperand() argument
358 printS5ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printS5ImmOperand() argument
366 printImmZeroOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printImmZeroOperand() argument
374 printU5ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU5ImmOperand() argument
382 printU6ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU6ImmOperand() argument
390 printU7ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU7ImmOperand() argument
401 printU8ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU8ImmOperand() argument
408 printU10ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU10ImmOperand() argument
416 printU12ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU12ImmOperand() argument
424 printS16ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printS16ImmOperand() argument
433 printS34ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printS34ImmOperand() argument
445 printU16ImmOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printU16ImmOperand() argument
454 printBranchOperand(const MCInst * MI,uint64_t Address,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printBranchOperand() argument
481 printAbsBranchOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printAbsBranchOperand() argument
493 printcrbitm(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printcrbitm() argument
511 printMemRegImm(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMemRegImm() argument
523 printMemRegImmHash(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMemRegImmHash() argument
532 printMemRegImm34PCRel(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMemRegImm34PCRel() argument
541 printMemRegImm34(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMemRegImm34() argument
550 printMemRegReg(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printMemRegReg() argument
564 printTLSCall(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printTLSCall() argument
647 printOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O) printOperand() argument
[all...]
/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchAsmPrinter.cpp57 LowerPATCHABLE_FUNCTION_ENTER(*MI); in PrintAsmOperand() argument
32 emitInstruction(const MachineInstr * MI) emitInstruction() argument
113 PrintAsmMemoryOperand(const MachineInstr * MI,unsigned OpNo,const char * ExtraCode,raw_ostream & OS) PrintAsmMemoryOperand() argument
142 LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr & MI) LowerPATCHABLE_FUNCTION_ENTER() argument
157 LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr & MI) LowerPATCHABLE_FUNCTION_EXIT() argument
161 LowerPATCHABLE_TAIL_CALL(const MachineInstr & MI) LowerPATCHABLE_TAIL_CALL() argument
165 emitSled(const MachineInstr & MI,SledKind Kind) emitSled() argument
[all...]
/llvm-project/llvm/lib/CodeGen/
H A DMachineConvergenceVerifier.cpp21 switch (MI.getOpcode()) { in getConvOp() argument
36 Check(!MI.hasImplicitDef(), in checkConvergenceTokenProduced() argument
50 findAndCheckConvergenceTokenUsed(const MachineInstr & MI) findAndCheckConvergenceTokenUsed() argument
88 isInsideConvergentFunction(const MachineInstr & MI) isInsideConvergentFunction() argument
96 isConvergent(const MachineInstr & MI) isConvergent() argument
[all...]
/llvm-project/llvm/lib/Target/ARM/
H A DMVETailPredUtils.h58 static inline bool isVCTP(const MachineInstr *MI) { in isVCTP()
71 static inline bool isDoLoopStart(const MachineInstr &MI) { in isDoLoopStart()
76 static inline bool isWhileLoopStart(const MachineInstr &MI) { in isWhileLoopStart()
82 static inline bool isLoopStart(const MachineInstr &MI) { in isLoopStart()
87 inline MachineBasicBlock *getWhileLoopStartTargetBB(const MachineInstr &MI) { in getWhileLoopStartTargetBB()
135 inline void RevertDoLoopStart(MachineInstr *MI, const TargetInstrInfo *TII) { in RevertDoLoopStart()

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