Lines Matching defs:MI
42 void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
45 printInstruction(MI, Address, STI, OS);
49 void AMDGPUInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
52 const MCOperand &Op = MI->getOperand(OpNo);
64 printU32ImmOperand(MI, OpNo, STI, O);
67 void AMDGPUInstPrinter::printU16ImmDecOperand(const MCInst *MI, unsigned OpNo,
69 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff);
72 void AMDGPUInstPrinter::printU32ImmOperand(const MCInst *MI, unsigned OpNo,
75 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff);
78 void AMDGPUInstPrinter::printNamedBit(const MCInst *MI, unsigned OpNo,
80 if (MI->getOperand(OpNo).getImm()) {
85 void AMDGPUInstPrinter::printOffset(const MCInst *MI, unsigned OpNo,
88 uint32_t Imm = MI->getOperand(OpNo).getImm();
93 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
98 printU16ImmDecOperand(MI, OpNo, O);
102 void AMDGPUInstPrinter::printFlatOffset(const MCInst *MI, unsigned OpNo,
105 uint32_t Imm = MI->getOperand(OpNo).getImm();
109 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
117 printU16ImmDecOperand(MI, OpNo, O);
121 void AMDGPUInstPrinter::printSMRDOffset8(const MCInst *MI, unsigned OpNo,
124 printU32ImmOperand(MI, OpNo, STI, O);
127 void AMDGPUInstPrinter::printSMEMOffset(const MCInst *MI, unsigned OpNo,
130 O << formatHex(MI->getOperand(OpNo).getImm());
133 void AMDGPUInstPrinter::printSMRDLiteralOffset(const MCInst *MI, unsigned OpNo,
136 printU32ImmOperand(MI, OpNo, STI, O);
139 void AMDGPUInstPrinter::printCPol(const MCInst *MI, unsigned OpNo,
141 auto Imm = MI->getOperand(OpNo).getImm();
147 printTH(MI, TH, Scope, O);
155 !(MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::SMRD)) ? " sc0"
167 void AMDGPUInstPrinter::printTH(const MCInst *MI, int64_t TH, int64_t Scope,
173 const unsigned Opcode = MI->getOpcode();
248 void AMDGPUInstPrinter::printDim(const MCInst *MI, unsigned OpNo,
250 unsigned Dim = MI->getOperand(OpNo).getImm();
260 void AMDGPUInstPrinter::printR128A16(const MCInst *MI, unsigned OpNo,
263 printNamedBit(MI, OpNo, O, "a16");
265 printNamedBit(MI, OpNo, O, "r128");
268 void AMDGPUInstPrinter::printFORMAT(const MCInst *MI, unsigned OpNo,
273 void AMDGPUInstPrinter::printSymbolicFormat(const MCInst *MI,
279 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::format);
282 unsigned Val = MI->getOperand(OpNo).getImm();
331 void AMDGPUInstPrinter::printVOPDst(const MCInst *MI, unsigned OpNo,
333 auto Opcode = MI->getOpcode();
351 printRegularOperand(MI, OpNo, STI, O);
392 void AMDGPUInstPrinter::printVINTRPDst(const MCInst *MI, unsigned OpNo,
399 printRegularOperand(MI, OpNo, STI, O);
625 void AMDGPUInstPrinter::printBLGP(const MCInst *MI, unsigned OpNo,
628 unsigned Imm = MI->getOperand(OpNo).getImm();
633 switch (MI->getOpcode()) {
670 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
673 unsigned Opc = MI->getOpcode();
686 printRegularOperand(MI, OpNo, STI, O);
690 void AMDGPUInstPrinter::printRegularOperand(const MCInst *MI, unsigned OpNo,
693 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
695 if (OpNo >= MI->getNumOperands()) {
700 const MCOperand &Op = MI->getOperand(OpNo);
792 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
810 switch (MI->getOpcode()) {
850 if ((int)OpNo == AMDGPU::getNamedOperandIdx(MI->getOpcode(),
858 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::soffset);
861 printSymbolicFormat(MI, STI, O);
865 void AMDGPUInstPrinter::printOperandAndFPInputMods(const MCInst *MI,
869 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
873 unsigned InputModifiers = MI->getOperand(OpNo).getImm();
881 if (OpNo + 1 < MI->getNumOperands() &&
883 const MCOperand &Op = MI->getOperand(OpNo + 1);
895 printRegularOperand(MI, OpNo + 1, STI, O);
904 switch (MI->getOpcode()) {
912 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::src1))
918 void AMDGPUInstPrinter::printOperandAndIntInputMods(const MCInst *MI,
922 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
926 unsigned InputModifiers = MI->getOperand(OpNo).getImm();
929 printRegularOperand(MI, OpNo + 1, STI, O);
934 switch (MI->getOpcode()) {
940 if ((int)OpNo + 1 == AMDGPU::getNamedOperandIdx(MI->getOpcode(),
947 void AMDGPUInstPrinter::printDPP8(const MCInst *MI, unsigned OpNo,
953 unsigned Imm = MI->getOperand(OpNo).getImm();
961 void AMDGPUInstPrinter::printDPPCtrl(const MCInst *MI, unsigned OpNo,
966 unsigned Imm = MI->getOperand(OpNo).getImm();
967 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
1052 void AMDGPUInstPrinter::printDppBoundCtrl(const MCInst *MI, unsigned OpNo,
1055 unsigned Imm = MI->getOperand(OpNo).getImm();
1061 void AMDGPUInstPrinter::printDppFI(const MCInst *MI, unsigned OpNo,
1064 unsigned Imm = MI->getOperand(OpNo).getImm();
1070 void AMDGPUInstPrinter::printSDWASel(const MCInst *MI, unsigned OpNo,
1074 unsigned Imm = MI->getOperand(OpNo).getImm();
1087 void AMDGPUInstPrinter::printSDWADstSel(const MCInst *MI, unsigned OpNo,
1091 printSDWASel(MI, OpNo, O);
1094 void AMDGPUInstPrinter::printSDWASrc0Sel(const MCInst *MI, unsigned OpNo,
1098 printSDWASel(MI, OpNo, O);
1101 void AMDGPUInstPrinter::printSDWASrc1Sel(const MCInst *MI, unsigned OpNo,
1105 printSDWASel(MI, OpNo, O);
1108 void AMDGPUInstPrinter::printSDWADstUnused(const MCInst *MI, unsigned OpNo,
1114 unsigned Imm = MI->getOperand(OpNo).getImm();
1123 void AMDGPUInstPrinter::printExpSrcN(const MCInst *MI, unsigned OpNo,
1126 unsigned Opc = MI->getOpcode();
1128 unsigned En = MI->getOperand(EnIdx).getImm();
1133 if (MI->getOperand(ComprIdx).getImm())
1137 printRegOperand(MI->getOperand(OpNo).getReg(), O, MRI);
1142 void AMDGPUInstPrinter::printExpSrc0(const MCInst *MI, unsigned OpNo,
1145 printExpSrcN(MI, OpNo, STI, O, 0);
1148 void AMDGPUInstPrinter::printExpSrc1(const MCInst *MI, unsigned OpNo,
1151 printExpSrcN(MI, OpNo, STI, O, 1);
1154 void AMDGPUInstPrinter::printExpSrc2(const MCInst *MI, unsigned OpNo,
1157 printExpSrcN(MI, OpNo, STI, O, 2);
1160 void AMDGPUInstPrinter::printExpSrc3(const MCInst *MI, unsigned OpNo,
1163 printExpSrcN(MI, OpNo, STI, O, 3);
1166 void AMDGPUInstPrinter::printExpTgt(const MCInst *MI, unsigned OpNo,
1172 unsigned Id = MI->getOperand(OpNo).getImm() & ((1 << 6) - 1);
1200 void AMDGPUInstPrinter::printPackedModifier(const MCInst *MI,
1204 unsigned Opc = MI->getOpcode();
1220 (ModIdx != -1) ? MI->getOperand(ModIdx).getImm() : DefaultValue;
1225 if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::IsSWMMAC ||
1226 MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::IsWMMA) {
1234 Ops[NumOps++] = MI->getOperand(Idx).getImm();
1243 MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::VOP3_OPSEL;
1246 MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::IsPacked;
1266 void AMDGPUInstPrinter::printOpSel(const MCInst *MI, unsigned,
1269 unsigned Opc = MI->getOpcode();
1273 unsigned Mod = MI->getOperand(SrcMod).getImm();
1283 unsigned FI = !!(MI->getOperand(FIN).getImm() & SISrcMods::OP_SEL_0);
1284 unsigned BC = !!(MI->getOperand(BCN).getImm() & SISrcMods::OP_SEL_0);
1290 printPackedModifier(MI, " op_sel:[", SISrcMods::OP_SEL_0, O);
1293 void AMDGPUInstPrinter::printOpSelHi(const MCInst *MI, unsigned OpNo,
1296 printPackedModifier(MI, " op_sel_hi:[", SISrcMods::OP_SEL_1, O);
1299 void AMDGPUInstPrinter::printNegLo(const MCInst *MI, unsigned OpNo,
1302 printPackedModifier(MI, " neg_lo:[", SISrcMods::NEG, O);
1305 void AMDGPUInstPrinter::printNegHi(const MCInst *MI, unsigned OpNo,
1308 printPackedModifier(MI, " neg_hi:[", SISrcMods::NEG_HI, O);
1311 void AMDGPUInstPrinter::printIndexKey8bit(const MCInst *MI, unsigned OpNo,
1314 auto Imm = MI->getOperand(OpNo).getImm() & 0x7;
1321 void AMDGPUInstPrinter::printIndexKey16bit(const MCInst *MI, unsigned OpNo,
1324 auto Imm = MI->getOperand(OpNo).getImm() & 0x7;
1331 void AMDGPUInstPrinter::printInterpSlot(const MCInst *MI, unsigned OpNum,
1334 unsigned Imm = MI->getOperand(OpNum).getImm();
1350 void AMDGPUInstPrinter::printInterpAttr(const MCInst *MI, unsigned OpNum,
1353 unsigned Attr = MI->getOperand(OpNum).getImm();
1357 void AMDGPUInstPrinter::printInterpAttrChan(const MCInst *MI, unsigned OpNum,
1360 unsigned Chan = MI->getOperand(OpNum).getImm();
1364 void AMDGPUInstPrinter::printGPRIdxMode(const MCInst *MI, unsigned OpNo,
1368 unsigned Val = MI->getOperand(OpNo).getImm();
1387 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo,
1390 printRegularOperand(MI, OpNo, STI, O);
1392 printRegularOperand(MI, OpNo + 1, STI, O);
1395 void AMDGPUInstPrinter::printIfSet(const MCInst *MI, unsigned OpNo,
1398 const MCOperand &Op = MI->getOperand(OpNo);
1407 void AMDGPUInstPrinter::printIfSet(const MCInst *MI, unsigned OpNo,
1409 const MCOperand &Op = MI->getOperand(OpNo);
1415 void AMDGPUInstPrinter::printOModSI(const MCInst *MI, unsigned OpNo,
1418 int Imm = MI->getOperand(OpNo).getImm();
1427 void AMDGPUInstPrinter::printSendMsg(const MCInst *MI, unsigned OpNo,
1432 const unsigned Imm16 = MI->getOperand(OpNo).getImm();
1491 void AMDGPUInstPrinter::printSwizzle(const MCInst *MI, unsigned OpNo,
1496 uint16_t Imm = MI->getOperand(OpNo).getImm();
1570 printU16ImmDecOperand(MI, OpNo, O);
1574 void AMDGPUInstPrinter::printSWaitCnt(const MCInst *MI, unsigned OpNo,
1579 unsigned SImm16 = MI->getOperand(OpNo).getImm();
1609 void AMDGPUInstPrinter::printDepCtr(const MCInst *MI, unsigned OpNo,
1614 uint64_t Imm16 = MI->getOperand(OpNo).getImm() & 0xffff;
1636 void AMDGPUInstPrinter::printSDelayALU(const MCInst *MI, unsigned OpNo,
1650 unsigned SImm16 = MI->getOperand(OpNo).getImm();
1679 void AMDGPUInstPrinter::printHwreg(const MCInst *MI, unsigned OpNo,
1682 unsigned Val = MI->getOperand(OpNo).getImm();
1697 void AMDGPUInstPrinter::printEndpgm(const MCInst *MI, unsigned OpNo,
1700 uint16_t Imm = MI->getOperand(OpNo).getImm();
1708 void AMDGPUInstPrinter::printNamedInt(const MCInst *MI, unsigned OpNo,
1712 int64_t V = MI->getOperand(OpNo).getImm();
1717 void AMDGPUInstPrinter::printBitOp3(const MCInst *MI, unsigned OpNo,
1720 uint8_t Imm = MI->getOperand(OpNo).getImm();