Lines Matching defs:MI
31 static bool isReg(const MCInst &MI, unsigned OpNo) {
32 assert(MI.getOperand(OpNo).isReg() && "Register operand expected.");
33 return MI.getOperand(OpNo).getReg() == R;
79 void MipsInstPrinter::printInst(const MCInst *MI, uint64_t Address,
82 switch (MI->getOpcode()) {
92 printSaveRestore(MI, STI, O);
97 printSaveRestore(MI, STI, O);
102 printSaveRestore(MI, STI, O);
107 printSaveRestore(MI, STI, O);
113 if (!printAliasInstr(MI, Address, STI, O) &&
114 !printAlias(*MI, Address, STI, O))
115 printInstruction(MI, Address, STI, O);
118 switch (MI->getOpcode()) {
127 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
129 const MCOperand &Op = MI->getOperand(OpNo);
144 void MipsInstPrinter::printJumpOperand(const MCInst *MI, unsigned OpNo,
147 const MCOperand &Op = MI->getOperand(OpNo);
149 return printOperand(MI, OpNo, STI, O);
157 void MipsInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
161 const MCOperand &Op = MI->getOperand(OpNo);
163 return printOperand(MI, OpNo, STI, O);
178 void MipsInstPrinter::printUImm(const MCInst *MI, int opNum,
180 const MCOperand &MO = MI->getOperand(opNum);
190 printOperand(MI, opNum, STI, O);
193 void MipsInstPrinter::printMemOperand(const MCInst *MI, int opNum,
202 switch (MI->getOpcode()) {
211 opNum = MI->getNumOperands() - 2;
216 printOperand(MI, opNum + 1, STI, O);
218 printOperand(MI, opNum, STI, O);
222 void MipsInstPrinter::printMemOperandEA(const MCInst *MI, int opNum,
227 printOperand(MI, opNum, STI, O);
229 printOperand(MI, opNum + 1, STI, O);
232 void MipsInstPrinter::printFCCOperand(const MCInst *MI, int opNum,
235 const MCOperand &MO = MI->getOperand(opNum);
240 printSHFMask(const MCInst *MI, int opNum, raw_ostream &O) {
244 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
250 printBranchOperand(&MI, Address, OpNo, STI, OS);
252 printOperand(&MI, OpNo, STI, OS);
256 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
260 printAlias(Str, MI, Address, OpNo0, STI, OS, IsBranch);
263 printBranchOperand(&MI, Address, OpNo1, STI, OS);
265 printOperand(&MI, OpNo1, STI, OS);
269 bool MipsInstPrinter::printAlias(const MCInst &MI, uint64_t Address,
271 switch (MI.getOpcode()) {
276 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) &&
277 printAlias("b", MI, Address, 2, STI, OS, true)) ||
278 (isReg<Mips::ZERO>(MI, 1) &&
279 printAlias("beqz", MI, Address, 0, 2, STI, OS, true));
282 return isReg<Mips::ZERO_64>(MI, 1) &&
283 printAlias("beqz", MI, Address, 0, 2, STI, OS, true);
287 return isReg<Mips::ZERO>(MI, 1) &&
288 printAlias("bnez", MI, Address, 0, 2, STI, OS, true);
291 return isReg<Mips::ZERO_64>(MI, 1) &&
292 printAlias("bnez", MI, Address, 0, 2, STI, OS, true);
295 return isReg<Mips::ZERO>(MI, 0) &&
296 printAlias("bal", MI, Address, 1, STI, OS, true);
299 return isReg<Mips::FCC0>(MI, 0) &&
300 printAlias("bc1t", MI, Address, 1, STI, OS, true);
303 return isReg<Mips::FCC0>(MI, 0) &&
304 printAlias("bc1f", MI, Address, 1, STI, OS, true);
308 return (isReg<Mips::ZERO>(MI, 0) &&
309 printAlias("jr", MI, Address, 1, STI, OS)) ||
310 (isReg<Mips::RA>(MI, 0) &&
311 printAlias("jalr", MI, Address, 1, STI, OS));
315 return (isReg<Mips::ZERO_64>(MI, 0) &&
316 printAlias("jr", MI, Address, 1, STI, OS)) ||
317 (isReg<Mips::RA_64>(MI, 0) &&
318 printAlias("jalr", MI, Address, 1, STI, OS));
323 return isReg<Mips::ZERO>(MI, 2) &&
324 printAlias("not", MI, Address, 0, 1, STI, OS);
327 return isReg<Mips::ZERO_64>(MI, 2) &&
328 printAlias("not", MI, Address, 0, 1, STI, OS);
333 return isReg<Mips::ZERO>(MI, 2) &&
334 printAlias("move", MI, Address, 0, 1, STI, OS);
340 void MipsInstPrinter::printSaveRestore(const MCInst *MI,
343 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
345 if (MI->getOperand(i).isReg())
346 printRegName(O, MI->getOperand(i).getReg());
348 printUImm<16>(MI, i, STI, O);
352 void MipsInstPrinter::printRegisterList(const MCInst *MI, int opNum,
357 for (int i = opNum, e = MI->getNumOperands() - 2; i != e; ++i) {
360 printRegName(O, MI->getOperand(i).getReg());