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Searched defs:Invert (Results 1 – 25 of 27) sorted by relevance

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/llvm-project/clang-tools-extra/clang-tidy/bugprone/
H A DReservedIdentifierCheck.h32 const bool Invert; variable
H A DReservedIdentifierCheck.cpp129 const LangOptions &LangOpts, bool Invert, in getFailureInfoImpl()
/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64GlobalISelUtils.cpp190 changeVectorFCMPPredToAArch64CC(const CmpInst::Predicate P,AArch64CC::CondCode & CondCode,AArch64CC::CondCode & CondCode2,bool & Invert) changeVectorFCMPPredToAArch64CC() argument
H A DAArch64PostLegalizerLowering.cpp1013 bool Invert = false; applyLowerVectorFCMP() local
H A DAArch64InstructionSelector.cpp1195 __anonf9564d600202(Register &Reg, Register &OtherReg, bool Invert) emitSelect() argument
1451 getTestBitReg(Register Reg,uint64_t & Bit,bool & Invert,MachineRegisterInfo & MRI) getTestBitReg() argument
1616 tryOptAndIntoCompareBranch(MachineInstr & AndInst,bool Invert,MachineBasicBlock * DstMBB,MachineIRBuilder & MIB) const tryOptAndIntoCompareBranch() argument
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/llvm-project/llvm/lib/Support/
H A DGlobPattern.cpp175 bool Invert = S[I] == '^' || S[I] == '!'; in create() local
/llvm-project/llvm/include/llvm/Analysis/
H A DSimplifyQuery.h64 bool Invert = false; member
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp498 bool Invert = !DefMI; in optimizeSelect() local
H A DLanaiISelLowering.cpp1350 isConditionalZeroOrAllOnes(SDNode * N,bool AllOnes,SDValue & CC,bool & Invert,SDValue & OtherOp,SelectionDAG & DAG) isConditionalZeroOrAllOnes() argument
/llvm-project/flang/lib/Parser/
H A Dprovenance.cpp126 ProvenanceRangeToOffsetMappings OffsetToProvenanceMappings::Invert( in Invert() function in Fortran::parser::OffsetToProvenanceMappings
/llvm-project/llvm/lib/Transforms/Scalar/
H A DStructurizeCFG.cpp453 buildCondition(BranchInst * Term,unsigned Idx,bool Invert) buildCondition() argument
/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombinePHI.cpp1336 std::optional<bool> Invert; simplifyUsingControlFlow() local
/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp1164 bool Invert = false; in LowerSETCC() local
/llvm-project/llvm/lib/Analysis/
H A DValueTracking.cpp733 computeKnownBitsFromICmpCond(const Value * V,ICmpInst * Cmp,KnownBits & Known,const SimplifyQuery & SQ,bool Invert) computeKnownBitsFromICmpCond() argument
752 computeKnownBitsFromCond(const Value * V,Value * Cond,KnownBits & Known,unsigned Depth,const SimplifyQuery & SQ,bool Invert) computeKnownBitsFromCond() argument
996 adjustKnownBitsForSelectArm(KnownBits & Known,Value * Cond,Value * Arm,bool Invert,unsigned Depth,const SimplifyQuery & Q) adjustKnownBitsForSelectArm() argument
1082 __anon334373a60402(Value *Arm, bool Invert) computeKnownBitsFromOperator() argument
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H A DLazyValueInfo.cpp1120 bool Invert = false; getRangeViaSLT() local
/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2985 bool Swap = false, Invert = false; adjustICmp128() local
3258 getVectorComparisonOrInvert(ISD::CondCode CC,CmpMode Mode,bool & Invert) getVectorComparisonOrInvert() argument
3341 bool Invert = false; lowerVectorSETCC() local
7605 bool Invert = false; combineCCMask() local
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/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp1408 bool Invert = !DefMI; optimizeSelect() local
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/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp2174 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); in LowerSETCC() local
/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp2348 bool Invert = !DefMI; optimizeSelect() local
H A DARMISelLowering.cpp6797 bool Invert = false; LowerVSETCC() local
12534 isConditionalZeroOrAllOnes(SDNode * N,bool AllOnes,SDValue & CC,bool & Invert,SDValue & OtherOp,SelectionDAG & DAG) isConditionalZeroOrAllOnes() argument
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/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3358 changeVectorFPCCToAArch64CC(ISD::CondCode CC,AArch64CC::CondCode & CondCode,AArch64CC::CondCode & CondCode2,bool & Invert) changeVectorFPCCToAArch64CC() argument
4118 valueToCarryFlag(SDValue Value,SelectionDAG & DAG,bool Invert) valueToCarryFlag() argument
4131 carryFlagToValue(SDValue Glue,EVT VT,SelectionDAG & DAG,bool Invert) carryFlagToValue() argument
23846 getTestBitOperand(SDValue Op,unsigned & Bit,bool & Invert,SelectionDAG & DAG) getTestBitOperand() argument
23923 bool Invert = false; performTBZCombine() local
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H A DAArch64ISelDAGToDAG.cpp4205 SelectSVELogicalImm(SDValue N,MVT VT,SDValue & Imm,bool Invert) SelectSVELogicalImm() argument
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4324 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) { in getCRIdxForSetCC() argument
/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp3017 bool Invert = false; SpeculativelyExecuteBB() local
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/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp23558 bool Invert = false; LowerVSETCC() local
23593 bool Invert = Cond == ISD::SETNE || LowerVSETCC() local
23812 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); emitFlagsForSetcc() local
42075 __anon0268aba88c02(SDValue Op, bool Invert = false) SimplifyDemandedVectorEltsForTargetNode() argument
53398 __anon0268aba8c902(SDValue Op, bool Invert = false) combineAndnp() argument
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