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Searched defs:IDLoc (Results 1 – 24 of 24) sorted by relevance

/llvm-project/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp797 emitLAInstSeq(MCRegister DestReg,MCRegister TmpReg,const MCExpr * Symbol,SmallVectorImpl<Inst> & Insts,SMLoc IDLoc,MCStreamer & Out,bool RelaxHint) emitLAInstSeq() argument
872 emitLoadAddressAbs(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressAbs() argument
903 emitLoadAddressPcrel(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressPcrel() argument
922 emitLoadAddressPcrelLarge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressPcrelLarge() argument
949 emitLoadAddressGot(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressGot() argument
968 emitLoadAddressGotLarge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressGotLarge() argument
995 emitLoadAddressTLSLE(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSLE() argument
1013 emitLoadAddressTLSIE(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSIE() argument
1032 emitLoadAddressTLSIELarge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSIELarge() argument
1059 emitLoadAddressTLSLD(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSLD() argument
1078 emitLoadAddressTLSLDLarge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSLDLarge() argument
1105 emitLoadAddressTLSGD(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSGD() argument
1124 emitLoadAddressTLSGDLarge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSGDLarge() argument
1151 emitLoadAddressTLSDescAbs(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSDescAbs() argument
1194 emitLoadAddressTLSDescPcrel(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSDescPcrel() argument
1221 emitLoadAddressTLSDescPcrelLarge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddressTLSDescPcrelLarge() argument
1254 emitLoadImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadImm() argument
1276 emitFuncCall36(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,bool IsTailCall) emitFuncCall36() argument
1305 processInstruction(MCInst & Inst,SMLoc IDLoc,OperandVector & Operands,MCStreamer & Out) processInstruction() argument
1461 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
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/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp140 emitDirectiveCpRestore(int Offset,function_ref<unsigned ()> GetATReg,SMLoc IDLoc,const MCSubtargetInfo * STI) emitDirectiveCpRestore() argument
175 emitR(unsigned Opcode,unsigned Reg0,SMLoc IDLoc,const MCSubtargetInfo * STI) emitR() argument
185 emitRX(unsigned Opcode,unsigned Reg0,MCOperand Op1,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRX() argument
195 emitRI(unsigned Opcode,unsigned Reg0,int32_t Imm,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRI() argument
200 emitRR(unsigned Opcode,unsigned Reg0,unsigned Reg1,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRR() argument
205 emitII(unsigned Opcode,int16_t Imm1,int16_t Imm2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitII() argument
215 emitRRX(unsigned Opcode,unsigned Reg0,unsigned Reg1,MCOperand Op2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRX() argument
227 emitRRR(unsigned Opcode,unsigned Reg0,unsigned Reg1,unsigned Reg2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRR() argument
233 emitRRRX(unsigned Opcode,unsigned Reg0,unsigned Reg1,unsigned Reg2,MCOperand Op3,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRRX() argument
246 emitRRI(unsigned Opcode,unsigned Reg0,unsigned Reg1,int16_t Imm,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRI() argument
253 emitRRIII(unsigned Opcode,unsigned Reg0,unsigned Reg1,int16_t Imm0,int16_t Imm1,int16_t Imm2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRIII() argument
274 emitDSLL(unsigned DstReg,unsigned SrcReg,int16_t ShiftAmount,SMLoc IDLoc,const MCSubtargetInfo * STI) emitDSLL() argument
284 emitEmptyDelaySlot(bool hasShortDelaySlot,SMLoc IDLoc,const MCSubtargetInfo * STI) emitEmptyDelaySlot() argument
300 emitNop(SMLoc IDLoc,const MCSubtargetInfo * STI) emitNop() argument
308 emitGPRestore(int Offset,SMLoc IDLoc,const MCSubtargetInfo * STI) emitGPRestore() argument
316 emitStoreWithImmOffset(unsigned Opcode,unsigned SrcReg,unsigned BaseReg,int64_t Offset,function_ref<unsigned ()> GetATReg,SMLoc IDLoc,const MCSubtargetInfo * STI) emitStoreWithImmOffset() argument
353 emitLoadWithImmOffset(unsigned Opcode,unsigned DstReg,unsigned BaseReg,int64_t Offset,unsigned TmpReg,SMLoc IDLoc,const MCSubtargetInfo * STI) emitLoadWithImmOffset() argument
699 emitDirectiveCpRestore(int Offset,function_ref<unsigned ()> GetATReg,SMLoc IDLoc,const MCSubtargetInfo * STI) emitDirectiveCpRestore() argument
1212 emitDirectiveCpRestore(int Offset,function_ref<unsigned ()> GetATReg,SMLoc IDLoc,const MCSubtargetInfo * STI) emitDirectiveCpRestore() argument
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/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp1872 processInstruction(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) processInstruction() argument
2426 SMLoc IDLoc = SMLoc(); onEndOfFile() local
2436 tryExpandInstruction(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) tryExpandInstruction() argument
2698 expandJalWithRegs(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandJalWithRegs() argument
2761 loadImmediate(int64_t ImmValue,unsigned DstReg,unsigned SrcReg,bool Is32BitImm,bool IsAddress,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) loadImmediate() argument
2926 expandLoadImm(MCInst & Inst,bool Is32BitImm,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadImm() argument
2942 expandLoadAddress(unsigned DstReg,unsigned BaseReg,const MCOperand & Offset,bool Is32BitAddress,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadAddress() argument
2973 loadAndAddSymbolAddress(const MCExpr * SymExpr,unsigned DstReg,unsigned SrcReg,bool Is32BitSym,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) loadAndAddSymbolAddress() argument
3354 emitPartialAddress(MipsTargetStreamer & TOut,SMLoc IDLoc,MCSymbol * Sym) emitPartialAddress() argument
3428 expandLoadSingleImmToGPR(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadSingleImmToGPR() argument
3444 expandLoadSingleImmToFPR(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadSingleImmToFPR() argument
3498 expandLoadDoubleImmToGPR(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadDoubleImmToGPR() argument
3564 expandLoadDoubleImmToFPR(MCInst & Inst,bool Is64FPU,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadDoubleImmToFPR() argument
3636 expandUncondBranchMMPseudo(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandUncondBranchMMPseudo() argument
3681 expandBranchImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandBranchImm() argument
3747 expandMem16Inst(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI,bool IsLoad) expandMem16Inst() argument
3874 expandMem9Inst(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI,bool IsLoad) expandMem9Inst() argument
3932 expandLoadStoreMultiple(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandLoadStoreMultiple() argument
3961 expandCondBranches(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandCondBranches() argument
4232 expandDivRem(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI,const bool IsMips64,const bool Signed) expandDivRem() argument
4404 expandTrunc(MCInst & Inst,bool IsDouble,bool Is64FPU,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandTrunc() argument
4442 expandUlh(MCInst & Inst,bool Signed,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandUlh() argument
4494 expandUsh(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandUsh() argument
4545 expandUxw(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandUxw() argument
4600 expandSge(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSge() argument
4634 expandSgeImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSgeImm() argument
4690 expandSgtImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSgtImm() argument
4737 expandSle(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSle() argument
4771 expandSleImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSleImm() argument
4819 expandAliasImmediate(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandAliasImmediate() argument
4926 expandRotation(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandRotation() argument
4988 expandRotationImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandRotationImm() argument
5051 expandDRotation(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandDRotation() argument
5113 expandDRotationImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandDRotationImm() argument
5208 expandAbs(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandAbs() argument
5224 expandMulImm(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandMulImm() argument
5247 expandMulO(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandMulO() argument
5289 expandMulOU(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandMulOU() argument
5325 expandDMULMacro(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandDMULMacro() argument
5343 expandLoadStoreDMacro(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI,bool IsLoad) expandLoadStoreDMacro() argument
5391 expandStoreDM1Macro(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandStoreDM1Macro() argument
5428 expandSeq(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSeq() argument
5454 expandSeqI(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSeqI() argument
5508 expandSne(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSne() argument
5535 expandSneI(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSneI() argument
5726 expandMXTRAlias(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandMXTRAlias() argument
5796 expandSaaAddr(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) expandSaaAddr() argument
5995 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
[all...]
/llvm-project/llvm/lib/MC/MCParser/
H A DDarwinAsmParser.cpp587 SMLoc IDLoc) { in parseDirectiveDumpOrLoad() argument
761 bool DarwinAsmParser::parseDirectiveSecureLogUnique(StringRef, SMLoc IDLoc) { in parseDirectiveSecureLogUnique() argument
801 bool DarwinAsmParser::parseDirectiveSecureLogReset(StringRef, SMLoc IDLoc) { in parseDirectiveSecureLogReset() argument
828 SMLoc IDLoc = getLexer().getLoc(); parseDirectiveTBSS() local
913 SMLoc IDLoc = getLexer().getLoc(); parseDirectiveZerofill() local
[all...]
H A DAsmParser.cpp1797 SMLoc IDLoc = ID.getLoc(); parseStatement() local
2321 parseAndMatchAndEmitTargetInstruction(ParseStatementInfo & Info,StringRef IDVal,AsmToken ID,SMLoc IDLoc) parseAndMatchAndEmitTargetInstruction() argument
2761 SMLoc IDLoc = Lexer.getLoc(); parseMacroArguments() local
5027 SMLoc IDLoc = getLexer().getLoc(); parseDirectiveComm() local
5810 parseDirectiveMSEmit(SMLoc IDLoc,ParseStatementInfo & Info,size_t Len) parseDirectiveMSEmit() argument
5827 parseDirectiveMSAlign(SMLoc IDLoc,ParseStatementInfo & Info) parseDirectiveMSAlign() argument
[all...]
H A DMasmParser.cpp2109 SMLoc IDLoc = ID.getLoc(); parseStatement() local
3110 SMLoc IDLoc = Lexer.getLoc(); parseMacroArguments() local
6024 SMLoc IDLoc = getLexer().getLoc(); parseDirectiveComm() local
7139 parseDirectiveMSEmit(SMLoc IDLoc,ParseStatementInfo & Info,size_t Len) parseDirectiveMSEmit() argument
7156 parseDirectiveMSAlign(SMLoc IDLoc,ParseStatementInfo & Info) parseDirectiveMSAlign() argument
[all...]
/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp1367 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
3121 emitAuipcInstPair(MCOperand DestReg,MCOperand TmpReg,const MCExpr * Symbol,RISCVMCExpr::VariantKind VKHi,unsigned SecondOpcode,SMLoc IDLoc,MCStreamer & Out) emitAuipcInstPair() argument
3145 emitLoadLocalAddress(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadLocalAddress() argument
3159 emitLoadGlobalAddress(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadGlobalAddress() argument
3174 emitLoadAddress(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadAddress() argument
3189 emitLoadTLSIEAddress(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadTLSIEAddress() argument
3204 emitLoadTLSGDAddress(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) emitLoadTLSGDAddress() argument
3219 emitLoadStoreSymbol(MCInst & Inst,unsigned Opcode,SMLoc IDLoc,MCStreamer & Out,bool HasTmpReg) emitLoadStoreSymbol() argument
3238 emitPseudoExtend(MCInst & Inst,bool SignExtend,int64_t Width,SMLoc IDLoc,MCStreamer & Out) emitPseudoExtend() argument
3266 emitVMSGE(MCInst & Inst,unsigned Opcode,SMLoc IDLoc,MCStreamer & Out) emitVMSGE() argument
3514 processInstruction(MCInst & Inst,SMLoc IDLoc,OperandVector & Operands,MCStreamer & Out) processInstruction() argument
[all...]
/llvm-project/llvm/lib/Target/CSKY/AsmParser/
H A DCSKYAsmParser.cpp659 bool CSKYAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, in MatchAndEmitInstruction() argument
825 processLRW(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) processLRW() argument
873 processJSRI(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) processJSRI() argument
894 processJMPI(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out) processJMPI() argument
915 processInstruction(MCInst & Inst,SMLoc IDLoc,OperandVector & Operands,MCStreamer & Out) processInstruction() argument
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/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp472 finishBundle(SMLoc IDLoc,MCStreamer & Out) finishBundle() argument
516 auto IDLoc = Parser.getTok().getLoc(); matchBundleOptions() local
558 matchOneInstruction(MCInst & MCI,SMLoc IDLoc,OperandVector & InstOperands,uint64_t & ErrorInfo,bool MatchingInlineAsm) matchOneInstruction() argument
617 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
1335 OutOfRange(SMLoc IDLoc,long long Val,long long Max) OutOfRange() argument
1348 processInstruction(MCInst & Inst,OperandVector const & Operands,SMLoc IDLoc) processInstruction() argument
[all...]
/llvm-project/llvm/lib/Target/Xtensa/AsmParser/
H A DXtensaAsmParser.cpp365 processInstruction(MCInst & Inst,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) processInstruction() argument
428 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
[all...]
/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp604 expandSET(MCInst & Inst,SMLoc IDLoc,SmallVectorImpl<MCInst> & Instructions) expandSET() argument
678 expandSETX(MCInst & Inst,SMLoc IDLoc,SmallVectorImpl<MCInst> & Instructions) expandSETX() argument
750 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
[all...]
/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp307 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmParser.cpp1005 MatchAndEmitInstruction(SMLoc IDLoc,unsigned &,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
1074 doBeforeLabelEmit(MCSymbol * Symbol,SMLoc IDLoc) doBeforeLabelEmit() argument
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/llvm-project/clang/lib/Sema/
H A DSemaSwift.cpp283 IdentifierLoc *IDLoc = AL.getArgAsIdent(0); handleAsyncError() local
/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp4028 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
4073 MatchFPUWaitAlias(SMLoc IDLoc,X86Operand & Op,OperandVector & Operands,MCStreamer & Out,bool MatchingInlineAsm) MatchFPUWaitAlias() argument
4099 ErrorMissingFeature(SMLoc IDLoc,const FeatureBitset & MissingFeatures,bool MatchingInlineAsm) ErrorMissingFeature() argument
4153 matchAndEmitATTInstruction(SMLoc IDLoc,unsigned & Opcode,MCInst & Inst,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) matchAndEmitATTInstruction() argument
4379 matchAndEmitIntelInstruction(SMLoc IDLoc,unsigned & Opcode,MCInst & Inst,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) matchAndEmitIntelInstruction() argument
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/llvm-project/llvm/include/llvm/MC/MCParser/
H A DMCTargetAsmParser.h537 virtual void doBeforeLabelEmit(MCSymbol *Symbol, SMLoc IDLoc) {} in doBeforeLabelEmit() argument
/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3855 validateMIMGDataSize(const MCInst & Inst,const SMLoc & IDLoc) validateMIMGDataSize() argument
3902 validateMIMGAddrSize(const MCInst & Inst,const SMLoc & IDLoc) validateMIMGAddrSize() argument
4900 validateCoherencyBits(const MCInst & Inst,const OperandVector & Operands,const SMLoc & IDLoc) validateCoherencyBits() argument
5048 validateInstruction(const MCInst & Inst,const SMLoc & IDLoc,const OperandVector & Operands) validateInstruction() argument
5198 checkUnsupportedInstruction(StringRef Mnemo,const SMLoc & IDLoc) checkUnsupportedInstruction() argument
5253 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
[all...]
/llvm-project/llvm/lib/Target/VE/AsmParser/
H A DVEAsmParser.cpp763 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp1255 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp1519 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp11354 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
11620 doBeforeLabelEmit(MCSymbol * Symbol,SMLoc IDLoc) doBeforeLabelEmit() argument
12714 FilterNearMisses(SmallVectorImpl<NearMissInfo> & NearMissesIn,SmallVectorImpl<NearMissMessage> & NearMissesOut,SMLoc IDLoc,OperandVector & Operands) FilterNearMisses() argument
12879 ReportNearMisses(SmallVectorImpl<NearMissInfo> & NearMisses,SMLoc IDLoc,OperandVector & Operands) ReportNearMisses() argument
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/llvm-project/clang/lib/AST/
H A DDecl.cpp5627 HLSLBufferDecl(DeclContext * DC,bool CBuffer,SourceLocation KwLoc,IdentifierInfo * ID,SourceLocation IDLoc,SourceLocation LBrace) HLSLBufferDecl() argument
5635 Create(ASTContext & C,DeclContext * LexicalParent,bool CBuffer,SourceLocation KwLoc,IdentifierInfo * ID,SourceLocation IDLoc,SourceLocation LBrace) Create() argument
/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5250 validateInstruction(MCInst & Inst,SMLoc & IDLoc,SmallVectorImpl<SMLoc> & Loc) validateInstruction() argument
6207 MatchAndEmitInstruction(SMLoc IDLoc,unsigned & Opcode,OperandVector & Operands,MCStreamer & Out,uint64_t & ErrorInfo,bool MatchingInlineAsm) MatchAndEmitInstruction() argument
[all...]
/llvm-project/llvm/lib/AsmParser/
H A DLLParser.cpp923 LocTy IDLoc = Lex.getLoc(); parseMDNodeID() local