Lines Matching defs:IDLoc

141     int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
176 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc,
181   TmpInst.setLoc(IDLoc);
186                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
191   TmpInst.setLoc(IDLoc);
196                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
197   emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI);
201                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
202   emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI);
206                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
211   TmpInst.setLoc(IDLoc);
216                                  MCOperand Op2, SMLoc IDLoc,
223   TmpInst.setLoc(IDLoc);
228                                  unsigned Reg2, SMLoc IDLoc,
230   emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI);
234                                   unsigned Reg2, MCOperand Op3, SMLoc IDLoc,
242   TmpInst.setLoc(IDLoc);
247                                  int16_t Imm, SMLoc IDLoc,
249   emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI);
254                                    int16_t Imm2, SMLoc IDLoc,
263   TmpInst.setLoc(IDLoc);
275                                   int16_t ShiftAmount, SMLoc IDLoc,
278     emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
282   emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
285 void MipsTargetStreamer::emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc,
291     emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI);
298   emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
301 void MipsTargetStreamer::emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI) {
303     emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
305     emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
309 void MipsTargetStreamer::emitGPRestore(int Offset, SMLoc IDLoc,
311   emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI);
317     function_ref<unsigned()> GetATReg, SMLoc IDLoc,
320     emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);
341   emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
343     emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
345   emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);
354                                                unsigned TmpReg, SMLoc IDLoc,
357     emitRRI(Opcode, DstReg, BaseReg, Offset, IDLoc, STI);
377   emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
379     emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
381   emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI);
700     int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
702   MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
1215     int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
1217   MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
1230   emitStoreWithImmOffset(Mips::SW, GPReg, Mips::SP, Offset, GetATReg, IDLoc,