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Searched defs:DCI (Results 1 – 19 of 19) sorted by relevance

/llvm-project/clang/lib/AST/
H A DASTImporterLookupTable.cpp164 auto DCI = LookupTable.find(DC->getPrimaryContext()); lookup() local
181 auto DCI = LookupTable.find(DC->getPrimaryContext()); dump() local
/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5290 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI) PerformADDCombineWithOperands() argument
5334 PerformFADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformFADDCombineWithOperands() argument
5434 PerformADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformADDCombine() argument
5458 PerformFADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformFADDCombine() argument
5476 PerformANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformANDCombine() argument
5575 PerformREMCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformREMCombine() argument
5678 TryMULWIDECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) TryMULWIDECombine() argument
5762 combineMADConstOne(SDValue X,SDValue Add,EVT VT,SDLoc DL,TargetLowering::DAGCombinerInfo & DCI) combineMADConstOne() argument
5772 combineMulSelectConstOne(SDValue X,SDValue Select,EVT VT,SDLoc DL,TargetLowering::DAGCombinerInfo & DCI) combineMulSelectConstOne() argument
5801 PerformMULCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI) PerformMULCombineWithOperands() argument
5829 PerformMULCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformMULCombine() argument
5844 PerformSHLCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,CodeGenOptLevel OptLevel) PerformSHLCombine() argument
5856 PerformSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,unsigned int SmVersion) PerformSETCCCombine() argument
5883 PerformEXTRACTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformEXTRACTCombine() argument
5933 PerformVSELECTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVSELECTCombine() argument
5965 PerformLOADCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformLOADCombine() argument
[all...]
/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp12607 combineSelectAndUse(SDNode * N,SDValue Slct,SDValue OtherOp,TargetLowering::DAGCombinerInfo & DCI,bool AllOnes=false) combineSelectAndUse() argument
12633 combineSelectAndUseCommutative(SDNode * N,bool AllOnes,TargetLowering::DAGCombinerInfo & DCI) combineSelectAndUseCommutative() argument
12658 AddCombineToVPADD(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineToVPADD() argument
12686 AddCombineVUZPToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineVUZPToVPADDL() argument
12739 AddCombineBUILD_VECTORToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineBUILD_VECTORToVPADDL() argument
12843 AddCombineTo64BitSMLAL16(SDNode * AddcNode,SDNode * AddeNode,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineTo64BitSMLAL16() argument
12920 AddCombineTo64bitMLAL(SDNode * AddeSubeNode,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineTo64bitMLAL() argument
13086 AddCombineTo64bitUMAAL(SDNode * AddeNode,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineTo64bitUMAAL() argument
13163 PerformAddcSubcCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformAddcSubcCombine() argument
13196 PerformAddeSubeCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformAddeSubeCombine() argument
13224 PerformSELECTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformSELECTCombine() argument
13443 PerformVSELECTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVSELECTCombine() argument
13483 PerformVSetCCToVCTPCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVSetCCToVCTPCombine() argument
13544 PerformADDECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDECombine() argument
13561 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDCombineWithOperands() argument
13930 PerformSHLSimplify(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformSHLSimplify() argument
14038 PerformADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDCombine() argument
14081 PerformSUBCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformSUBCombine() argument
14134 PerformVMULCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVMULCombine() argument
14230 PerformMULCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformMULCombine() argument
14316 CombineANDShift(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) CombineANDShift() argument
14428 PerformANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformANDCombine() argument
14478 PerformORCombineToSMULWBT(SDNode * OR,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformORCombineToSMULWBT() argument
14538 PerformORCombineToBFI(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformORCombineToBFI() argument
14721 PerformORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformORCombine() argument
14821 PerformXORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformXORCombine() argument
15069 PerformVMOVRRDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVMOVRRDCombine() argument
15177 PerformVMOVhrCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVMOVhrCombine() argument
15286 PerformBUILD_VECTORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformBUILD_VECTORCombine() argument
15318 PerformARMBUILD_VECTORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformARMBUILD_VECTORCombine() argument
15409 PerformPREDICATE_CASTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformPREDICATE_CASTCombine() argument
15500 PerformInsertEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformInsertEltCombine() argument
15528 PerformExtractEltToVMOVRRD(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformExtractEltToVMOVRRD() argument
15590 PerformExtractEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformExtractEltCombine() argument
15665 PerformInsertSubvectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformInsertSubvectorCombine() argument
15805 TryCombineBaseUpdate(struct BaseUpdateTarget & Target,struct BaseUpdateUser & User,bool SimpleConstIncOnly,TargetLowering::DAGCombinerInfo & DCI) TryCombineBaseUpdate() argument
16172 CombineBaseUpdate(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) CombineBaseUpdate() argument
16261 PerformVLDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVLDCombine() argument
16269 PerformMVEVLDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformMVEVLDCombine() argument
16392 CombineVLDDUP(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) CombineVLDDUP() argument
16471 PerformVDUPLANECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformVDUPLANECombine() argument
16552 PerformLOADCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformLOADCombine() argument
16822 PerformSTORECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformSTORECombine() argument
17404 PerformVMOVNCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVMOVNCombine() argument
17444 PerformVQMOVNCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVQMOVNCombine() argument
17460 PerformVQDMULHCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) PerformVQDMULHCombine() argument
17737 PerformShiftCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformShiftCombine() argument
18236 PerformHWLoopCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformHWLoopCombine() argument
18585 PerformBITCASTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * ST) PerformBITCASTCombine() argument
[all...]
/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2476 performVECTOR_SHUFFLECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVECTOR_SHUFFLECombine() argument
2505 performVectorExtendToFPCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVectorExtendToFPCombine() argument
2527 performVectorExtendCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVectorExtendCombine() argument
2574 performVectorTruncZeroCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performVectorTruncZeroCombine() argument
2776 performTruncateCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performTruncateCombine() argument
2803 performBitcastCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performBitcastCombine() argument
2830 performSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSETCCCombine() argument
[all...]
/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp482 performANDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performANDCombine() argument
597 performORCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performORCombine() argument
829 performMULCombine(SDNode * N,SelectionDAG & DAG,const TargetLowering::DAGCombinerInfo & DCI,const MipsSETargetLowering * TL,const MipsSubtarget & Subtarget) performMULCombine() argument
870 performSHLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSHLCombine() argument
893 performSRACombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSRACombine() argument
939 performSRLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSRLCombine() argument
[all...]
H A DMipsISelLowering.cpp587 performDivRemCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performDivRemCombine() argument
696 performSELECTCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSELECTCombine() argument
777 performCMovFPCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performCMovFPCombine() argument
804 performANDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performANDCombine() argument
887 performORCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performORCombine() argument
1081 performSUBCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSUBCombine() argument
1096 performADDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performADDCombine() argument
1128 performSHLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const MipsSubtarget & Subtarget) performSHLCombine() argument
[all...]
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp19021 if (DCI.isBeforeLegalizeOps()) in performExtractVectorEltCombine() argument
17721 performXorCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performXorCombine() argument
18030 performMulCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performMulCombine() argument
18368 performFpToIntCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFpToIntCombine() argument
18436 tryCombineToBSL(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64TargetLowering & TLI) tryCombineToBSL() argument
18614 performORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget,const AArch64TargetLowering & TLI) performORCombine() argument
18671 performSVEAndCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSVEAndCombine() argument
18784 performANDSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performANDSETCCCombine() argument
18823 performANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performANDCombine() argument
18886 performFADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performFADDCombine() argument
18958 performFirstTrueTestVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFirstTrueTestVectorCombine() argument
18988 performLastTrueTestVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performLastTrueTestVectorCombine() argument
19091 performConcatVectorsCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performConcatVectorsCombine() argument
19318 performExtractSubvectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performExtractSubvectorCombine() argument
19341 performInsertSubvectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performInsertSubvectorCombine() argument
19383 tryCombineFixedPointConvert(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryCombineFixedPointConvert() argument
19822 performAddSubLongCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performAddSubLongCombine() argument
19929 performBuildVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performBuildVectorCombine() argument
20211 performSVEMulAddSubCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSVEMulAddSubCombine() argument
20539 performAddSubCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performAddSubCombine() argument
20574 tryCombineLongOpWithDup(unsigned IID,SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryCombineLongOpWithDup() argument
20780 tryConvertSVEWideCompare(SDNode * N,ISD::CondCode CC,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryConvertSVEWideCompare() argument
20965 tryCombineWhileLo(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) tryCombineWhileLo() argument
21025 performIntrinsicCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performIntrinsicCombine() argument
21334 performSignExtendSetCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performSignExtendSetCCCombine() argument
21374 performExtendCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performExtendCombine() argument
21721 splitStores(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) splitStores() argument
22163 performVectorShiftCombine(SDNode * N,const AArch64TargetLowering & TLI,TargetLowering::DAGCombinerInfo & DCI) performVectorShiftCombine() argument
22213 performPostLD1Combine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,bool IsLaneOp) performPostLD1Combine() argument
22329 performTBISimplification(SDValue Addr,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performTBISimplification() argument
22424 performLOADCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) performLOADCombine() argument
22698 performSTORECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) performSTORECombine() argument
22756 performMSTORECombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,const AArch64Subtarget * Subtarget) performMSTORECombine() argument
22934 performMaskedGatherScatterCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performMaskedGatherScatterCombine() argument
22972 performNEONPostLDSTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performNEONPostLDSTCombine() argument
23338 performCONDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG,unsigned CCIndex,unsigned CmpIndex) performCONDCombine() argument
23417 performBRCONDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performBRCONDCombine() argument
23581 performCSELCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performCSELCombine() argument
23647 performVecReduceBitwiseCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performVecReduceBitwiseCombine() argument
23663 performSETCCCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performSETCCCombine() argument
23739 performFlagSettingCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,unsigned GenericOpcode) performFlagSettingCombine() argument
23800 performSetccMergeZeroCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSetccMergeZeroCombine() argument
23920 performTBZCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performTBZCombine() argument
24060 performSelectCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performSelectCombine() argument
24125 performDUPCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performDUPCombine() argument
24508 performSignExtendInRegCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performSignExtendInRegCombine() argument
24744 performInsertVectorEltCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performInsertVectorEltCombine() argument
24752 performFPExtendCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const AArch64Subtarget * Subtarget) performFPExtendCombine() argument
24846 tryCombineMULLWithUZP1(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) tryCombineMULLWithUZP1() argument
24980 performMULLCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performMULLCombine() argument
24993 performScalarToVectorCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,SelectionDAG & DAG) performScalarToVectorCombine() argument
[all...]
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1459 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false)) in PerformSUBCombine() argument
1420 combineSelectAndUse(SDNode * N,SDValue Slct,SDValue OtherOp,TargetLowering::DAGCombinerInfo & DCI,bool AllOnes) combineSelectAndUse() argument
1444 combineSelectAndUseCommutative(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,bool AllOnes) combineSelectAndUseCommutative() argument
[all...]
/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DDynamicType.cpp218 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson()
/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp40676 combineTargetShuffle(SDValue N,const SDLoc & DL,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineTargetShuffle() argument
41699 combineShuffle(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineShuffle() argument
43580 combineCastedMaskArithmetic(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCastedMaskArithmetic() argument
43805 combineBitcast(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineBitcast() argument
44591 combineExtractFromVectorLoad(SDNode * N,EVT VecVT,SDValue SrcVec,uint64_t Idx,const SDLoc & dl,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineExtractFromVectorLoad() argument
44627 combineExtractWithShuffle(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineExtractWithShuffle() argument
45125 combineExtractVectorElt(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineExtractVectorElt() argument
45303 combineToExtendBoolVectorInReg(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N0,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineToExtendBoolVectorInReg() argument
45402 combineVSelectWithAllOnesOrZeros(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVSelectWithAllOnesOrZeros() argument
45613 combineVSelectToBLENDV(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVSelectToBLENDV() argument
45798 combineSelect(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSelect() argument
47148 combineCMov(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCMov() argument
47773 combineMul(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMul() argument
48123 combineShiftRightLogical(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineShiftRightLogical() argument
48320 combineVectorPack(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorPack() argument
48471 combineVectorHADDSUB(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorHADDSUB() argument
48519 combineVectorShiftVar(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorShiftVar() argument
48552 combineVectorShiftImm(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorShiftImm() argument
48705 combineVectorInsert(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVectorInsert() argument
48744 combineCompareEqual(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCompareEqual() argument
49066 convertIntLogicToFPLogic(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) convertIntLogicToFPLogic() argument
49573 combineX86SubCmpForFlags(SDNode * N,SDValue Flag,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & ST) combineX86SubCmpForFlags() argument
49634 combineAndOrForCcmpCtest(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & ST) combineAndOrForCcmpCtest() argument
49714 combineAnd(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAnd() argument
50160 combineOrCmpEqZeroToCtlzSrl(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineOrCmpEqZeroToCtlzSrl() argument
50545 combineOr(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineOr() argument
51001 combineConstantPoolLoads(SDNode * N,const SDLoc & dl,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineConstantPoolLoads() argument
51075 combineLoad(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineLoad() argument
51248 reduceMaskedLoadToScalarLoad(MaskedLoadSDNode * ML,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) reduceMaskedLoadToScalarLoad() argument
51289 combineMaskedLoadConstantMask(MaskedLoadSDNode * ML,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineMaskedLoadConstantMask() argument
51337 combineMaskedLoad(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMaskedLoad() argument
51416 combineMaskedStore(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMaskedStore() argument
51464 combineStore(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineStore() argument
51736 combineVEXTRACT_STORE(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineVEXTRACT_STORE() argument
52525 combineVTRUNC(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineVTRUNC() argument
52699 combineFneg(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFneg() argument
52904 combineXor(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineXor() argument
52994 combineBITREVERSE(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineBITREVERSE() argument
53022 combineAVG(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAVG() argument
53046 combineBEXTR(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineBEXTR() argument
53147 combineFOr(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFOr() argument
53254 combineX86INT_TO_FP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineX86INT_TO_FP() argument
53287 combineCVTP2I_CVTTP2I(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineCVTP2I_CVTTP2I() argument
53324 combineAndnp(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAndnp() argument
53442 combineBT(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineBT() argument
53458 combineCVTPH2PS(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineCVTPH2PS() argument
53773 combineSext(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSext() argument
53877 combineFMA(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFMA() argument
53965 combineFMADDSUB(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineFMADDSUB() argument
53988 combineZext(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineZext() argument
54067 combineSetCC(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSetCC() argument
54356 combineMOVMSK(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineMOVMSK() argument
54473 combineTESTP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineTESTP() argument
54488 combineX86GatherScatter(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineX86GatherScatter() argument
54531 combineGatherScatter(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineGatherScatter() argument
54828 combineSIntToFP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSIntToFP() argument
55011 combineCMP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCMP() argument
55158 combineX86AddSub(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & ST) combineX86AddSub() argument
55223 combineADC(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineADC() argument
55638 combineAdd(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineAdd() argument
55801 combineSub(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineSub() argument
55939 combineConcatVectorOps(const SDLoc & DL,MVT VT,ArrayRef<SDValue> Ops,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineConcatVectorOps() argument
56593 combineCONCAT_VECTORS(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineCONCAT_VECTORS() argument
56629 combineINSERT_SUBVECTOR(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineINSERT_SUBVECTOR() argument
56840 combineEXTRACT_SUBVECTOR(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineEXTRACT_SUBVECTOR() argument
57137 combinePMULDQ(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combinePMULDQ() argument
57190 combineVPMADD(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineVPMADD() argument
57235 combineEXTEND_VECTOR_INREG(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineEXTEND_VECTOR_INREG() argument
57303 combineKSHIFT(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineKSHIFT() argument
57343 combineFP_EXTEND(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const X86Subtarget & Subtarget) combineFP_EXTEND() argument
57440 combineBROADCAST_LOAD(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineBROADCAST_LOAD() argument
57588 combinePDEP(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combinePDEP() argument
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/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp2193 performANDCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performANDCombine() argument
2279 performSRLCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performSRLCombine() argument
2320 performORCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performORCombine() argument
2541 performBITREV_WCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performBITREV_WCombine() argument
2664 performINTRINSIC_WO_CHAINCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const LoongArchSubtarget & Subtarget) performINTRINSIC_WO_CHAINCombine() argument
[all...]
/llvm-project/clang/lib/Interpreter/
H A DInterpreter.cpp328 createWithCUDA(std::unique_ptr<CompilerInstance> CI,std::unique_ptr<CompilerInstance> DCI) createWithCUDA() argument
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3709 simplifyMul24(SDNode * Node24,TargetLowering::DAGCombinerInfo & DCI) simplifyMul24() argument
3973 splitBinaryBitConstantOpImpl(DAGCombinerInfo & DCI,const SDLoc & SL,unsigned Opc,SDValue LHS,uint32_t ValLo,uint32_t ValHi) const splitBinaryBitConstantOpImpl() argument
4520 distributeOpThroughSelect(TargetLowering::DAGCombinerInfo & DCI,unsigned Op,const SDLoc & SL,SDValue Cond,SDValue N1,SDValue N2) distributeOpThroughSelect() argument
4543 foldFreeOpFromSelect(TargetLowering::DAGCombinerInfo & DCI,SDValue N) const foldFreeOpFromSelect() argument
[all...]
H A DR600ISelLowering.cpp813 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); LowerSELECT_CC() local
H A DSIISelLowering.cpp7287 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); lowerEXTRACT_VECTOR_ELT() local
11400 splitBinaryBitConstantOp(DAGCombinerInfo & DCI,const SDLoc & SL,unsigned Opc,SDValue LHS,const ConstantSDNode * CRHS) const splitBinaryBitConstantOp() argument
12180 matchPERM(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) matchPERM() argument
[all...]
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp4070 optimizeSetCCOfSignedTruncationCheck(EVT SCCVT,SDValue N0,SDValue N1,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCOfSignedTruncationCheck() argument
4155 optimizeSetCCByHoistingAndByConstFromLogicalShift(EVT SCCVT,SDValue N0,SDValue N1C,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCByHoistingAndByConstFromLogicalShift() argument
4450 SimplifySetCC(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,bool foldBooleans,DAGCombinerInfo & DCI,const SDLoc & dl) const SimplifySetCC() argument
6606 buildUREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const buildUREMEqFold() argument
6622 prepareUREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL,SmallVectorImpl<SDNode * > & Created) const prepareUREMEqFold() argument
6846 buildSREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const buildSREMEqFold() argument
6863 prepareSREMEqFold(EVT SETCCVT,SDValue REMNode,SDValue CompTargetNode,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL,SmallVectorImpl<SDNode * > & Created) const prepareSREMEqFold() argument
[all...]
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp13392 performADDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performADDCombine() argument
13658 performANDCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performANDCombine() argument
13731 performORCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performORCombine() argument
13832 expandMul(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) expandMul() argument
14021 performMULCombine(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performMULCombine() argument
14914 combineBinOp_VLToVWBinOp_VL(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) combineBinOp_VLToVWBinOp_VL() argument
15054 performVWADDSUBW_VLCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performVWADDSUBW_VLCombine() argument
15128 performMemPairCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI) performMemPairCombine() argument
15215 performFP_TO_INTCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performFP_TO_INTCombine() argument
15318 performFP_TO_INT_SATCombine(SDNode * N,TargetLowering::DAGCombinerInfo & DCI,const RISCVSubtarget & Subtarget) performFP_TO_INT_SATCombine() argument
16298 legalizeScatterGatherIndexType(SDLoc DL,SDValue & Index,ISD::MemIndexType & IndexType,RISCVTargetLowering::DAGCombinerInfo & DCI) legalizeScatterGatherIndexType() argument
[all...]
/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp3617 combineADDX(SDNode * N,SelectionDAG & DAG,TargetLowering::DAGCombinerInfo & DCI) combineADDX() argument
/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6534 combineExtract(const SDLoc & DL,EVT ResVT,EVT VecVT,SDValue Op,unsigned Index,DAGCombinerInfo & DCI,bool Force) const combineExtract() argument
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