[BOLT][AArch64] Handle gold linker veneers

The gold linker veneers are written between functions without symbols,
so we to handle it specially in BOLT.

Vladislav Khmelevsky,
Advanced Software Techn

[BOLT][AArch64] Handle gold linker veneers

The gold linker veneers are written between functions without symbols,
so we to handle it specially in BOLT.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D128082

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[BOLT][NFC] Use range-based STL wrappers

Replace `std::` algorithms taking begin/end iterators with `llvm::` counterparts
accepting ranges.

Reviewed By: rafauler

Differential Revision: https://rev

[BOLT][NFC] Use range-based STL wrappers

Replace `std::` algorithms taking begin/end iterators with `llvm::` counterparts
accepting ranges.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D128154

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[BOLT] Allow function fragments to point to one jump table

Resolve a crash related to split functions

Due to split function optimization, a function can be divided to two

fragments, and both fragm

[BOLT] Allow function fragments to point to one jump table

Resolve a crash related to split functions

Due to split function optimization, a function can be divided to two

fragments, and both fragments can access same jump table. This
violates 
the assumption that a jump table can only have one parent
function, 
which causes a crash during instrumentation.

We want to support the case: different functions cannot access same
jump tables, but different fragments of same function can!

As all fragments are from same function, we point JT::Parent to one
specific fragment. Right now it is the first disassembled fragment, but
we can point it to the function's main fragment later.

Functions are disassembled sequentially. Previously, at the end of
processing a function, JT::OffsetEntries is cleared, so other fragment
can no longer reuse JT::OffsetEntries. To extend the support for split
function, we only clear JT::OffsetEntries after all functions are
disassembled.

Let say A.hot and A.cold access JT of three targets {X, Y, Z}, where
X and Y are in A.hot, and Z is in A.cold. Suppose that A.hot is
disassembled first, JT::OffsetEntries = {X',Y',INVALID_OFFSET}. When
A.cold is disassembled, it cannot reuse JT::OffsetEntries above due to
different fragment start. A simple solution:
A.hot = {X',Y',INVALID_OFFSET}
A.cold = {INVALID_OFFSET, INVALID_OFFSET, INVALID_OFFSET}

We update the assertion to allow different fragments of same function
to get the same JumpTable object.

Potential improvements:
A.hot = {X',Y',INVALID_OFFSET}
A.cold = {INVALID_OFFSET, INVALID_OFFSET, Z'}
The main issue is A.hot and A.cold have separate CFGs, thus jump table
targets are still constrained within fragment bounds.

Future improvements:
A.hot = {X, Y, Z}
A.cold = {X, Y, Z}

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D127924

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[BOLT][NFCI] Refactor interface for adding basic blocks

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D127935

[BOLT][AArch64] Handle data at the beginning of a function when disassembling and building CFG.

This patch adds getFirstInstructionOffset method for BinaryFunction
which is used to properly handle c

[BOLT][AArch64] Handle data at the beginning of a function when disassembling and building CFG.

This patch adds getFirstInstructionOffset method for BinaryFunction
which is used to properly handle cases where data is at zero offset in
a function. The main change is that we add basic block at first
instruction offset when disassembling, which prevents assertion
failures in buildCFG.

Reviewed By: yota9, rafauler

Differential Revision: https://reviews.llvm.org/D127111

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[bolt] Remove unneeded cl::ZeroOrMore for cl::opt options

[BOLT][NFC] Use colors in CFG dumps

Use color coding to distinguish nodes:
- Entry nodes have bold border
- Scalar (non-loopy) code is milk white
- Outer loops are light yellow
- Innermost loops are

[BOLT][NFC] Use colors in CFG dumps

Use color coding to distinguish nodes:
- Entry nodes have bold border
- Scalar (non-loopy) code is milk white
- Outer loops are light yellow
- Innermost loops are light blue

`-print-loops` needs to be enabled to provide BinaryLoopInfo.
Examples:
{F23170673}
{F23170680}

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126248

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[BOLT][NFC] Print block instructions in dumpGraph as part of node label

Reuse the option `-dot-tooltip-code` to put block instructions into the label.
This way, the instructions are displayed by def

[BOLT][NFC] Print block instructions in dumpGraph as part of node label

Reuse the option `-dot-tooltip-code` to put block instructions into the label.
This way, the instructions are displayed by default when used with dot viewer.

When the .dot file is used with dot2html, instructions are hidden by default,
and are shown by clicking on a node.

{F23169510}

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126237

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[BOLT][NFC] Remove unused variable

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D126808

[BOLT] Add new class for symbolizing X86 instructions

Summary:
While disassembling instructions, we need to replace certain immediate
operands with symbols. This symbolizing process relies on readin

[BOLT] Add new class for symbolizing X86 instructions

Summary:
While disassembling instructions, we need to replace certain immediate
operands with symbols. This symbolizing process relies on reading
relocations against instructions. However, some X86 instructions can
have multiple immediate operands and up to two relocations against
them. Thus, correctly matching a relocation to an operand is not
always possible without knowing the operand offset within the
instruction.

Luckily, LLVM provides an interface for passing the required info from
the disassembler via a virtual MCSymbolizer class. Creating a
target-specific version allows a precise matching of relocations to
operands.

This diff adds X86MCSymbolizer class that performs X86-specific
symbolizing (currently limited to non-branch instructions).

Reviewers: yota9, Amir, ayermolo, rafauler, zr33

Differential Revision: https://reviews.llvm.org/D120928

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[BOLT] [AArch64] Handle constant islands spanning multiple functions

Fix BOLT's constant island mapping when a constant island marked by $d
spans multiple functions. Currently, because BOLT only mar

[BOLT] [AArch64] Handle constant islands spanning multiple functions

Fix BOLT's constant island mapping when a constant island marked by $d
spans multiple functions. Currently, because BOLT only marks the
constant island in the first function where $d is located, if the next
function contains data at its start, BOLT will miss the data and try
to disassemble it. This patch adds code to explicitly go through all
symbols between $d and $x markers and mark their respective offsets as
data, which stops BOLT from trying to disassemble data. It also adds
MarkerType enum and refactors related functions.

Reviewed By: yota9, rafauler

Differential Revision: https://reviews.llvm.org/D126177

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[BOLT][NFC] Use ListSeparator in BinaryFunction print methods

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126243

[BOLT][NFC] Use for_each to simplify printLoopInfo

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126242

[BOLT][NFC] Move BinaryDominatorTree out of BinaryLoop header

Split up the BinaryLoop header and move BinaryDominatorTree into its own header,
preparing it for a standalone use.

Reviewed By: rafaul

[BOLT][NFC] Move BinaryDominatorTree out of BinaryLoop header

Split up the BinaryLoop header and move BinaryDominatorTree into its own header,
preparing it for a standalone use.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D125664

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[BOLT][NFC] Use refs for loop variables to avoid copies

Addresses warnings when built with Apple Clang.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D125483

[BOLT][NFC] Suppress unused variable warnings

Address warnings in Release build without assertions.
Tip @tschuett for reporting the issue #55404.

Reviewed By: rafauler

Differential Revision: https

[BOLT][NFC] Suppress unused variable warnings

Address warnings in Release build without assertions.
Tip @tschuett for reporting the issue #55404.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D125475

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[BOLT][NFC] Add MCPlus::primeOperands iterator_range

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D125397

[BOLT] Support PC-relative relocations with addends

PC-relative memory operand could reference a different object from
the one located at the target address, e.g. when a negative offset
is used. Che

[BOLT] Support PC-relative relocations with addends

PC-relative memory operand could reference a different object from
the one located at the target address, e.g. when a negative offset
is used. Check relocations for the real referenced object.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D120379

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[BOLT] Make order of jump table successors deterministic

When a jump table is recovered in postProcessIndirectBranches(),
successors for the containing basic block are added in random order.
Make th

[BOLT] Make order of jump table successors deterministic

When a jump table is recovered in postProcessIndirectBranches(),
successors for the containing basic block are added in random order.
Make the order deterministic.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D119672

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Add missing MC includes in bolt/

Changes needed after ef736a1c39f27ef4 that removes some implicit
dependencies from MrCV headers.

[BOLT][NFC] Reduce includes with include-what-you-use

Summary: Removed redundant includes with IWYU

Test Plan: ninja bolt

Reviewers: maksfb

FBD32043568

[BOLT][NFC] Expand auto types pt.2

Summary: Expand autos where it may lead to differences in the BOLT binary.

Test Plan: NFC

Reviewers: maksfb

Reviewed By: maks

FBD27673231

[BOLT] Remove unreachable uncond branch after return

This patch fixes the removal of unreachable uncondtional branch located
after return instruction.

Vladislav Khmelevsky,
Advanced Software Techno

[BOLT] Remove unreachable uncond branch after return

This patch fixes the removal of unreachable uncondtional branch located
after return instruction.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D117677

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[BOLT][NFC] Move Offset annotation to Group 1

Summary:
Move the annotation to avoid dynamic memory allocations.
Improves the CPU time of instrumenting a large binary by 1% (+-0.8%, p-value 0.01)

Te

[BOLT][NFC] Move Offset annotation to Group 1

Summary:
Move the annotation to avoid dynamic memory allocations.
Improves the CPU time of instrumenting a large binary by 1% (+-0.8%, p-value 0.01)

Test Plan: NFC

Reviewers: maksfb

FBD30091656

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[BOLTCore] [NFC] Fix braces usages according to LLVM

Summary:
Fix according to Coding Standards doc, section Don't Use
Braces on Simple Single-Statement Bodies of if/else/loop Statements.
This set o

[BOLTCore] [NFC] Fix braces usages according to LLVM

Summary:
Fix according to Coding Standards doc, section Don't Use
Braces on Simple Single-Statement Bodies of if/else/loop Statements.
This set of changes applies to lib Core only.

(cherry picked from FBD33240028)

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