simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo

llvm-svn: 114397

chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396

Check bb to ensure that alloca is in separate basic block.
This fixes funcargs.exp regression reported by gdb testsuite.

llvm-svn: 113992

If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also c

If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info.

llvm-svn: 113967

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Added skeleton for inline asm multiple alternative constraint support.

llvm-svn: 113766

Detect undef value early and save unnecessary NodeMap query.

llvm-svn: 112864

Tidy up.

llvm-svn: 112858

Reapply r112623. Included additional check for unused byval argument.

llvm-svn: 112659

Revert r112623. It is causing self host build failures.

llvm-svn: 112631

Remember byval argument's frame index during argument lowering and use this info to emit debug info.
Fixes Radar 8367011.

llvm-svn: 112623

Offset is not always unsigned number.

llvm-svn: 112584

remove unions from LLVM IR. They are severely buggy and not
being actively maintained, improved, or extended.

llvm-svn: 112356

Completely disable tail calls when fast-isel is enabled, as fast-isel
doesn't currently support dealing with this.

llvm-svn: 112341

Simplify.

llvm-svn: 112305

Revert r112213. It is not needed.

llvm-svn: 112242

If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter.

llvm-svn: 112238

Speculatively revert r112207.

llvm-svn: 112216

80 col.

llvm-svn: 112215

Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.

llvm-svn: 112213

Donot forget to resolve dangling debug info in a case where virtual register, used for a value, is initialized after a dbg intrinsic is seen.

llvm-svn: 112207

zap dead code.

llvm-svn: 112155

Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This
affects two places in the code: handling cross bloc

Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This
affects two places in the code: handling cross block values and handling
function return and arguments. Since vectors are already widened by
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.

For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
%C = fadd <2 x float> %B, %B
br label %BB
BB:
%D = fadd <2 x float> %C, %C
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
ret <4 x float> %E
}

Now compiles into:

_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
addps %xmm0, %xmm0
ret

previously it compiled into:

_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
pshufd $1, %xmm0, %xmm1
## kill: XMM0<def> XMM0<kill> XMM0<def>
insertps $0, %xmm0, %xmm0
insertps $16, %xmm1, %xmm0
addps %xmm0, %xmm0
ret

This implements rdar://8230384

llvm-svn: 112101

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Remove dead argument.

llvm-svn: 112085

split the vector case of getCopyFromParts out to its own function,
no functionality change.

llvm-svn: 111994

split the vector case out of getCopyToParts into its own function. No
functionality change.

llvm-svn: 111990