/llvm-project/llvm/unittests/CodeGen/ |
H A D | SelectionDAGPatternMatchTest.cpp | 221 SDValue SetCC = DAG->getSetCC(DL, Int32VT, Arg0, Const3, ISD::SETULT); TEST_F() local
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/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1309 Lo = DAG.getSelect(dl, MVT::i32, SetCC, Hi, Lo); in LowerSRL_PARTS() local 1261 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); LowerSHL_PARTS() local
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 888 SDValue SetCC = Expand() local
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H A D | DAGCombiner.cpp | 2552 SDValue SetCC = Z.getOperand(0); foldAddSubBoolOfMaskedVal() local 9488 SDValue SetCC = visitXOR() local 13197 SDValue SetCC = VSel.getOperand(0); matchVSelectOpSizesWithSetCC() local 13377 SDValue SetCC = N->getOperand(0); foldExtendedSignBitTest() local 13525 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N00, N01, CC); foldSextSetcc() local [all...] |
H A D | TargetLowering.cpp | 10813 SDValue SetCC; expandUADDSUBO() local 10853 SDValue SetCC = DAG.getSetCC(dl, OType, Result, Sat, ISD::SETNE); expandSADDSUBO() local [all...] |
H A D | LegalizeIntegerTypes.cpp | 1344 SDValue SetCC; PromoteIntRes_SETCC() local
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H A D | SelectionDAGBuilder.cpp | 7941 SDValue SetCC = DAG.getSetCC(sdl, CCVT, VectorInduction, visitIntrinsicCall() local
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/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 984 SDValue SetCC = N->getOperand(0); performVSELECTCombine() local
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H A D | MipsISelLowering.cpp | 701 SDValue SetCC = N->getOperand(0); performSELECTCombine() local [all...] |
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 24035 SDValue SetCC = getSETCC(Cond, Overflow, DL, DAG); LowerXALUO() local 25967 SDValue SetCC; LowerINTRINSIC_WO_CHAIN() local 26119 SDValue SetCC = getSETCC(X86::COND_B, Res.getValue(1), dl, DAG); LowerINTRINSIC_WO_CHAIN() local 26276 SDValue SetCC = getSETCC(X86CC, Test, dl, DAG); LowerINTRINSIC_WO_CHAIN() local 26338 SDValue SetCC = getSETCC(X86CC, PCMP, dl, DAG); LowerINTRINSIC_WO_CHAIN() local 26906 SDValue SetCC = getSETCC(X86::COND_B, Operation.getValue(0), dl, DAG); LowerINTRINSIC_W_CHAIN() local 26927 SDValue SetCC = getSETCC(X86::COND_E, Operation.getValue(0), dl, DAG); LowerINTRINSIC_W_CHAIN() local 27017 SDValue SetCC = getSETCC(X86::COND_B, Operation.getValue(0), dl, DAG); LowerINTRINSIC_W_CHAIN() local 27252 SDValue SetCC = getSETCC(X86::COND_NE, InTrans, dl, DAG); LowerINTRINSIC_W_CHAIN() local 31861 SDValue SetCC = getSETCC(IsSigned ? X86::COND_O : X86::COND_B, LowerADDSUBO_CARRY() local 46522 SDValue SetCC; checkBoolTestSetCCCombine() local 49589 SDValue SetCC = N->getOperand(0); combineX86SubCmpForFlags() local 49796 if (SDValue SetCC = combineAndOrForCcmpCtest(N, DAG, DCI, Subtarget)) combineAnd() local 50584 if (SDValue SetCC = combineAndOrForCcmpCtest(N, DAG, DCI, Subtarget)) combineOr() local 52940 if (SDValue SetCC = foldXor1SetCC(N, DAG)) combineXor() local 55760 SDValue SetCC = Op1.getOperand(0); combineSubSetcc() local 55786 SDValue SetCC = Sub.getOperand(1); combineX86CloadCstore() local [all...] |
/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 2179 SDValue SetCC = in LowerSETCC() local
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/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 4340 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); lowerXALUO() local 4438 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); lowerUADDSUBO_CARRY() local
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 3129 SDValue SetCC = DAG.getNode(ISD::SETCC, dl, ResTy, WidenHvxSetCC() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 6040 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, lowerICMPIntrinsic() local 6069 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, lowerFCMPIntrinsic() local 6551 SDNode *SetCC = nullptr; LowerBRCOND() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 18789 SDValue SetCC = N->getOperand(0); performANDSETCCCombine() local 21344 const SDValue SetCC = N->getOperand(0); performSignExtendSetCCCombine() local 23957 SDValue SetCC = N->getOperand(0); trySwapVSelectOperands() local 24004 SDValue SetCC = N->getOperand(0); performVSelectCombine() local 24113 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); performSelectCombine() local [all...] |
/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5544 SDValue SetCC = lowerVPCttzElements() local 6961 SDValue SetCC = DAG.getSetCC( LowerOperation() local 9768 SDValue SetCC = DAG.getSetCC(DL, XLenVT, Vec, Zero, CC); lowerVectorMaskVecReduction() local [all...] |
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 13230 SDValue SetCC; PerformSELECTCombine() local
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