Lines Matching defs:SetCC

19534   SDValue SetCC = N->getOperand(0);
19546   if (SetCC.getOpcode() == ISD::SETCC &&
19547       SetCC.getOperand(0).getValueType() == MVT::f32) {
20288 /// Helper structure to keep track of SetCC information.
20294 /// Helper structure to be able to read SetCC information.  If set to
22306   const SDValue SetCC = N->getOperand(0);
22308   const SDValue CCOp0 = SetCC.getOperand(0);
22309   const SDValue CCOp1 = SetCC.getOperand(1);
22315       cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get();
22320   if (isCheapToExtend(SetCC.getOperand(0)) &&
22321       isCheapToExtend(SetCC.getOperand(1))) {
22328         SDLoc(SetCC), N->getValueType(0), Ext1, Ext2,
22329         cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get());
24901 // Try to re-use an already extended operand of a vector SetCC feeding a
24910   // the result type has a larger element type than the SetCC operand.
25260   SDValue SetCC = N->getOperand(0);
25261   if (SetCC.getOpcode() != ISD::SETCC || !SetCC.hasOneUse())
25275   ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
25277       ISD::getSetCCInverse(CC, SetCC.getOperand(0).getValueType());
25279       DAG.getSetCC(SDLoc(SetCC), SetCC.getValueType(), SetCC.getOperand(0),
25280                    SetCC.getOperand(1), InverseCC);
25307   SDValue SetCC = N->getOperand(0);
25308   if (SetCC.getOpcode() == ISD::SETCC &&
25309       SetCC.getOperand(2) == DAG.getCondCode(ISD::SETGT)) {
25310     SDValue CmpLHS = SetCC.getOperand(0);
25312     SDNode *CmpRHS = SetCC.getOperand(1).getNode();
25351   SetCC = DAG.getSetCC(SDLoc(N), CmpVT.changeVectorElementTypeToInteger(),
25354   return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC,
25416   SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2));
25420   SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask);