| /llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| H A D | WebAssemblyMCTargetDesc.h | 148 GetDefaultP2AlignAny(unsigned Opc) GetDefaultP2AlignAny() argument
279 GetDefaultP2Align(unsigned Opc) GetDefaultP2Align() argument
287 isConst(unsigned Opc) isConst() argument
315 isScalarConst(unsigned Opc) isScalarConst() argument
331 isArgument(unsigned Opc) isArgument() argument
367 isCopy(unsigned Opc) isCopy() argument
391 isTee(unsigned Opc) isTee() argument
415 isCallDirect(unsigned Opc) isCallDirect() argument
427 isCallIndirect(unsigned Opc) isCallIndirect() argument
439 isBrTable(unsigned Opc) isBrTable() argument
451 isMarker(unsigned Opc) isMarker() argument
471 isCatch(unsigned Opc) isCatch() argument
483 isLocalGet(unsigned Opc) isLocalGet() argument
507 isLocalSet(unsigned Opc) isLocalSet() argument
531 isLocalTee(unsigned Opc) isLocalTee() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 584 Opc argument
591 isVPTOpcode(int Opc) isVPTOpcode() argument
660 isCondBranchOpcode(int Opc) isCondBranchOpcode() argument
664 isJumpTableBranchOpcode(int Opc) isJumpTableBranchOpcode() argument
671 isIndirectBranchOpcode(int Opc) isIndirectBranchOpcode() argument
676 int Opc = MI.getOpcode(); isIndirectCall() local
730 isSpeculationBarrierEndBBOpcode(int Opc) isSpeculationBarrierEndBBOpcode() argument
737 isPopOpcode(int Opc) isPopOpcode() argument
743 isPushOpcode(int Opc) isPushOpcode() argument
748 isSubImmOpcode(int Opc) isSubImmOpcode() argument
755 isMovRegOpcode(int Opc) isMovRegOpcode() argument
782 unsigned Opc = MI.getOpcode(); isSEHInstruction() local
[all...] |
| H A D | ARMFastISel.cpp | 422 unsigned Opc; ARMMaterializeFP() local
443 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; ARMMaterializeFP() local
461 unsigned Opc = isThumb2 ? ARM::t2MOVi16 : ARM::MOVi16; ARMMaterializeInt() local
477 unsigned Opc = isThumb2 ? ARM::t2MVNi : ARM::MVNi; ARMMaterializeInt() local
545 unsigned Opc; ARMMaterializeGV() local
574 unsigned Opc = IsPositionIndependent ? ARM::t2LDRpci_pic : ARM::t2LDRpci; ARMMaterializeGV() local
590 unsigned Opc = IsIndirect ? ARM::PICLDR : ARM::PICADD; ARMMaterializeGV() local
656 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; fastMaterializeAlloca() local
834 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; ARMSimplifyAddress() local
901 unsigned Opc; ARMEmitLoad() local
1050 unsigned Opc = isThumb2 ? ARM::t2ANDri : ARM::ANDri; ARMEmitStore() local
1324 unsigned Opc = isThumb2 ? ARM::tBRIND : ARM::BX; SelectIndirectBr() local
1556 unsigned Opc; SelectIToFP() local
1581 unsigned Opc; SelectFPToI() local
1744 unsigned Opc; SelectBinaryIntOp() local
1795 unsigned Opc; SelectBinaryFPOp() local
2636 uint32_t Opc : 16; ARMEmitIntExt() member
2695 unsigned Opc = ITP->Opc; ARMEmitIntExt() local
2782 unsigned Opc = ARM::MOVsr; SelectShift() local
2900 uint16_t Opc[2]; // ARM, Thumb. global() member
2973 unsigned Opc = isThumb2 ? ARM::t2LDRpci : ARM::LDRcp; ARMLowerPICELF() local
[all...] |
| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 161 static bool isI32CondBranchOpcode(int Opc) { in isUncondBranchOpcode() argument
163 Opc == SP::BPICCNT || Opc == SP::BPICCANT; in isI32CondBranchOpcode() argument
168 isI64CondBranchOpcode(int Opc) isI64CondBranchOpcode() argument
173 isRegCondBranchOpcode(int Opc) isRegCondBranchOpcode() argument
178 isFCondBranchOpcode(int Opc) isFCondBranchOpcode() argument
183 isCondBranchOpcode(int Opc) isCondBranchOpcode() argument
188 isIndirectBranchOpcode(int Opc) isIndirectBranchOpcode() argument
194 unsigned Opc = LastInst->getOpcode(); parseCondBranch() local
346 unsigned Opc = Cond[0].getImm(); insertBranch() local
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.h | 30 unsigned Opc; variable
34 Inst(unsigned Opc, int64_t I) : Opc(Opc), Imm(I) { in Inst() argument
|
| /llvm-project/llvm/include/llvm/IR/ |
| H A D | NoFolder.h | 48 Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS, in FoldBinOp()
53 Value *FoldExactBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldExactBinOp()
58 Value *FoldNoWrapBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldNoWrapBinOp()
63 Value *FoldBinOpFMF(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldBinOpFMF()
68 Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V, in FoldUnOpFMF()
|
| H A D | ConstantFolder.h | 43 Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS, in FoldBinOp()
55 Value *FoldExactBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldExactBinOp()
68 Value *FoldNoWrapBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldNoWrapBinOp()
86 Value *FoldBinOpFMF(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldBinOpFMF()
91 Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V, in FoldUnOpFMF()
|
| /llvm-project/llvm/include/llvm/Analysis/ |
| H A D | InstSimplifyFolder.h | 50 FoldBinOp(Instruction::BinaryOps Opc,Value * LHS,Value * RHS) FoldBinOp() argument
55 FoldExactBinOp(Instruction::BinaryOps Opc,Value * LHS,Value * RHS,bool IsExact) FoldExactBinOp() argument
60 FoldNoWrapBinOp(Instruction::BinaryOps Opc,Value * LHS,Value * RHS,bool HasNUW,bool HasNSW) FoldNoWrapBinOp() argument
65 FoldBinOpFMF(Instruction::BinaryOps Opc,Value * LHS,Value * RHS,FastMathFlags FMF) FoldBinOpFMF() argument
70 FoldUnOpFMF(Instruction::UnaryOps Opc,Value * V,FastMathFlags FMF) FoldUnOpFMF() argument
[all...] |
| H A D | TargetFolder.h | 54 Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS, in FoldBinOp()
66 Value *FoldExactBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldExactBinOp()
79 Value *FoldNoWrapBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldNoWrapBinOp()
97 Value *FoldBinOpFMF(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldBinOpFMF()
110 Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V, in FoldUnOpFMF()
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CompressEVEX.cpp | 119 switch (Opc) { in performCustomAdjustments() local
188 __anon6ac48eb80302(unsigned &Opc) CompressEVEXImpl() argument
225 unsigned Opc = MI.getOpcode(); CompressEVEXImpl() local
230 __anon6ac48eb80402(unsigned Opc) CompressEVEXImpl() argument
[all...] |
| H A D | X86FastISel.cpp | 333 unsigned Opc = 0; X86FastEmitLoad() local
490 unsigned Opc = 0; X86FastEmitStore() local
661 unsigned Opc = 0; X86FastEmitStore() local
699 X86FastEmitExtend(ISD::NodeType Opc,EVT DstVT,unsigned Src,EVT SrcVT,unsigned & ResultReg) X86FastEmitExtend() argument
768 unsigned Opc = 0; handleConstantAddresses() local
2136 unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(*RC) / 8, false, X86FastEmitCMoveSelect() local
2250 const uint16_t *Opc = nullptr; X86FastEmitSSESelect() local
2273 unsigned Opc; X86FastEmitPseudoSelect() local
2489 unsigned Opc = X86SelectFPExt() local
2503 unsigned Opc = X86SelectFPTrunc() local
2617 unsigned Opc = Subtarget->hasVLX() ? X86::VCVTPS2PHZ128rr fastLowerIntrinsicCall() local
2640 unsigned Opc = Subtarget->hasVLX() ? X86::VCVTPH2PSZ128rr fastLowerIntrinsicCall() local
2666 unsigned Opc; fastLowerIntrinsicCall() local
2808 unsigned Opc; fastLowerIntrinsicCall() local
2895 static const uint16_t Opc[2][4] = { fastLowerIntrinsicCall() local
2997 unsigned Opc; fastLowerIntrinsicCall() local
3043 unsigned Opc; fastLowerIntrinsicCall() local
3617 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64; fastLowerCall() local
3750 unsigned Opc = 0; X86MaterializeInt() local
3783 unsigned Opc = 0; X86MaterializeFP() local
3872 unsigned Opc = X86MaterializeGV() local
3899 unsigned Opc = 0; fastMaterializeConstant() local
3942 unsigned Opc = fastMaterializeAlloca() local
3962 unsigned Opc = 0; fastMaterializeFloatZero() local
[all...] |
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCFGOptimizer.cpp | 62 switch (Opc) { in IsConditionalBranch() argument
77 return (Opc == Hexagon::J2_jump); in IsUnconditionalJump() argument
126 if (IsConditionalBranch(Opc)) { in runOnMachineFunction() local
|
| H A D | HexagonGenPredicate.cpp | 144 unsigned HexagonGenPredicate::getPredForm(unsigned Opc) { in getPredForm()
189 unsigned Opc = MI->getOpcode(); in isConvertibleToPredForm() local
210 unsigned Opc = MI.getOpcode(); in collectPredicateGPR() local
256 unsigned Opc = DefI->getOpcode(); in getPredRegFor() local
285 bool HexagonGenPredicate::isScalarCmp(unsigned Opc) { in isScalarCmp()
370 unsigned Opc = MI->getOpcode(); in convertToPredForm() local
|
| H A D | HexagonGenMemAbsolute.cpp | 217 switch (Opc) { in isValidIndexedLoad() argument
246 switch (Opc) { in isValidIndexedStore() argument
96 int Opc = MI->getOpcode(); runOnMachineFunction() local
|
| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyExplicitLocals.cpp | 317 unsigned Opc = getLocalGetOpcode(RC); in runOnMachineFunction() local
327 unsigned Opc = getLocalTeeOpcode(RC); in runOnMachineFunction() local
348 unsigned Opc = getDropOpcode(RC); in runOnMachineFunction() local
358 unsigned Opc = getLocalSetOpcode(RC); in runOnMachineFunction() local
418 unsigned Opc = getLocalGetOpcode(RC); in runOnMachineFunction() local
[all...] |
| H A D | WebAssemblyFastISel.cpp | 393 unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 materializeLoadStoreOperands() local
613 unsigned Opc = fastMaterializeAlloca() local
632 unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 fastMaterializeConstant() local
670 unsigned Opc; fastLowerArguments() local
784 unsigned Opc = IsDirect ? WebAssembly::CALL : WebAssembly::CALL_INDIRECT; selectCall() local
932 unsigned Opc; selectSelect() local
1037 unsigned Opc; selectICmp() local
1106 unsigned Opc; selectFCmp() local
1205 unsigned Opc; selectLoad() local
1264 unsigned Opc; selectStore() local
1325 unsigned Opc = WebAssembly::BR_IF; selectBr() local
[all...] |
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CSEConfigBase.h | 23 virtual bool shouldCSEOpc(unsigned Opc) { return false; } in shouldCSEOpc()
|
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 47 (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) { in isLoadFromStackSlot() local
69 (Opc in isStoreToStackSlot() local
87 unsigned Opc = 0, ZeroReg = 0; copyPhysReg() local
222 unsigned Opc = 0; storeRegToStack() local
295 unsigned Opc = 0; loadRegFromStack() local
376 unsigned Opc; expandPostRAPseudo() local
575 unsigned Opc = ABI.GetPtrAdduOp(); adjustStackPtr() local
680 compareOpndSize(unsigned Opc,const MachineFunction & MF) const compareOpndSize() argument
[all...] |
| H A D | Mips16InstrInfo.cpp | 73 unsigned Opc = 0; copyPhysReg() local
115 unsigned Opc = 0; storeRegToStack() local
133 unsigned Opc = 0; loadRegFromStack() local
219 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16; makeFrame() local
249 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? restoreFrame() local
[all...] |
| /llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCFrameLowering.cpp | 137 unsigned Opc = ARC::SUB_rrlimm; emitPrologue() local
254 unsigned Opc = ARC::SUB_rrlimm; emitEpilogue() local
282 unsigned Opc = ARC::ADD_rrlimm; emitEpilogue() local
297 unsigned Opc = ARC::ADD_rrlimm; emitEpilogue() local
324 unsigned Opc = ARC::ADD_rrlimm; emitEpilogue() local
454 unsigned Opc; emitRegUpdate() local
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCTRLoopsVerify.cpp | 173 Opc == PPC::BDZ8 || Opc == PPC::BDZ) in runOnMachineFunction() local
115 unsigned Opc = I->getOpcode(); verifyCTRBranch() local
|
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.cpp | 113 profileEverything(unsigned Opc,ArrayRef<DstOp> DstOps,ArrayRef<SrcOp> SrcOps,std::optional<unsigned> Flags,GISelInstProfileBuilder & B) const profileEverything() argument
175 buildInstr(unsigned Opc,ArrayRef<DstOp> DstOps,ArrayRef<SrcOp> SrcOps,std::optional<unsigned> Flag) buildInstr() argument
330 constexpr unsigned Opc = TargetOpcode::G_CONSTANT; buildConstant() local
357 constexpr unsigned Opc = TargetOpcode::G_FCONSTANT; buildFConstant() local
[all...] |
| /llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMatInt.h | 18 unsigned Opc; member
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionOptimizer.cpp | 218 static int getComplementOpc(int Opc) { in getComplementOpc()
245 unsigned Opc = CmpMI->getOpcode(); in adjustCmp() local
274 unsigned Opc; in modifyCmp() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 281 const MIMGInfo *Info = getMIMGInfo(Opc); in getMIMGBaseOpcode() argument
286 const MIMGInfo *OrigInfo = getMIMGInfo(Opc); in getMaskedMIMGOp() argument
432 int getMTBUFBaseOpcode(unsigned Opc) { in getMTBUFElements() argument
442 int getMTBUFElements(unsigned Opc) { in getMTBUFHasSrsrc() argument
447 bool getMTBUFHasVAddr(unsigned Opc) { in getMTBUFHasSoffset() argument
422 getMTBUFBaseOpcode(unsigned Opc) getMTBUFBaseOpcode() argument
437 getMTBUFHasVAddr(unsigned Opc) getMTBUFHasVAddr() argument
452 getMUBUFBaseOpcode(unsigned Opc) getMUBUFBaseOpcode() argument
462 getMUBUFElements(unsigned Opc) getMUBUFElements() argument
467 getMUBUFHasVAddr(unsigned Opc) getMUBUFHasVAddr() argument
472 getMUBUFHasSrsrc(unsigned Opc) getMUBUFHasSrsrc() argument
477 getMUBUFHasSoffset(unsigned Opc) getMUBUFHasSoffset() argument
482 getMUBUFIsBufferInv(unsigned Opc) getMUBUFIsBufferInv() argument
487 getMUBUFTfe(unsigned Opc) getMUBUFTfe() argument
492 getSMEMIsBuffer(unsigned Opc) getSMEMIsBuffer() argument
497 getVOP1IsSingle(unsigned Opc) getVOP1IsSingle() argument
502 getVOP2IsSingle(unsigned Opc) getVOP2IsSingle() argument
507 getVOP3IsSingle(unsigned Opc) getVOP3IsSingle() argument
512 isVOPC64DPP(unsigned Opc) isVOPC64DPP() argument
516 isVOPCAsmOnly(unsigned Opc) isVOPCAsmOnly() argument
518 getMAIIsDGEMM(unsigned Opc) getMAIIsDGEMM() argument
523 getMAIIsGFX940XDL(unsigned Opc) getMAIIsGFX940XDL() argument
536 getCanBeVOPD(unsigned Opc) getCanBeVOPD() argument
544 getVOPDOpcode(unsigned Opc) getVOPDOpcode() argument
549 isVOPD(unsigned Opc) isVOPD() argument
553 isMAC(unsigned Opc) isMAC() argument
576 isPermlane16(unsigned Opc) isPermlane16() argument
587 isCvt_F32_Fp8_Bf8_e64(unsigned Opc) isCvt_F32_Fp8_Bf8_e64() argument
598 isGenericAtomic(unsigned Opc) isGenericAtomic() argument
618 isTrue16Inst(unsigned Opc) isTrue16Inst() argument
623 isInvalidSingleUseConsumerInst(unsigned Opc) isInvalidSingleUseConsumerInst() argument
628 isInvalidSingleUseProducerInst(unsigned Opc) isInvalidSingleUseProducerInst() argument
633 mapWMMA2AddrTo3AddrOpcode(unsigned Opc) mapWMMA2AddrTo3AddrOpcode() argument
638 mapWMMA3AddrTo2AddrOpcode(unsigned Opc) mapWMMA3AddrTo2AddrOpcode() argument
[all...] |