Lines Matching defs:Opc

280 const MIMGBaseOpcodeInfo *getMIMGBaseOpcode(unsigned Opc) {
281 const MIMGInfo *Info = getMIMGInfo(Opc);
285 int getMaskedMIMGOp(unsigned Opc, unsigned NewChannels) {
286 const MIMGInfo *OrigInfo = getMIMGInfo(Opc);
432 int getMTBUFBaseOpcode(unsigned Opc) {
433 const MTBUFInfo *Info = getMTBUFInfoFromOpcode(Opc);
442 int getMTBUFElements(unsigned Opc) {
443 const MTBUFInfo *Info = getMTBUFOpcodeHelper(Opc);
447 bool getMTBUFHasVAddr(unsigned Opc) {
448 const MTBUFInfo *Info = getMTBUFOpcodeHelper(Opc);
452 bool getMTBUFHasSrsrc(unsigned Opc) {
453 const MTBUFInfo *Info = getMTBUFOpcodeHelper(Opc);
457 bool getMTBUFHasSoffset(unsigned Opc) {
458 const MTBUFInfo *Info = getMTBUFOpcodeHelper(Opc);
462 int getMUBUFBaseOpcode(unsigned Opc) {
463 const MUBUFInfo *Info = getMUBUFInfoFromOpcode(Opc);
472 int getMUBUFElements(unsigned Opc) {
473 const MUBUFInfo *Info = getMUBUFOpcodeHelper(Opc);
477 bool getMUBUFHasVAddr(unsigned Opc) {
478 const MUBUFInfo *Info = getMUBUFOpcodeHelper(Opc);
482 bool getMUBUFHasSrsrc(unsigned Opc) {
483 const MUBUFInfo *Info = getMUBUFOpcodeHelper(Opc);
487 bool getMUBUFHasSoffset(unsigned Opc) {
488 const MUBUFInfo *Info = getMUBUFOpcodeHelper(Opc);
492 bool getMUBUFIsBufferInv(unsigned Opc) {
493 const MUBUFInfo *Info = getMUBUFOpcodeHelper(Opc);
497 bool getMUBUFTfe(unsigned Opc) {
498 const MUBUFInfo *Info = getMUBUFOpcodeHelper(Opc);
502 bool getSMEMIsBuffer(unsigned Opc) {
503 const SMInfo *Info = getSMEMOpcodeHelper(Opc);
507 bool getVOP1IsSingle(unsigned Opc) {
508 const VOPInfo *Info = getVOP1OpcodeHelper(Opc);
512 bool getVOP2IsSingle(unsigned Opc) {
513 const VOPInfo *Info = getVOP2OpcodeHelper(Opc);
517 bool getVOP3IsSingle(unsigned Opc) {
518 const VOPInfo *Info = getVOP3OpcodeHelper(Opc);
522 bool isVOPC64DPP(unsigned Opc) {
523 return isVOPC64DPPOpcodeHelper(Opc) || isVOPC64DPP8OpcodeHelper(Opc);
526 bool isVOPCAsmOnly(unsigned Opc) { return isVOPCAsmOnlyOpcodeHelper(Opc); }
528 bool getMAIIsDGEMM(unsigned Opc) {
529 const MAIInstInfo *Info = getMAIInstInfoHelper(Opc);
533 bool getMAIIsGFX940XDL(unsigned Opc) {
534 const MAIInstInfo *Info = getMAIInstInfoHelper(Opc);
570 CanBeVOPD getCanBeVOPD(unsigned Opc) {
571 const VOPDComponentInfo *Info = getVOPDComponentHelper(Opc);
577 unsigned getVOPDOpcode(unsigned Opc) {
578 const VOPDComponentInfo *Info = getVOPDComponentHelper(Opc);
582 bool isVOPD(unsigned Opc) {
583 return AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src0X);
586 bool isMAC(unsigned Opc) {
587 return Opc == AMDGPU::V_MAC_F32_e64_gfx6_gfx7 ||
588 Opc == AMDGPU::V_MAC_F32_e64_gfx10 ||
589 Opc == AMDGPU::V_MAC_F32_e64_vi ||
590 Opc == AMDGPU::V_MAC_LEGACY_F32_e64_gfx6_gfx7 ||
591 Opc == AMDGPU::V_MAC_LEGACY_F32_e64_gfx10 ||
592 Opc == AMDGPU::V_MAC_F16_e64_vi ||
593 Opc == AMDGPU::V_FMAC_F64_e64_gfx90a ||
594 Opc == AMDGPU::V_FMAC_F32_e64_gfx10 ||
595 Opc == AMDGPU::V_FMAC_F32_e64_gfx11 ||
596 Opc == AMDGPU::V_FMAC_F32_e64_gfx12 ||
597 Opc == AMDGPU::V_FMAC_F32_e64_vi ||
598 Opc == AMDGPU::V_FMAC_LEGACY_F32_e64_gfx10 ||
599 Opc == AMDGPU::V_FMAC_DX9_ZERO_F32_e64_gfx11 ||
600 Opc == AMDGPU::V_FMAC_F16_e64_gfx10 ||
601 Opc == AMDGPU::V_FMAC_F16_fake16_e64_gfx11 ||
602 Opc == AMDGPU::V_FMAC_F16_fake16_e64_gfx12 ||
603 Opc == AMDGPU::V_DOT2C_F32_F16_e64_vi ||
604 Opc == AMDGPU::V_DOT2C_F32_BF16_e64_vi ||
605 Opc == AMDGPU::V_DOT2C_I32_I16_e64_vi ||
606 Opc == AMDGPU::V_DOT4C_I32_I8_e64_vi ||
607 Opc == AMDGPU::V_DOT8C_I32_I4_e64_vi;
610 bool isPermlane16(unsigned Opc) {
611 return Opc == AMDGPU::V_PERMLANE16_B32_gfx10 ||
612 Opc == AMDGPU::V_PERMLANEX16_B32_gfx10 ||
613 Opc == AMDGPU::V_PERMLANE16_B32_e64_gfx11 ||
614 Opc == AMDGPU::V_PERMLANEX16_B32_e64_gfx11 ||
615 Opc == AMDGPU::V_PERMLANE16_B32_e64_gfx12 ||
616 Opc == AMDGPU::V_PERMLANEX16_B32_e64_gfx12 ||
617 Opc == AMDGPU::V_PERMLANE16_VAR_B32_e64_gfx12 ||
618 Opc == AMDGPU::V_PERMLANEX16_VAR_B32_e64_gfx12;
621 bool isCvt_F32_Fp8_Bf8_e64(unsigned Opc) {
622 return Opc == AMDGPU::V_CVT_F32_BF8_e64_gfx12 ||
623 Opc == AMDGPU::V_CVT_F32_FP8_e64_gfx12 ||
624 Opc == AMDGPU::V_CVT_F32_BF8_e64_dpp_gfx12 ||
625 Opc == AMDGPU::V_CVT_F32_FP8_e64_dpp_gfx12 ||
626 Opc == AMDGPU::V_CVT_F32_BF8_e64_dpp8_gfx12 ||
627 Opc == AMDGPU::V_CVT_F32_FP8_e64_dpp8_gfx12 ||
628 Opc == AMDGPU::V_CVT_PK_F32_BF8_fake16_e64_gfx12 ||
629 Opc == AMDGPU::V_CVT_PK_F32_FP8_fake16_e64_gfx12 ||
630 Opc == AMDGPU::V_CVT_PK_F32_BF8_t16_e64_gfx12 ||
631 Opc == AMDGPU::V_CVT_PK_F32_FP8_t16_e64_gfx12;
634 bool isGenericAtomic(unsigned Opc) {
635 return Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SWAP ||
636 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_ADD ||
637 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SUB ||
638 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SMIN ||
639 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_UMIN ||
640 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SMAX ||
641 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_UMAX ||
642 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_AND ||
643 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_OR ||
644 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_XOR ||
645 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_INC ||
646 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_DEC ||
647 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_FADD ||
648 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_FMIN ||
649 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_FMAX ||
650 Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_CMPSWAP ||
651 Opc == AMDGPU::G_AMDGPU_ATOMIC_CMPXCHG;
654 bool isTrue16Inst(unsigned Opc) {
655 const VOPTrue16Info *Info = getTrue16OpcodeHelper(Opc);
659 FPType getFPDstSelType(unsigned Opc) {
660 const FP4FP8DstByteSelInfo *Info = getFP4FP8DstByteSelHelper(Opc);
671 unsigned mapWMMA2AddrTo3AddrOpcode(unsigned Opc) {
672 const WMMAOpcodeMappingInfo *Info = getWMMAMappingInfoFrom2AddrOpcode(Opc);
676 unsigned mapWMMA3AddrTo2AddrOpcode(unsigned Opc) {
677 const WMMAOpcodeMappingInfo *Info = getWMMAMappingInfoFrom3AddrOpcode(Opc);