Lines Matching defs:Opc

71   unsigned Opc = 0;
75     Opc = Mips::MoveR3216;
78     Opc = Mips::Move32R16;
81     Opc = Mips::Mfhi16, SrcReg = 0;
84     Opc = Mips::Mflo16, SrcReg = 0;
86   assert(Opc && "Cannot copy registers");
88   MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
114   unsigned Opc = 0;
116     Opc = Mips::SwRxSpImmX16;
117   assert(Opc && "Register class not handled!");
118   BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)).
130   unsigned Opc = 0;
133     Opc = Mips::LwRxSpImmX16;
134   assert(Opc && "Register class not handled!");
135   BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(Offset)
155 unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const {
156   switch (Opc) {
216   unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16;
217   MIB = BuildMI(MBB, I, DL, get(Opc));
246   unsigned Opc = ((FrameSize <= 128) && !SaveS2)?
260   MIB = BuildMI(MBB, I, DL, get(Opc));
429 unsigned Mips16InstrInfo::getAnalyzableBrOpc(unsigned Opc) const {
430   return (Opc == Mips::BeqzRxImmX16   || Opc == Mips::BimmX16  ||
431           Opc == Mips::Bimm16  ||
432           Opc == Mips::Bteqz16        || Opc == Mips::Btnez16 ||
433           Opc == Mips::BeqzRxImm16    || Opc == Mips::BnezRxImm16   ||
434           Opc == Mips::BnezRxImmX16   || Opc == Mips::BteqzX16 ||
435           Opc == Mips::BteqzT8CmpX16  || Opc == Mips::BteqzT8CmpiX16 ||
436           Opc == Mips::BteqzT8SltX16  || Opc == Mips::BteqzT8SltuX16  ||
437           Opc == Mips::BteqzT8SltiX16 || Opc == Mips::BteqzT8SltiuX16 ||
438           Opc == Mips::BtnezX16       || Opc == Mips::BtnezT8CmpX16 ||
439           Opc == Mips::BtnezT8CmpiX16 || Opc == Mips::BtnezT8SltX16 ||
440           Opc == Mips::BtnezT8SltuX16 || Opc == Mips::BtnezT8SltiX16 ||
441           Opc == Mips::BtnezT8SltiuX16 ) ? Opc : 0;
446                                   unsigned Opc) const {
447   BuildMI(MBB, I, I->getDebugLoc(), get(Opc));