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Searched defs:MIRBuilder (Results 1 – 25 of 31) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DIRTranslator.h324 translateICmp(const User & U,MachineIRBuilder & MIRBuilder) translateICmp() argument
329 translateFCmp(const User & U,MachineIRBuilder & MIRBuilder) translateFCmp() argument
445 translateAdd(const User & U,MachineIRBuilder & MIRBuilder) translateAdd() argument
448 translateSub(const User & U,MachineIRBuilder & MIRBuilder) translateSub() argument
451 translateAnd(const User & U,MachineIRBuilder & MIRBuilder) translateAnd() argument
454 translateMul(const User & U,MachineIRBuilder & MIRBuilder) translateMul() argument
457 translateOr(const User & U,MachineIRBuilder & MIRBuilder) translateOr() argument
460 translateXor(const User & U,MachineIRBuilder & MIRBuilder) translateXor() argument
464 translateUDiv(const User & U,MachineIRBuilder & MIRBuilder) translateUDiv() argument
467 translateSDiv(const User & U,MachineIRBuilder & MIRBuilder) translateSDiv() argument
470 translateURem(const User & U,MachineIRBuilder & MIRBuilder) translateURem() argument
473 translateSRem(const User & U,MachineIRBuilder & MIRBuilder) translateSRem() argument
476 translateIntToPtr(const User & U,MachineIRBuilder & MIRBuilder) translateIntToPtr() argument
479 translatePtrToInt(const User & U,MachineIRBuilder & MIRBuilder) translatePtrToInt() argument
482 translateTrunc(const User & U,MachineIRBuilder & MIRBuilder) translateTrunc() argument
485 translateFPTrunc(const User & U,MachineIRBuilder & MIRBuilder) translateFPTrunc() argument
488 translateFPExt(const User & U,MachineIRBuilder & MIRBuilder) translateFPExt() argument
491 translateFPToUI(const User & U,MachineIRBuilder & MIRBuilder) translateFPToUI() argument
494 translateFPToSI(const User & U,MachineIRBuilder & MIRBuilder) translateFPToSI() argument
497 translateUIToFP(const User & U,MachineIRBuilder & MIRBuilder) translateUIToFP() argument
500 translateSIToFP(const User & U,MachineIRBuilder & MIRBuilder) translateSIToFP() argument
505 translateSExt(const User & U,MachineIRBuilder & MIRBuilder) translateSExt() argument
509 translateZExt(const User & U,MachineIRBuilder & MIRBuilder) translateZExt() argument
513 translateShl(const User & U,MachineIRBuilder & MIRBuilder) translateShl() argument
516 translateLShr(const User & U,MachineIRBuilder & MIRBuilder) translateLShr() argument
519 translateAShr(const User & U,MachineIRBuilder & MIRBuilder) translateAShr() argument
523 translateFAdd(const User & U,MachineIRBuilder & MIRBuilder) translateFAdd() argument
526 translateFSub(const User & U,MachineIRBuilder & MIRBuilder) translateFSub() argument
529 translateFMul(const User & U,MachineIRBuilder & MIRBuilder) translateFMul() argument
532 translateFDiv(const User & U,MachineIRBuilder & MIRBuilder) translateFDiv() argument
535 translateFRem(const User & U,MachineIRBuilder & MIRBuilder) translateFRem() argument
554 translateResume(const User & U,MachineIRBuilder & MIRBuilder) translateResume() argument
557 translateCleanupRet(const User & U,MachineIRBuilder & MIRBuilder) translateCleanupRet() argument
560 translateCatchRet(const User & U,MachineIRBuilder & MIRBuilder) translateCatchRet() argument
563 translateCatchSwitch(const User & U,MachineIRBuilder & MIRBuilder) translateCatchSwitch() argument
566 translateAddrSpaceCast(const User & U,MachineIRBuilder & MIRBuilder) translateAddrSpaceCast() argument
569 translateCleanupPad(const User & U,MachineIRBuilder & MIRBuilder) translateCleanupPad() argument
572 translateCatchPad(const User & U,MachineIRBuilder & MIRBuilder) translateCatchPad() argument
575 translateUserOp1(const User & U,MachineIRBuilder & MIRBuilder) translateUserOp1() argument
578 translateUserOp2(const User & U,MachineIRBuilder & MIRBuilder) translateUserOp2() argument
[all...]
H A DCallLowering.h232 MachineIRBuilder &MIRBuilder; global() member
511 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI,Register SwiftErrorVReg) lowerReturn() argument
523 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI) lowerReturn() argument
543 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) lowerFormalArguments() argument
555 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) lowerCall() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp75 static Register createTypeVReg(MachineIRBuilder &MIRBuilder) { in getOpTypeBool() argument
116 cast<SPIRVSubtarget>(MIRBuilder argument
47 assignTypeToVReg(const Type * Type,Register VReg,MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccessQual,bool EmitIR) assignTypeToVReg() argument
62 createTypeVReg(MachineIRBuilder & MIRBuilder) createTypeVReg() argument
81 getOpTypeInt(uint32_t Width,MachineIRBuilder & MIRBuilder,bool IsSigned) getOpTypeInt() argument
109 getOpTypeFloat(uint32_t Width,MachineIRBuilder & MIRBuilder) getOpTypeFloat() argument
123 getOpTypeVector(uint32_t NumElems,SPIRVType * ElemType,MachineIRBuilder & MIRBuilder) getOpTypeVector() argument
138 getOrCreateConstIntReg(uint64_t Val,SPIRVType * SpvType,MachineIRBuilder * MIRBuilder,MachineInstr * I,const SPIRVInstrInfo * TII) getOrCreateConstIntReg() argument
197 buildConstantInt(uint64_t Val,MachineIRBuilder & MIRBuilder,SPIRVType * SpvType,bool EmitIR) buildConstantInt() argument
244 buildConstantFP(APFloat Val,MachineIRBuilder & MIRBuilder,SPIRVType * SpvType) buildConstantFP() argument
348 getOrCreateIntCompositeOrNull(uint64_t Val,MachineIRBuilder & MIRBuilder,SPIRVType * SpvType,bool EmitIR,Constant * CA,unsigned BitWidth,unsigned ElemCnt) getOrCreateIntCompositeOrNull() argument
386 getOrCreateConsIntVector(uint64_t Val,MachineIRBuilder & MIRBuilder,SPIRVType * SpvType,bool EmitIR) getOrCreateConsIntVector() argument
403 getOrCreateConsIntArray(uint64_t Val,MachineIRBuilder & MIRBuilder,SPIRVType * SpvType,bool EmitIR) getOrCreateConsIntArray() argument
420 getOrCreateConstNullPtr(MachineIRBuilder & MIRBuilder,SPIRVType * SpvType) getOrCreateConstNullPtr() argument
442 buildConstantSampler(Register ResReg,unsigned AddrMode,unsigned Param,unsigned FilerMode,MachineIRBuilder & MIRBuilder,SPIRVType * SpvType) buildConstantSampler() argument
467 buildGlobalVariable(Register ResVReg,SPIRVType * BaseType,StringRef Name,const GlobalValue * GV,SPIRV::StorageClass::StorageClass Storage,const MachineInstr * Init,bool IsConst,bool HasLinkageTy,SPIRV::LinkageType::LinkageType LinkageType,MachineIRBuilder & MIRBuilder,bool IsInstSelector) buildGlobalVariable() argument
549 getOpTypeArray(uint32_t NumElems,SPIRVType * ElemType,MachineIRBuilder & MIRBuilder,bool EmitIR) getOpTypeArray() argument
563 getOpTypeOpaque(const StructType * Ty,MachineIRBuilder & MIRBuilder) getOpTypeOpaque() argument
574 getOpTypeStruct(const StructType * Ty,MachineIRBuilder & MIRBuilder,bool EmitIR) getOpTypeStruct() argument
595 getOrCreateSpecialType(const Type * Ty,MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccQual) getOrCreateSpecialType() argument
603 getOpTypePointer(SPIRV::StorageClass::StorageClass SC,SPIRVType * ElemType,MachineIRBuilder & MIRBuilder,Register Reg) getOpTypePointer() argument
613 getOpTypeForwardPointer(SPIRV::StorageClass::StorageClass SC,MachineIRBuilder & MIRBuilder) getOpTypeForwardPointer() argument
621 getOpTypeFunction(SPIRVType * RetType,const SmallVectorImpl<SPIRVType * > & ArgTypes,MachineIRBuilder & MIRBuilder) getOpTypeFunction() argument
633 getOrCreateOpTypeFunctionWithArgs(const Type * Ty,SPIRVType * RetType,const SmallVectorImpl<SPIRVType * > & ArgTypes,MachineIRBuilder & MIRBuilder) getOrCreateOpTypeFunctionWithArgs() argument
643 findSPIRVType(const Type * Ty,MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccQual,bool EmitIR) findSPIRVType() argument
661 createSPIRVType(const Type * Ty,MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccQual,bool EmitIR) createSPIRVType() argument
731 restOfCreateSPIRVType(const Type * Ty,MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccessQual,bool EmitIR) restOfCreateSPIRVType() argument
767 getOrCreateSPIRVType(const Type * Ty,MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccessQual,bool EmitIR) getOrCreateSPIRVType() argument
853 getOrCreateOpTypeImage(MachineIRBuilder & MIRBuilder,SPIRVType * SampledType,SPIRV::Dim::Dim Dim,uint32_t Depth,uint32_t Arrayed,uint32_t Multisampled,uint32_t Sampled,SPIRV::ImageFormat::ImageFormat ImageFormat,SPIRV::AccessQualifier::AccessQualifier AccessQual) getOrCreateOpTypeImage() argument
877 getOrCreateOpTypeSampler(MachineIRBuilder & MIRBuilder) getOrCreateOpTypeSampler() argument
887 getOrCreateOpTypePipe(MachineIRBuilder & MIRBuilder,SPIRV::AccessQualifier::AccessQualifier AccessQual) getOrCreateOpTypePipe() argument
900 getOrCreateOpTypeDeviceEvent(MachineIRBuilder & MIRBuilder) getOrCreateOpTypeDeviceEvent() argument
910 getOrCreateOpTypeSampledImage(SPIRVType * ImageType,MachineIRBuilder & MIRBuilder) getOrCreateOpTypeSampledImage() argument
925 getOrCreateOpTypeByOpcode(const Type * Ty,MachineIRBuilder & MIRBuilder,unsigned Opcode) getOrCreateOpTypeByOpcode() argument
937 checkSpecialInstr(const SPIRV::SpecialTypeDescriptor & TD,MachineIRBuilder & MIRBuilder) checkSpecialInstr() argument
946 getOrCreateSPIRVTypeByName(StringRef TypeStr,MachineIRBuilder & MIRBuilder,SPIRV::StorageClass::StorageClass SC,SPIRV::AccessQualifier::AccessQualifier AQ) getOrCreateSPIRVTypeByName() argument
1024 getOrCreateSPIRVIntegerType(unsigned BitWidth,MachineIRBuilder & MIRBuilder) getOrCreateSPIRVIntegerType() argument
1054 getOrCreateSPIRVBoolType(MachineIRBuilder & MIRBuilder) getOrCreateSPIRVBoolType() argument
1075 getOrCreateSPIRVVectorType(SPIRVType * BaseType,unsigned NumElements,MachineIRBuilder & MIRBuilder) getOrCreateSPIRVVectorType() argument
1119 getOrCreateSPIRVPointerType(SPIRVType * BaseType,MachineIRBuilder & MIRBuilder,SPIRV::StorageClass::StorageClass SC) getOrCreateSPIRVPointerType() argument
[all...]
H A DSPIRVBuiltins.cpp277 buildBoolRegister(MachineIRBuilder & MIRBuilder,const SPIRVType * ResultType,SPIRVGlobalRegistry * GR) buildBoolRegister() argument
302 buildSelectInst(MachineIRBuilder & MIRBuilder,Register ReturnRegister,Register SourceRegister,const SPIRVType * ReturnType,SPIRVGlobalRegistry * GR) buildSelectInst() argument
324 buildLoadInst(SPIRVType * BaseType,Register PtrRegister,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR,LLT LowLevelType,Register DestinationReg=Register (0)) buildLoadInst() argument
342 buildBuiltinVariableLoad(MachineIRBuilder & MIRBuilder,SPIRVType * VariableType,SPIRVGlobalRegistry * GR,SPIRV::BuiltIn::BuiltIn BuiltinValue,LLT LLType,Register Reg=Register (0)) buildBuiltinVariableLoad() argument
414 buildConstantIntReg(uint64_t Val,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR,unsigned BitWidth=32) buildConstantIntReg() argument
423 buildScopeReg(Register CLScopeRegister,SPIRV::Scope::Scope Scope,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR,MachineRegisterInfo * MRI) buildScopeReg() argument
441 buildMemSemanticsReg(Register SemanticsRegister,Register PtrRegister,unsigned & Semantics,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildMemSemanticsReg() argument
461 buildAtomicInitInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder) buildAtomicInitInst() argument
474 buildAtomicLoadInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildAtomicLoadInst() argument
511 buildAtomicStoreInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildAtomicStoreInst() argument
532 buildAtomicCompareExchangeInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildAtomicCompareExchangeInst() argument
638 buildAtomicRMWInst(const SPIRV::IncomingCall * Call,unsigned Opcode,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildAtomicRMWInst() argument
670 buildAtomicFlagInst(const SPIRV::IncomingCall * Call,unsigned Opcode,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildAtomicFlagInst() argument
702 buildBarrierInst(const SPIRV::IncomingCall * Call,unsigned Opcode,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildBarrierInst() argument
795 generateExtInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateExtInst() argument
816 generateRelationalInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateRelationalInst() argument
842 generateGroupInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateGroupInst() argument
930 genWorkgroupQuery(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR,SPIRV::BuiltIn::BuiltIn BuiltinValue,uint64_t DefaultValue) genWorkgroupQuery() argument
1028 generateBuiltinVar(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateBuiltinVar() argument
1052 generateAtomicInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateAtomicInst() argument
1087 generateBarrierInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateBarrierInst() argument
1098 generateDotOrFMulInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateDotOrFMulInst() argument
1112 generateGetQueryInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateGetQueryInst() argument
1124 generateImageSizeQueryInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateImageSizeQueryInst() argument
1188 generateImageMiscQueryInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateImageMiscQueryInst() argument
1258 generateReadImageInst(const StringRef DemangledCall,const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateReadImageInst() argument
1338 generateWriteImageInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateWriteImageInst() argument
1352 generateSampleImageInst(const StringRef DemangledCall,const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateSampleImageInst() argument
1406 generateSelectInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder) generateSelectInst() argument
1413 generateSpecConstantInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateSpecConstantInst() argument
1469 buildNDRange(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildNDRange() argument
1601 getOrCreateSPIRVDeviceEventPointer(MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) getOrCreateSPIRVDeviceEventPointer() argument
1616 buildEnqueueKernel(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) buildEnqueueKernel() argument
1700 generateEnqueueInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateEnqueueInst() argument
1747 generateAsyncCopy(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateAsyncCopy() argument
1778 generateConvertInst(const StringRef DemangledCall,const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateConvertInst() argument
1834 generateVectorLoadStoreInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateVectorLoadStoreInst() argument
1858 generateLoadStoreInst(const SPIRV::IncomingCall * Call,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) generateLoadStoreInst() argument
1898 lowerBuiltin(const StringRef DemangledCall,SPIRV::InstructionSet::InstructionSet Set,MachineIRBuilder & MIRBuilder,const Register OrigRet,const Type * OrigRetTy,const SmallVectorImpl<Register> & Args,SPIRVGlobalRegistry * GR) lowerBuiltin() argument
2019 getNonParameterizedType(const TargetExtType * ExtensionType,const SPIRV::BuiltinType * TypeRecord,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) getNonParameterizedType() argument
2026 getSamplerType(MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) getSamplerType() argument
2033 getPipeType(const TargetExtType * ExtensionType,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) getPipeType() argument
2046 getImageType(const TargetExtType * ExtensionType,const SPIRV::AccessQualifier::AccessQualifier Qualifier,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) getImageType() argument
2067 getSampledImageType(const TargetExtType * OpaqueType,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) getSampledImageType() argument
2078 parseBuiltinTypeNameToTargetExtType(std::string TypeName,MachineIRBuilder & MIRBuilder) parseBuiltinTypeNameToTargetExtType() argument
2128 lowerBuiltinType(const Type * OpaqueType,SPIRV::AccessQualifier::AccessQualifier AccessQual,MachineIRBuilder & MIRBuilder,SPIRVGlobalRegistry * GR) lowerBuiltinType() argument
[all...]
H A DSPIRVCallLowering.cpp32 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI,Register SwiftErrorVReg) const lowerReturn() argument
199 getArgSPIRVType(const Function & F,unsigned ArgIdx,SPIRVGlobalRegistry * GR,MachineIRBuilder & MIRBuilder) getArgSPIRVType() argument
263 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
402 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
[all...]
H A DSPIRVUtils.cpp97 buildOpName(Register Target,const StringRef & Name,MachineIRBuilder & MIRBuilder) buildOpName() argument
113 buildOpDecorate(Register Reg,MachineIRBuilder & MIRBuilder,SPIRV::Decoration::Decoration Dec,const std::vector<uint32_t> & DecArgs,StringRef StrImm) buildOpDecorate() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/GISel/
H A DBPFCallLowering.cpp26 bool BPFCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn()
36 bool BPFCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments()
43 bool BPFCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.h41 PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, in PPCIncomingValueHandler()
67 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
H A DPPCCallLowering.cpp74 bool PPCCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
109 bool PPCCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall() argument
114 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
158 __anon6844acb00202(MachineIRBuilder &MIRBuilder, const MachinePointerInfo &MPO, LLT MemTy, const DstOp &Res, Register Addr) assignValueToAddress() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp299 translateBinaryOp(unsigned Opcode,const User & U,MachineIRBuilder & MIRBuilder) translateBinaryOp() argument
318 translateUnaryOp(unsigned Opcode,const User & U,MachineIRBuilder & MIRBuilder) translateUnaryOp() argument
330 translateFNeg(const User & U,MachineIRBuilder & MIRBuilder) translateFNeg() argument
335 translateCompare(const User & U,MachineIRBuilder & MIRBuilder) translateCompare() argument
361 translateRet(const User & U,MachineIRBuilder & MIRBuilder) translateRet() argument
577 translateBr(const User & U,MachineIRBuilder & MIRBuilder) translateBr() argument
1335 translateIndirectBr(const User & U,MachineIRBuilder & MIRBuilder) translateIndirectBr() argument
1364 translateLoad(const User & U,MachineIRBuilder & MIRBuilder) translateLoad() argument
1416 translateStore(const User & U,MachineIRBuilder & MIRBuilder) translateStore() argument
1480 translateExtractValue(const User & U,MachineIRBuilder & MIRBuilder) translateExtractValue() argument
1495 translateInsertValue(const User & U,MachineIRBuilder & MIRBuilder) translateInsertValue() argument
1515 translateSelect(const User & U,MachineIRBuilder & MIRBuilder) translateSelect() argument
1533 translateCopy(const User & U,const Value & V,MachineIRBuilder & MIRBuilder) translateCopy() argument
1548 translateBitCast(const User & U,MachineIRBuilder & MIRBuilder) translateBitCast() argument
1564 translateCast(unsigned Opcode,const User & U,MachineIRBuilder & MIRBuilder) translateCast() argument
1575 translateGetElementPtr(const User & U,MachineIRBuilder & MIRBuilder) translateGetElementPtr() argument
1685 translateMemFunc(const CallInst & CI,MachineIRBuilder & MIRBuilder,unsigned Opcode) translateMemFunc() argument
1776 getStackGuard(Register DstReg,MachineIRBuilder & MIRBuilder) getStackGuard() argument
1799 translateOverflowIntrinsic(const CallInst & CI,unsigned Op,MachineIRBuilder & MIRBuilder) translateOverflowIntrinsic() argument
1809 translateFixedPointIntrinsic(unsigned Op,const CallInst & CI,MachineIRBuilder & MIRBuilder) translateFixedPointIntrinsic() argument
1933 translateSimpleIntrinsic(const CallInst & CI,Intrinsic::ID ID,MachineIRBuilder & MIRBuilder) translateSimpleIntrinsic() argument
1976 translateConstrainedFPIntrinsic(const ConstrainedFPIntrinsic & FPI,MachineIRBuilder & MIRBuilder) translateConstrainedFPIntrinsic() argument
2014 translateIfEntryValueArgument(bool isDeclare,Value * Val,const DILocalVariable * Var,const DIExpression * Expr,const DebugLoc & DL,MachineIRBuilder & MIRBuilder) translateIfEntryValueArgument() argument
2043 translateKnownIntrinsic(const CallInst & CI,Intrinsic::ID ID,MachineIRBuilder & MIRBuilder) translateKnownIntrinsic() argument
2485 translateInlineAsm(const CallBase & CB,MachineIRBuilder & MIRBuilder) translateInlineAsm() argument
2500 translateCallBase(const CallBase & CB,MachineIRBuilder & MIRBuilder) translateCallBase() argument
2547 translateCall(const User & U,MachineIRBuilder & MIRBuilder) translateCall() argument
2710 translateInvoke(const User & U,MachineIRBuilder & MIRBuilder) translateInvoke() argument
2797 translateCallBr(const User & U,MachineIRBuilder & MIRBuilder) translateCallBr() argument
2803 translateLandingPad(const User & U,MachineIRBuilder & MIRBuilder) translateLandingPad() argument
2867 translateAlloca(const User & U,MachineIRBuilder & MIRBuilder) translateAlloca() argument
2922 translateVAArg(const User & U,MachineIRBuilder & MIRBuilder) translateVAArg() argument
2933 translateUnreachable(const User & U,MachineIRBuilder & MIRBuilder) translateUnreachable() argument
2956 translateInsertElement(const User & U,MachineIRBuilder & MIRBuilder) translateInsertElement() argument
2971 translateExtractElement(const User & U,MachineIRBuilder & MIRBuilder) translateExtractElement() argument
3000 translateShuffleVector(const User & U,MachineIRBuilder & MIRBuilder) translateShuffleVector() argument
3015 translatePHI(const User & U,MachineIRBuilder & MIRBuilder) translatePHI() argument
3029 translateAtomicCmpXchg(const User & U,MachineIRBuilder & MIRBuilder) translateAtomicCmpXchg() argument
3052 translateAtomicRMW(const User & U,MachineIRBuilder & MIRBuilder) translateAtomicRMW() argument
3128 translateFence(const User & U,MachineIRBuilder & MIRBuilder) translateFence() argument
3136 translateFreeze(const User & U,MachineIRBuilder & MIRBuilder) translateFreeze() argument
3189 translateDbgValueRecord(Value * V,bool HasArgList,const DILocalVariable * Variable,const DIExpression * Expression,const DebugLoc & DL,MachineIRBuilder & MIRBuilder) translateDbgValueRecord() argument
3236 translateDbgDeclareRecord(Value * Address,bool HasArgList,const DILocalVariable * Variable,const DIExpression * Expression,const DebugLoc & DL,MachineIRBuilder & MIRBuilder) translateDbgDeclareRecord() argument
3267 translateDbgInfo(const Instruction & Inst,MachineIRBuilder & MIRBuilder) translateDbgInfo() argument
[all...]
H A DInlineAsmLowering.cpp81 MachineIRBuilder &MIRBuilder, in getRegistersForValue() argument
183 MachineIRBuilder &MIRBuilder) { in buildAnyextOrCopy() argument
216 MachineIRBuilder &MIRBuilder, const CallBase &Call, in lowerInlineAsm() argument
[all...]
H A DLegalizer.cpp180 MachineIRBuilder &MIRBuilder, in legalizeMachineFunction()
322 std::unique_ptr<MachineIRBuilder> MIRBuilder; in runOnMachineFunction() local
H A DCallLowering.cpp90 lowerCall(MachineIRBuilder & MIRBuilder,const CallBase & CB,ArrayRef<Register> ResRegs,ArrayRef<ArrayRef<Register>> ArgRegs,Register SwiftErrorVReg,std::function<unsigned ()> GetCalleeReg) const lowerCall() argument
607 determineAndHandleAssignments(ValueHandler & Handler,ValueAssigner & Assigner,SmallVectorImpl<ArgInfo> & Args,MachineIRBuilder & MIRBuilder,CallingConv::ID CallConv,bool IsVarArg,ArrayRef<Register> ThisReturnRegs) const determineAndHandleAssignments() argument
695 handleAssignments(ValueHandler & Handler,SmallVectorImpl<ArgInfo> & Args,CCState & CCInfo,SmallVectorImpl<CCValAssign> & ArgLocs,MachineIRBuilder & MIRBuilder,ArrayRef<Register> ThisReturnRegs) const handleAssignments() argument
875 insertSRetLoads(MachineIRBuilder & MIRBuilder,Type * RetTy,ArrayRef<Register> VRegs,Register DemoteReg,int FI) const insertSRetLoads() argument
906 insertSRetStores(MachineIRBuilder & MIRBuilder,Type * RetTy,ArrayRef<Register> VRegs,Register DemoteReg) const insertSRetStores() argument
958 insertSRetOutgoingArgument(MachineIRBuilder & MIRBuilder,const CallBase & CB,CallLoweringInfo & Info) const insertSRetOutgoingArgument() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp338 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
470 SelectMSA3OpIntrinsic(MachineInstr & MI,unsigned Opcode,MachineIRBuilder & MIRBuilder,const MipsSubtarget & ST) SelectMSA3OpIntrinsic() argument
485 MSA3OpIntrinsicToGeneric(MachineInstr & MI,unsigned Opcode,MachineIRBuilder & MIRBuilder,const MipsSubtarget & ST) MSA3OpIntrinsicToGeneric() argument
497 MSA2OpIntrinsicToGeneric(MachineInstr & MI,unsigned Opcode,MachineIRBuilder & MIRBuilder,const MipsSubtarget & ST) MSA2OpIntrinsicToGeneric() argument
509 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeIntrinsic() local
[all...]
H A DMipsCallLowering.cpp89 MipsIncomingValueHandler(MachineIRBuilder &MIRBuilder, in MipsIncomingValueHandler()
117 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()
196 MipsOutgoingValueHandler(MachineIRBuilder &MIRBuilder, in MipsOutgoingValueHandler()
315 bool MipsCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn()
358 bool MipsCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments()
445 bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp1311 return legalizeLoadStore(MI, MRI, MIRBuilder, Observer); in legalizeSmallCMGlobalValue() argument
1190 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeCustom() local
1242 legalizeFunnelShift(MachineInstr & MI,MachineRegisterInfo & MRI,MachineIRBuilder & MIRBuilder,GISelChangeObserver & Observer,LegalizerHelper & Helper) const legalizeFunnelShift() argument
1547 legalizeShlAshrLshr(MachineInstr & MI,MachineRegisterInfo & MRI,MachineIRBuilder & MIRBuilder,GISelChangeObserver & Observer) const legalizeShlAshrLshr() argument
1586 legalizeLoadStore(MachineInstr & MI,MachineRegisterInfo & MRI,MachineIRBuilder & MIRBuilder,GISelChangeObserver & Observer) const legalizeLoadStore() argument
1756 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeCTPOP() local
1846 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeAtomicCmpxchg128() local
1943 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeCTTZ() local
1954 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeMemOps() local
1972 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeFCopySign() local
2044 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeDynStackAlloc() local
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H A DAArch64CallLowering.cpp351 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI,Register SwiftErrorVReg) const lowerReturn() argument
484 handleMustTailForwardedRegisters(MachineIRBuilder & MIRBuilder,CCAssignFn * AssignFn) handleMustTailForwardedRegisters() argument
546 saveVarArgRegisters(MachineIRBuilder & MIRBuilder,CallLowering::IncomingValueHandler & Handler,CCState & CCInfo) const saveVarArgRegisters() argument
633 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
912 isEligibleForTailCallOptimization(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info,SmallVectorImpl<ArgInfo> & InArgs,SmallVectorImpl<ArgInfo> & OutArgs) const isEligibleForTailCallOptimization() argument
1048 lowerTailCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info,SmallVectorImpl<ArgInfo> & OutArgs) const lowerTailCall() argument
1209 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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H A DAArch64GlobalISelUtils.cpp64 MachineIRBuilder &MIRBuilder, in tryEmitBZero() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp382 lowerReturnVal(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,MachineInstrBuilder & Ret) const lowerReturnVal() argument
413 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI) const lowerReturn() argument
429 saveVarArgRegisters(MachineIRBuilder & MIRBuilder,CallLowering::IncomingValueHandler & Handler,IncomingValueAssigner & Assigner,CCState & CCInfo) const saveVarArgRegisters() argument
494 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
547 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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H A DRISCVLegalizerInfo.cpp388 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeIntrinsic() local
415 legalizeShlAshrLshr(MachineInstr & MI,MachineIRBuilder & MIRBuilder,GISelChangeObserver & Observer) const legalizeShlAshrLshr() argument
457 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeCustom() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp183 lowerReturnVal(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,MachineInstrBuilder & Ret) const lowerReturnVal() argument
214 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI) const lowerReturn() argument
365 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
456 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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H A DARMLegalizerInfo.cpp369 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; legalizeCustom() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp93 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI,Register SwiftErrorVReg) const lowerReturn() argument
122 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
189 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp143 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI) const lowerReturn() argument
254 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
307 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp750 passSpecialInputs(MachineIRBuilder & MIRBuilder,CCState & CCInfo,SmallVectorImpl<std::pair<MCRegister,Register>> & ArgRegs,CallLoweringInfo & Info) const passSpecialInputs() argument
977 addCallTargetOperands(MachineInstrBuilder & CallInst,MachineIRBuilder & MIRBuilder,AMDGPUCallLowering::CallLoweringInfo & Info) addCallTargetOperands() argument
1156 handleImplicitCallArguments(MachineIRBuilder & MIRBuilder,MachineInstrBuilder & CallInst,const GCNSubtarget & ST,const SIMachineFunctionInfo & FuncInfo,CallingConv::ID CalleeCC,ArrayRef<std::pair<MCRegister,Register>> ImplicitArgRegs) const handleImplicitCallArguments() argument
1181 lowerTailCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info,SmallVectorImpl<ArgInfo> & OutArgs) const lowerTailCall() argument
1340 lowerChainCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerChainCall() argument
1386 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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