Lines Matching defs:MIRBuilder

35 bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
41     produceIndirectPtrTypes(MIRBuilder);
50     const auto &STI = MIRBuilder.getMF().getSubtarget();
51     return MIRBuilder.buildInstr(SPIRV::OpReturnValue)
53         .constrainAllUses(MIRBuilder.getTII(), *STI.getRegisterInfo(),
56   MIRBuilder.buildInstr(SPIRV::OpReturn);
191                                   MachineIRBuilder &MIRBuilder,
202     return GR->getOrCreateSPIRVType(OriginalArgType, MIRBuilder, ArgAccessQual);
208         cast<TypedPointerType>(ArgType)->getElementType(), MIRBuilder);
210         ElementType, MIRBuilder,
224         GR->getOrCreateSPIRVType(getPointeeTypeByAttr(Arg), MIRBuilder);
226         ElementType, MIRBuilder,
238       return GR->getOrCreateSPIRVType(BuiltinType, MIRBuilder, ArgAccessQual);
248     SPIRVType *ElementType = GR->getOrCreateSPIRVType(ElementTy, MIRBuilder);
250         ElementType, MIRBuilder,
257   return GR->getOrCreateSPIRVType(toTypedPointer(OriginalArgType), MIRBuilder,
279 bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
284   GR->setCurrentFunc(MIRBuilder.getMF());
288       static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
299       auto *SpirvTy = getArgSPIRVType(F, i, GR, MIRBuilder, *ST);
300       GR->assignSPIRVTypeToVReg(SpirvTy, VRegs[i][0], MIRBuilder.getMF());
304         buildOpName(VRegs[i][0], Arg.getName(), MIRBuilder);
308           buildOpDecorate(VRegs[i][0], MIRBuilder,
314         buildOpDecorate(VRegs[i][0], MIRBuilder, SPIRV::Decoration::Alignment,
320         buildOpDecorate(VRegs[i][0], MIRBuilder,
326         buildOpDecorate(VRegs[i][0], MIRBuilder,
332         buildOpDecorate(VRegs[i][0], MIRBuilder,
338         buildOpDecorate(VRegs[i][0], MIRBuilder,
346           buildOpDecorate(VRegs[i][0], MIRBuilder, Decoration, {});
366           buildOpDecorate(VRegs[i][0], MIRBuilder, Dec, DecVec);
373   auto MRI = MIRBuilder.getMRI();
377     GR->add(&F, &MIRBuilder.getMF(), FuncVReg);
388   SPIRVType *RetTy = GR->getOrCreateSPIRVType(FRetTy, MIRBuilder);
391       FTy, RetTy, ArgTypeVRegs, MIRBuilder);
395   MachineInstrBuilder MB = MIRBuilder.buildInstr(SPIRV::OpFunction)
407     MIRBuilder.buildInstr(SPIRV::OpFunctionParameter)
411       GR->add(&Arg, &MIRBuilder.getMF(), VRegs[i][0]);
416     buildOpName(FuncVReg, F.getName(), MIRBuilder);
420     const auto &STI = MIRBuilder.getMF().getSubtarget<SPIRVSubtarget>();
422     auto MIB = MIRBuilder.buildInstr(SPIRV::OpEntryPoint)
436     buildOpDecorate(FuncVReg, MIRBuilder, SPIRV::Decoration::LinkageAttributes,
448       buildOpDecorate(FuncVReg, MIRBuilder,
463     MachineIRBuilder &MIRBuilder) const {
465   MachineFunction &MF = MIRBuilder.getMF();
467     SPIRVType *SpirvRetTy = GR->getOrCreateSPIRVType(IC.RetTy, MIRBuilder);
470       SPIRVType *SPIRVTy = GR->getOrCreateSPIRVType(IC.ArgTys[i], MIRBuilder);
479         FTy, SpirvRetTy, SpirvArgTypes, MIRBuilder);
482         SpirvFuncTy, MIRBuilder, SPIRV::StorageClass::Function);
488 bool SPIRVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
494   MachineFunction &MF = MIRBuilder.getMF();
519   MachineRegisterInfo *MRI = MIRBuilder.getMRI();
536       SPIRVType *SPIRVTy = GR->getOrCreateSPIRVType(Arg.Ty, MIRBuilder);
543             SPIRV::lowerBuiltin(DemangledName, instructionSet, MIRBuilder,
558       if (MIRBuilder.getDataLayout().getTypeStoreSize(Arg.getType()).isZero())
599     ResVReg = MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass);
600   SPIRVType *RetType = GR->assignTypeToVReg(OrigRetTy, ResVReg, MIRBuilder);
603   auto MIB = MIRBuilder.buildInstr(CallOp)
614   return MIB.constrainAllUses(MIRBuilder.getTII(), *ST->getRegisterInfo(),