Lines Matching defs:MIRBuilder
1300 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
1301 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
1308 return legalizeVaArg(MI, MRI, MIRBuilder);
1311 return legalizeLoadStore(MI, MRI, MIRBuilder, Observer);
1315 return legalizeShlAshrLshr(MI, MRI, MIRBuilder, Observer);
1317 return legalizeSmallCMGlobalValue(MI, MRI, MIRBuilder, Observer);
1323 return legalizeFunnelShift(MI, MRI, MIRBuilder, Observer, Helper);
1346 return legalizeICMP(MI, MRI, MIRBuilder);
1354 MachineIRBuilder &MIRBuilder,
1387 auto Cast64 = MIRBuilder.buildConstant(LLT::scalar(64), Amount.zext(64));
1397 MIRBuilder.buildInstr(TargetOpcode::G_FSHR, {MI.getOperand(0).getReg()},
1407 MachineIRBuilder &MIRBuilder) const {
1426 MIRBuilder
1429 MIRBuilder.buildNot(DstReg, CmpReg);
1445 auto NewAmt = Helper.MIRBuilder.buildZExt(LLT::scalar(64), AmtReg);
1453 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder,
1476 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {})
1497 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP})
1504 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP})
1538 MachineIRBuilder &MIB = Helper.MIRBuilder;
1692 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder,
1707 auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount);
1731 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder,
1773 NewI = MIRBuilder.buildInstr(Opcode, {s64, s64}, {});
1774 MIRBuilder.buildMergeLikeInstr(
1777 auto Split = MIRBuilder.buildUnmerge(s64, MI.getOperand(0));
1778 NewI = MIRBuilder.buildInstr(
1812 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg);
1813 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO);
1815 auto NewLoad = MIRBuilder.buildLoad(NewTy, MI.getOperand(1), MMO);
1816 MIRBuilder.buildBitcast(ValReg, NewLoad);
1824 MachineIRBuilder &MIRBuilder) const {
1825 MachineFunction &MF = MIRBuilder.getMF();
1835 auto List = MIRBuilder.buildLoad(
1844 MIRBuilder.buildConstant(IntPtrTy, Alignment.value() - 1);
1845 auto ListTmp = MIRBuilder.buildPtrAdd(PtrTy, List, AlignMinus1.getReg(0));
1846 DstPtr = MIRBuilder.buildMaskLowPtrBits(PtrTy, ListTmp, Log2(Alignment));
1852 MIRBuilder.buildLoad(
1857 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrAlign));
1859 auto NewList = MIRBuilder.buildPtrAdd(PtrTy, DstPtr, Size.getReg(0));
1861 MIRBuilder.buildStore(NewList, ListPtr,
1901 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
1913 auto Split = MIRBuilder.buildUnmerge(s64, Val);
1914 auto CTPOP1 = MIRBuilder.buildCTPOP(s64, Split->getOperand(0));
1915 auto CTPOP2 = MIRBuilder.buildCTPOP(s64, Split->getOperand(1));
1916 auto Add = MIRBuilder.buildAdd(s64, CTPOP1, CTPOP2);
1918 MIRBuilder.buildZExt(Dst, Add);
1938 Val = MIRBuilder.buildZExt(LLT::scalar(64), Val).getReg(0);
1941 Val = MIRBuilder.buildBitcast(VTy, Val).getReg(0);
1944 auto CTPOP = MIRBuilder.buildCTPOP(VTy, Val);
1951 auto Zeros = MIRBuilder.buildConstant(Dt, 0);
1952 auto Ones = MIRBuilder.buildConstant(VTy, 1);
1957 MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP});
1958 Sum = MIRBuilder.buildInstr(AArch64::G_UADDLP, {Ty}, {UDOT});
1960 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP});
1962 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP});
2001 UADD = MIRBuilder.buildIntrinsic(Opc, {HTy}).addUse(HSum);
2007 MIRBuilder.buildZExt(Dst, UADD);
2016 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2019 auto DesiredI = MIRBuilder.buildUnmerge({s64, s64}, MI.getOperand(2));
2020 auto NewI = MIRBuilder.buildUnmerge({s64, s64}, MI.getOperand(3));
2057 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASDesired}, {})
2062 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASNew}, {})
2068 CAS = MIRBuilder.buildInstr(Opcode, {CASDst}, {CASDesired, CASNew, Addr});
2070 MIRBuilder.buildExtract({DstLo}, {CASDst}, 0);
2071 MIRBuilder.buildExtract({DstHi}, {CASDst}, 64);
2095 CAS = MIRBuilder.buildInstr(Opcode, {DstLo, DstHi, Scratch},
2106 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {DstLo, DstHi});
2113 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2114 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
2116 auto BitReverse = MIRBuilder.buildBitReverse(Ty, MI.getOperand(1));
2117 MIRBuilder.buildCTLZ(MI.getOperand(0).getReg(), BitReverse);
2124 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2132 MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0);
2154 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2155 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
2181 MIRBuilder.buildInstr(AArch64::PROBED_STACKALLOC_DYN, {}, {SPTmp});
2183 MIRBuilder.setInsertPt(*NewMI->getParent(), NewMI);
2184 MIRBuilder.buildCopy(Dst, SPTmp);
2192 MachineIRBuilder &MIB = Helper.MIRBuilder;