/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CondBrTuning.cpp | 141 MachineInstr &DefMI) { in tryToTuneBranch() 308 MachineInstr *DefMI = getOperandDef(MI.getOperand(0)); in runOnMachineFunction() local
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H A D | AArch64Subtarget.cpp | 492 const MachineInstr *DefMI = Def->getInstr(); adjustSchedDependency() local
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/llvm-project/llvm/unittests/Target/AMDGPU/ |
H A D | ExecMayBeModifiedBeforeAnyUse.cpp | 44 MachineInstr *DefMI = TEST() local
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | MLxExpansionPass.cpp | 94 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local 146 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local 217 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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H A D | ARMHazardRecognizer.cpp | 28 hasRAWHazard(MachineInstr * DefMI,MachineInstr * MI,const TargetRegisterInfo & TRI) hasRAWHazard() argument 54 MachineInstr *DefMI = LastMI; getHazardType() local
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H A D | ARMFixCortexA57AES1742098Pass.cpp | 367 MachineInstr *DefMI = *It; analyzeMF() local
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/llvm-project/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 72 const MachineInstr *DefMI) { in checkRematerializable() argument 90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable() local 209 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local [all...] |
H A D | TargetSchedule.cpp | 174 computeOperandLatency(const MachineInstr * DefMI,unsigned DefOperIdx,const MachineInstr * UseMI,unsigned UseOperIdx) const computeOperandLatency() argument 274 computeOutputLatency(const MachineInstr * DefMI,unsigned DefOperIdx,const MachineInstr * DepMI) const computeOutputLatency() argument [all...] |
H A D | MachineTraceMetrics.cpp | 646 const MachineInstr *DefMI; global() member 783 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); computeCrossBlockCriticalPath() local 988 addLiveIns(const MachineInstr * DefMI,unsigned DefOp,ArrayRef<const MachineBasicBlock * > Trace) addLiveIns() argument 1141 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); computeInstrHeights() local 1282 isDepInTrace(const MachineInstr & DefMI,const MachineInstr & UseMI) const isDepInTrace() argument [all...] |
H A D | MachineLateInstrsCleanup.cpp | 131 if (MachineInstr *DefMI = RegDefs[MBB->getNumber()].lookup(Reg)) clearKillsForDef() local
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H A D | PHIElimination.cpp | 166 MachineInstr *DefMI = MRI->getVRegDef(VirtReg); runOnMachineFunction() local 543 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) LowerPHINode() local [all...] |
H A D | InitUndef.cpp | 107 for (auto &DefMI : MRI->def_instructions(Reg)) { in findImplictDefMIFromReg() local
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H A D | MachineSink.cpp | 338 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); PerformTrivialForwardCoalescing() local 915 MachineInstr *DefMI = MRI->getVRegDef(Reg); isWorthBreakingCriticalEdge() local 1111 MachineInstr *DefMI = MRI->getVRegDef(Reg); isProfitableToSinkTo() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64RegisterBankInfo.cpp | 923 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local 934 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local 993 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local 1080 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 620 assert(SwapMap.contains(DefMI) && in formWebs() local 725 Register DefReg = DefMI->getOperand(0).getReg(); in recordUnoptimizableWebs() local 802 MachineInstr *DefMI = MRI->getVRegDef(UseReg); markSwapsForRemoval() local [all...] |
H A D | PPCInstrInfo.cpp | 169 getOperandLatency(const InstrItineraryData * ItinData,const MachineInstr & DefMI,unsigned DefIdx,const MachineInstr & UseMI,unsigned UseIdx) const getOperandLatency() argument 732 MachineInstr *DefMI = MRI->getVRegDef(Reg); getConstantFromConstantPool() local 2047 onlyFoldImmediate(MachineInstr & UseMI,MachineInstr & DefMI,Register Reg) const onlyFoldImmediate() argument 2118 foldImmediate(MachineInstr & UseMI,MachineInstr & DefMI,Register Reg,MachineRegisterInfo * MRI) const foldImmediate() argument 3400 MachineInstr *DefMI = nullptr; getForwardingDefMI() local 3462 MachineInstr *DefMI = getDefMIPostRA(Reg, MI, SeenIntermediateUse); getForwardingDefMI() local 3742 MachineInstr *DefMI = getForwardingDefMI(MI, ForwardingOperand, convertToImmediateForm() local 4433 isDefMIElgibleForForwarding(MachineInstr & DefMI,const ImmInstrInfo & III,MachineOperand * & ImmMO,MachineOperand * & RegMO) const isDefMIElgibleForForwarding() argument 4463 isRegElgibleForForwarding(const MachineOperand & RegMO,const MachineInstr & DefMI,const MachineInstr & MI,bool KillDefMI,bool & IsFwdFeederRegKilled,bool & SeenIntermediateUse) const isRegElgibleForForwarding() argument 4504 isImmElgibleForForwarding(const MachineOperand & ImmMO,const MachineInstr & DefMI,const ImmInstrInfo & III,int64_t & Imm,int64_t BaseImm) const isImmElgibleForForwarding() argument 4555 simplifyToLI(MachineInstr & MI,MachineInstr & DefMI,unsigned OpNoForForwarding,MachineInstr ** KilledDef) const simplifyToLI() argument 4792 transformToNewImmFormFedByAdd(MachineInstr & MI,MachineInstr & DefMI,unsigned OpNoForForwarding) const transformToNewImmFormFedByAdd() argument 4863 transformToImmFormFedByAdd(MachineInstr & MI,const ImmInstrInfo & III,unsigned OpNoForForwarding,MachineInstr & DefMI,bool KillDefMI) const transformToImmFormFedByAdd() argument [all...] |
H A D | PPCMIPeephole.cpp | 651 if (!DefMI) in simplifyCode() local 810 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); simplifyCode() local 877 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); simplifyCode() local [all...] |
/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVRegisterBankInfo.cpp | 390 MachineInstr *DefMI = MRI.getVRegDef(MI.getOperand(0).getReg()); getInstrMapping() local 445 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TileConfig.cpp | 165 for (auto &DefMI : MRI.def_instructions(R)) { INITIALIZE_PASS_DEPENDENCY() local
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H A D | X86OptimizeLEAs.cpp | 350 for (auto *DefMI : List) { in chooseBestLEA() local 525 MachineInstr *DefMI; in removeRedundantAddrCalc() local [all...] |
/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | Utils.h | 275 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); getOpcodeDef() local
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/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCRegisterBankInfo.cpp | 200 MachineInstr *DefMI = MRI.getVRegDef(MI.getOperand(0).getReg()); getInstrMapping() local
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/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInsertVSETVLI.cpp | 623 if (auto *DefMI = getAVLDefMI(LIS)) hasNonZeroAVL() local 953 const MachineInstr *DefMI = Info.getAVLDefMI(LIS); INITIALIZE_PASS() local 1117 if (const MachineInstr *DefMI = Info.getAVLDefMI(LIS); insertVSETVLI() local 1390 MachineInstr *DefMI = LIS->getInstructionFromIndex(Value->def); needVSETVLIPHI() local [all...] |
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 725 MachineInstr *DefMI = MRI->getVRegDef(MO->getReg()); runOnMachineFunction() local 824 MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(I).getReg()); processPHINode() local 847 MachineInstr *DefMI = MRI->getVRegDef(MaybeVGPRConstMO.getReg()); tryMoveVGPRConstToSGPR() local [all...] |
/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsOptimizePICCall.cpp | 280 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
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