Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6 |
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a35db288 |
| 16-Dec-2024 |
David Green <david.green@arm.com> |
[NFC] Remove some unnecessary semicolons
All inside LLVM_DEBUG, some of which have been cleaned up by adding block scopes to allow them to format more nicely.
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Revision tags: llvmorg-19.1.5 |
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175e0dd4 |
| 27-Nov-2024 |
Jonas Paulsson <paulson1@linux.ibm.com> |
[MachineLateInstrsCleanup] Minor fixing (NFC). (#117816)
With cb57b7a7, MachineLateInstrsCleanup switched to using a map to keep
track of kill flags to remedy compile time regressions seen with hug
[MachineLateInstrsCleanup] Minor fixing (NFC). (#117816)
With cb57b7a7, MachineLateInstrsCleanup switched to using a map to keep
track of kill flags to remedy compile time regressions seen with huge
functions. It seems that the comment above clearKillsForDef() became stale with
that commit, and also that one of the arguments to it became unused,
both of which this patch fixes.
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Revision tags: llvmorg-19.1.4 |
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735ab61a |
| 13-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Remove unused includes (NFC) (#115996)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1 |
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ed4e75d5 |
| 26-Jul-2024 |
Pengcheng Wang <wangpengcheng.pp@bytedance.com> |
[CodeGen] Remove AA parameter of isSafeToMove (#100691)
This `AA` parameter is not used and for most uses they just pass a nullptr.
The use of `AA` was removed since 8d0383e.
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Revision tags: llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5 |
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f6d431f2 |
| 24-Apr-2024 |
Xu Zhang <simonzgx@gmail.com> |
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659
There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659
There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI parameters, as shown in issue #82411.
Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`, `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.
After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5 |
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bafd35ca |
| 11-Nov-2023 |
Kazu Hirata <kazu@google.com> |
[llvm] Stop including llvm/ADT/SmallPtrSet.h (NFC)
Identified with clangd.
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Revision tags: llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6 |
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fb7f50a0 |
| 03-Jun-2023 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Use DenseMapBase::lookup (NFC)
Note that DenseMapBase::lookup and Reg2MIMap::get do exactly the same thing.
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Revision tags: llvmorg-16.0.5, llvmorg-16.0.4 |
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10f0158f |
| 08-May-2023 |
Jonas Paulsson <paulsson@linux.vnet.ibm.com> |
[MachineLateInstrsCleanup] Bugfix for handling of kill flags.
With cb57b7a7, the kill flags are now tracked during the forward search over the instructions and the call to findRegisterUseOperandIdx(
[MachineLateInstrsCleanup] Bugfix for handling of kill flags.
With cb57b7a7, the kill flags are now tracked during the forward search over the instructions and the call to findRegisterUseOperandIdx() should therefore only check for killing uses.
As shown with the failing test CodeGen/Hexagon/vector-sint-to-fp.ll, it could otherwise be the case that an undef use after the instruction that killed the register will be inserted into MBBKills, and the kill flag will not be cleared.
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Revision tags: llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1 |
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cb57b7a7 |
| 02-Apr-2023 |
Jonas Paulsson <paulsson@linux.vnet.ibm.com> |
[MachineLateInstrsCleanup] Improve compile time for huge functions.
It was discovered that this pass could be slow on huge functions, meaning 20% compile time instead of the usual ~0.5% (with a test
[MachineLateInstrsCleanup] Improve compile time for huge functions.
It was discovered that this pass could be slow on huge functions, meaning 20% compile time instead of the usual ~0.5% (with a test case spending ~19 mins just in the backend).
The problem related to the necessary clearing of earlier kill flags when a redundant instruction is removed. With this patch, the handling of kill flags is now done by maintaining a map instead of scanning backwards in the function. This remedies the compile time on the huge file fully.
Reviewed By: vpykhtin, arsenm
Differential Revision: https://reviews.llvm.org/D147532
Resolves https://github.com/llvm/llvm-project/issues/61397
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012ea747 |
| 27-Apr-2023 |
Nick Desaulniers <ndesaulniers@google.com> |
[CodeGen][MachineLastInstrsCleanup] fix INLINEASM_BR hazard
If the removable definition resides in an INLINEASM_BR target, the reuseable candidate might not dominate the INLINEASM_BR.
bb0:
[CodeGen][MachineLastInstrsCleanup] fix INLINEASM_BR hazard
If the removable definition resides in an INLINEASM_BR target, the reuseable candidate might not dominate the INLINEASM_BR.
bb0: INLINEASM_BR &"" %bb.1 renamable $x8 = MOVi64imm 29273397577910035 B %bb.2 ... bb1: renamable $x8 = MOVi64imm 29273397577910035 renamable $x8 = ADDXri killed renamable $x8, 2048, 0 bb2:
Removing the second mov is a hazard when the inline asm branches to bb1.
Skip such replacements when the to be removed instruction is in the target of such an INLINEASM_BR instruction.
We could get more aggressive about this in the future, but for now simply abort.
This is causing a boot failure on linux-4.19.y branches of the LTS Linux kernel for ARCH=arm64 with CONFIG_RANDOMIZE_BASE=y (KASLR) and CONFIG_UNMAP_KERNEL_AT_EL0=y (KPTI).
Link: https://reviews.llvm.org/D123394 Link: https://github.com/ClangBuiltLinux/linux/issues/1837
Thanks to @nathanchance for the report, and @ardb for debugging.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D149191
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9db75b23 |
| 03-Apr-2023 |
Luo, Yuanke <yuanke.luo@intel.com> |
[Coverity] Initialize pointer memeber.
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Revision tags: llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7 |
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5ecd3632 |
| 05-Dec-2022 |
Jonas Paulsson <paulsson@linux.vnet.ibm.com> |
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
This reverts commit 122efef8ee9be57055d204d52c38700fe933c033.
- Patch fixed to not reuse definitions from predecessors in
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
This reverts commit 122efef8ee9be57055d204d52c38700fe933c033.
- Patch fixed to not reuse definitions from predecessors in EH landing pads. - Late review suggestions (by MaskRay) have been addressed. - M68k/pipeline.ll test updated. - Init captures added in processBlock() to avoid capturing structured bindings. - RISCV has this disabled for now.
Original commit message:
A new pass MachineLateInstrsCleanup is added to be run after PEI.
This is a simple pass that removes redundant and identical instructions whenever found by scanning the MF once while keeping track of register definitions in a map. These instructions are typically immediate loads resulting from rematerialization, and address loads emitted by target in eliminateFrameInde().
This is enabled by default, but a target could easily disable it by means of 'disablePass(&MachineLateInstrsCleanupID);'.
This late cleanup is naturally not "optimal" in removing instructions as it is done by looking at phys-regs, but still quite effective. It would be desirable to improve other parts of CodeGen and avoid these redundant instructions in the first place, but there are no ideas for this yet.
Differential Revision: https://reviews.llvm.org/D123394
Reviewed By: RKSimon, foad, craig.topper, arsenm, asb
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17db0de3 |
| 01-Dec-2022 |
Jonas Paulsson <paulsson@linux.vnet.ibm.com> |
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
Init captures added in processBlock() to avoid capturing structured bindings, which caused the build problems (with clang)
Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."
Init captures added in processBlock() to avoid capturing structured bindings, which caused the build problems (with clang).
RISCV has this disabled for now until problems relating to post RA pseudo expansions are resolved.
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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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6d12599f |
| 06-Apr-2022 |
Jonas Paulsson <paulsson@linux.vnet.ibm.com> |
[CodeGen] Add new pass for late cleanup of redundant definitions.
A new pass MachineLateInstrsCleanup is added to be run after PEI.
This is a simple pass that removes redundant and identical instru
[CodeGen] Add new pass for late cleanup of redundant definitions.
A new pass MachineLateInstrsCleanup is added to be run after PEI.
This is a simple pass that removes redundant and identical instructions whenever found by scanning the MF once while keeping track of register definitions in a map. These instructions are typically immediate loads resulting from rematerialization, and address loads emitted by target in eliminateFrameInde().
This is enabled by default, but a target could easily disable it by means of 'disablePass(&MachineLateInstrsCleanupID);'.
This late cleanup is naturally not "optimal" in removing instructions as it is done by looking at phys-regs, but still quite effective. It would be desirable to improve other parts of CodeGen and avoid these redundant instructions in the first place, but there are no ideas for this yet.
Differential Revision: https://reviews.llvm.org/D123394
Reviewed By: RKSimon, foad, craig.topper, arsenm, asb
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