| /llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 308 unsigned NumOperands = MI->getNumOperands(); in printFMAComments() 333 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 342 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 348 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 358 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 365 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 375 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 382 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 393 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); in printFMAComments() 400 AccName = getRegName(MI->getOperand(NumOperands in printFMAComments() 277 unsigned NumOperands = MI->getNumOperands(); printFMAComments() local 633 unsigned NumOperands = MI->getNumOperands(); EmitAnyX86InstComments() local [all...] |
| /llvm-project/llvm/include/llvm/Transforms/Scalar/ |
| H A D | GVNExpression.h | 143 unsigned NumOperands = 0; variable 147 BasicExpression(unsigned NumOperands) in BasicExpression() argument 148 : BasicExpression(NumOperands, ET_Basic) {} in BasicExpression() 149 BasicExpression(unsigned NumOperands, ExpressionType ET) in BasicExpression() argument 150 : Expression(ET), MaxOperands(NumOperands) {} in BasicExpression() 169 assert(N < NumOperands && "Operand out of range"); in getOperand() 175 assert(N < NumOperands && "Operand out of range"); in setOperand() 179 unsigned getNumOperands() const { return NumOperands; } in getNumOperands() 185 op_iterator op_end() { return Operands + NumOperands; } in op_end() 187 const_op_iterator op_end() const { return Operands + NumOperands; } in op_end() 273 MemoryExpression(unsigned NumOperands,enum ExpressionType EType,const MemoryAccess * MemoryLeader) MemoryExpression() argument 306 CallExpression(unsigned NumOperands,CallInst * C,const MemoryAccess * MemoryLeader) CallExpression() argument 333 LoadExpression(unsigned NumOperands,LoadInst * L,const MemoryAccess * MemoryLeader) LoadExpression() argument 337 LoadExpression(enum ExpressionType EType,unsigned NumOperands,LoadInst * L,const MemoryAccess * MemoryLeader) LoadExpression() argument 376 StoreExpression(unsigned NumOperands,StoreInst * S,Value * StoredValue,const MemoryAccess * MemoryLeader) StoreExpression() argument 418 AggregateValueExpression(unsigned NumOperands,unsigned NumIntOperands) AggregateValueExpression() argument 510 PHIExpression(unsigned NumOperands,BasicBlock * B) PHIExpression() argument [all...] |
| /llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86RegisterBankInfo.cpp | 199 unsigned NumOperands = MI.getNumOperands(); in getPartialMappingIdx() 200 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) { in getPartialMappingIdx() 215 unsigned NumOperands = MI.getNumOperands(); in getPartialMappingIdx() 216 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) { in getPartialMappingIdx() 237 unsigned NumOperands = MI.getNumOperands(); in getInstrValueMapping() 240 if (NumOperands != 3 || (Ty != MRI.getType(MI.getOperand(1).getReg())) || in getInstrValueMapping() 245 return getInstructionMapping(DefaultMappingID, 1, Mapping, NumOperands); in getInstrValueMapping() 277 unsigned NumOperands = MI.getNumOperands(); in getInstrMapping() 281 return getInstructionMapping(DefaultMappingID, 1, Mapping, NumOperands); in getInstrMapping() 287 unsigned NumOperands in getInstrMapping() 226 unsigned NumOperands = MI.getNumOperands(); getInstrPartialMappingIdxs() local 242 unsigned NumOperands = MI.getNumOperands(); getInstrValueMapping() local 264 unsigned NumOperands = MI.getNumOperands(); getSameOperandsMapping() local 304 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local 314 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local 437 unsigned NumOperands = MI.getNumOperands(); getInstrAlternativeMappings() local [all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNDPPCombine.cpp | 245 int NumOperands = 0; in createDPPInst() 248 ++NumOperands; in createDPPInst() 251 if (TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, SDst)) { in createDPPInst() 253 ++NumOperands; in createDPPInst() 260 assert(OldIdx == NumOperands); in createDPPInst() 269 ++NumOperands; in createDPPInst() 284 assert(NumOperands == AMDGPU::getNamedOperandIdx(DPPOp, in createDPPInst() 289 ++NumOperands; in createDPPInst() 292 ++NumOperands; in createDPPInst() 296 int Src0Idx = NumOperands; in createDPPInst() 241 int NumOperands = 0; createDPPInst() local [all...] |
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 204 unsigned NumOperands = 0; variable 220 unsigned NumOperands) in InstructionMapping() argument 222 NumOperands(NumOperands) {} in InstructionMapping() 235 unsigned getNumOperands() const { return NumOperands; } in getNumOperands() 529 unsigned NumOperands = 0) const; 536 unsigned NumOperands) const { in getInstructionMapping() argument 538 OperandsMapping, NumOperands); in getInstructionMapping()
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| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXGenericToNVVM.cpp | 179 unsigned NumOperands = C->getNumOperands(); in remapConstantVectorOrConstantAggregate() 183 for (unsigned i = 0; i < NumOperands; ++i) { in remapConstantVectorOrConstantAggregate() 200 for (unsigned i = 0; i < NumOperands; ++i) { in remapConstantVectorOrConstantAggregate() 205 for (unsigned i = 0; i < NumOperands; ++i) { in remapConstantVectorOrConstantAggregate() 218 unsigned NumOperands = C->getNumOperands(); in remapConstantExpr() 222 for (unsigned i = 0; i < NumOperands; ++i) { in remapConstantExpr() 253 ArrayRef(&NewOperands[1], NumOperands - 1), "", in remapConstantExpr() 180 unsigned NumOperands = C->getNumOperands(); remapConstantVectorOrConstantAggregate() local 219 unsigned NumOperands = C->getNumOperands(); remapConstantExpr() local
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| /llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVRegisterBankInfo.cpp | 225 unsigned NumOperands = MI.getNumOperands(); in anyUseOnlyUseFP() 275 for (unsigned Idx = 1; Idx != NumOperands; ++Idx) { in getInstrMapping() 285 return getInstructionMapping(DefaultMappingID, 1, Mapping, NumOperands); in getInstrMapping() 290 NumOperands); in getInstrMapping() 307 NumOperands); in getInstrMapping() 311 SmallVector<const ValueMapping *, 4> OpdsMapping(NumOperands); in getInstrMapping() 505 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) { in getInstrMapping() 525 getOperandsMapping(OpdsMapping), NumOperands); in getInstrMapping() 267 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 275 /*NumOperands*/ 3); in getRegBankFromRegClass() 278 /*NumOperands*/ 3); in getRegBankFromRegClass() 298 /*NumOperands*/ 2); 302 /*NumOperands*/ 2); in getInstrAlternativeMappings() 309 /*NumOperands*/ 2); in getInstrAlternativeMappings() 316 /*NumOperands*/ 2); in getInstrAlternativeMappings() 341 /*NumOperands*/ 2); in getInstrAlternativeMappings() 348 /*NumOperands*/ 2); in getInstrAlternativeMappings() 414 unsigned NumOperands = MI.getNumOperands(); in applyMappingImpl() 415 assert(NumOperands < in applyMappingImpl() 461 unsigned NumOperands = MI.getNumOperands(); getSameKindOfOperandsMapping() local 773 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local 1019 for (unsigned Idx = 0, NumOperands = MI.getNumOperands(); getInstrMapping() local 1093 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local [all...] |
| /llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBankInfo.cpp | 68 unsigned NumOperands = MI.getNumOperands(); 85 assert(NumOperands <= 3 && in getInstrMapping() 196 SmallVector<const ValueMapping *, 8> OpdsMapping(NumOperands); in getInstrMapping() 215 NumOperands); in getInstrMapping() 221 return getInstructionMapping(MappingID, Cost, OperandsMapping, NumOperands); in getInstrMapping() 87 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorLoopCarriedReuse.cpp | 338 unsigned NumOperands = I1->getNumOperands(); in isEquivalentOperation() 339 for (unsigned i = 0; i < NumOperands; ++i) { in isEquivalentOperation() 422 int NumOperands = I->getNumOperands(); in findValueToReuse() 437 for (int OpNo = 0; OpNo < NumOperands; ++OpNo) { in findValueToReuse() 441 for (int T = 0; T < NumOperands; ++T) { in findValueToReuse() 469 for (int OpNo = 0; OpNo < NumOperands; ++OpNo) { in findValueToReuse() 521 int NumOperands = Inst2Replace->getNumOperands(); in reuseValue() 532 for (int j = 0; j < NumOperands; ++j) { in reuseValue() 341 unsigned NumOperands = I1->getNumOperands(); isEquivalentOperation() local 425 int NumOperands = I->getNumOperands(); findValueToReuse() local 524 int NumOperands = Inst2Replace->getNumOperands(); reuseValue() local
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| /llvm-project/llvm/tools/llvm-reduce/deltas/ |
| H A D | ReduceRegisterDefs.cpp | 41 int NumOperands = MI.getNumOperands(); in removeDefsFromFunction() local 49 for (int I = NumOperands - 1; I >= 0; --I) { in removeDefsFromFunction() 68 for (int I = NumOperands - 1; I >= 0; --I) { in removeDefsFromFunction()
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| H A D | ReduceRegisterUses.cpp | 30 int NumOperands = MI.getNumOperands(); in removeUsesFromFunction() local 35 for (int I = NumOperands - 1; I >= 0; --I) { in removeUsesFromFunction()
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| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 206 unsigned short NumOperands; // Num of args (may be more if variable_ops) variable 221 if (OpNum < NumOperands && in getOperandConstraint() 237 unsigned getNumOperands() const { return NumOperands; } in getNumOperands() 241 return ArrayRef(OpInfo + OpInfoOffset, NumOperands); in operands()
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 377 unsigned NumOperands) { in hashInstructionMapping() 378 return hash_combine(ID, Cost, OperandsMapping, NumOperands); in hashInstructionMapping() argument 385 unsigned NumOperands) const { in getInstructionMappingImpl() 387 OperandsMapping == nullptr && NumOperands == 0) || in getInstructionMappingImpl() 393 hashInstructionMapping(ID, Cost, OperandsMapping, NumOperands); in getInstructionMappingImpl() 402 ID, Cost, OperandsMapping, NumOperands); in getInstructionMappingImpl() 609 assert(NumOperands == (isCopyLike(MI) ? 1 : MI.getNumOperands()) && in verify() 610 "NumOperands must match, see constructor"); in verify() 618 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) { in verify() 655 for (unsigned OpIdx = 0; OpIdx != NumOperands; in print() [all...] |
| H A D | MachineInstr.cpp | 101 : MCID(&TID), NumOperands(0), Flags(0), AsmPrinterFlags(0), in MachineInstr() 120 : MCID(&MI.getDesc()), NumOperands(0), Flags(0), AsmPrinterFlags(0), in MachineInstr() 206 assert(isUInt<LLVM_MI_NUMOPERANDS_BITS>(NumOperands + 1) && in addOperand() 211 if (&Op >= Operands && &Op < Operands + NumOperands) { in addOperand() 253 if (OpNo != NumOperands) in addOperand() 254 moveOperands(Operands + OpNo + 1, OldOperands + OpNo, NumOperands - OpNo, in addOperand() 256 ++NumOperands; in addOperand() 314 if (unsigned N = NumOperands - 1 - OpNo) in removeOperand() 316 --NumOperands; in removeOperand() 797 unsigned NumOperands in getNumExplicitOperands() 791 unsigned NumOperands = MCID->getNumOperands(); getNumExplicitOperands() local 2583 unsigned NumOperands = getNumOperands(); insert() local [all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupInstTuning.cpp | 84 unsigned NumOperands = MI.getDesc().getNumOperands(); in processInstruction() 135 unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm(); in processInstruction() 136 MI.removeOperand(NumOperands - 1); in processInstruction() 137 MI.addOperand(MI.getOperand(NumOperands - 2)); in processInstruction() 150 unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm(); in processInstruction() 151 MI.removeOperand(NumOperands - 1); in processInstruction() 152 MI.addOperand(MI.getOperand(NumOperands - 2)); in processInstruction() 85 unsigned NumOperands = MI.getDesc().getNumOperands(); processInstruction() local
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| H A D | X86GenRegisterBankInfo.def | 102 unsigned NumOperands) { 105 if (NumOperands <= 3 && (Idx >= PMI_GPR8 && Idx <= PMI_PSR80))
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| /llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILOpLowering.cpp | 60 // Note: arg[NumOperands-1] is a pointer and is not needed by our flattening. in argVectorFlatten() 61 unsigned NumOperands = Orig->getNumOperands() - 1; in argVectorFlatten() 62 assert(NumOperands > 0); in argVectorFlatten() 67 for (unsigned I = 1; I < NumOperands; ++I) { in argVectorFlatten() 57 unsigned NumOperands = Orig->getNumOperands() - 1; argVectorFlatten() local
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| /llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kRegisterBankInfo.cpp | 73 unsigned NumOperands = MI.getNumOperands(); in getInstrMapping() 98 NumOperands); in getInstrMapping() 79 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local
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| /llvm-project/llvm/lib/Analysis/ |
| H A D | TypeBasedAliasAnalysis.cpp | 308 const unsigned NumOperands = Operands.size(); in getField() local 312 if (NumOperands < 6) in getField() 316 if (NumOperands < 2) in getField() 321 if (NumOperands <= 3) { in getField() 323 NumOperands == 2 in getField() 340 for (unsigned Idx = FirstFieldOpNo; Idx < NumOperands; in getField() 353 TheIdx = NumOperands - NumOpsPerField; in getField()
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| /llvm-project/llvm/include/llvm/IR/ |
| H A D | InlineAsm.h | 306 using NumOperands = Bitfield::Element<unsigned, 3, 13>; variable 323 Bitfield::set<NumOperands>(Storage, NumOps); in Flag() 358 return Bitfield::get<NumOperands>(Storage); in getNumOperandRegisters()
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| H A D | Instructions.h | 2603 /// The number of operands actually allocated. NumOperands is 2845 /// The number of operands actually allocated. NumOperands is 4061 /// The number of operands actually allocated. NumOperands is
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| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenTarget.h | 241 unsigned NumOperands; 253 unsigned getNumOperands() const { return NumOperands; } 236 unsigned NumOperands; global() variable
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterBankInfo.cpp | 189 unsigned NumOperands = MI.getNumOperands(); in getRegBankFromRegClass() 418 SmallVector<const ValueMapping *, 4> OperandBanks(NumOperands); in getInstrMapping() 444 for (unsigned i = 0; i < NumOperands; i++) { in getInstrMapping() 455 NumOperands); in getInstrMapping() 227 unsigned NumOperands = MI.getNumOperands(); getInstrMapping() local
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| /llvm-project/llvm/test/Analysis/CostModel/SystemZ/ |
| H A D | intrinsic-cost-crash.ll | 32 %NumOperands.i = getelementptr inbounds %"class.llvm::SDNode.310.1762.9990.10474.10958.11442.11926.12410.12894.13378.13862.15314.15798.16282.17734.19186.21122.25962.26930.29350.29834.30318.30802.31286.31770.32254.32738.33706.36610.38062.41642", ptr %N, i64 0, i32 8 33 %0 = load i16, ptr %NumOperands.i, align 8, !tbaa !1
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