When store nodes or memcpy nodes are created to copy the function call
arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and
integer offset operands rather than frame object op

When store nodes or memcpy nodes are created to copy the function call
arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and
integer offset operands rather than frame object operands.

llvm-svn: 161068

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Eliminate the stack slot used to save the global base register.

The long branch pass (fixed in r160601) no longer uses the global base register
to compute addresses of branch destinations, so it is

Eliminate the stack slot used to save the global base register.

The long branch pass (fixed in r160601) no longer uses the global base register
to compute addresses of branch destinations, so it is not necessary to reserve
a slot on the stack.

llvm-svn: 160703

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Add basic ability to setup call frame, and make procedure calls.
Hello world will compile and execute with this patch.

Patch by Reed Kotler.

llvm-svn: 160651

Revert accidental commit.

llvm-svn: 160598

Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.

Test case will be added later when long branch patch is checked in.

llvm-svn: 160597

Lower RETURNADDR node in Mips backend.

Patch by Sasa Stankovic.

llvm-svn: 160031

Make register Mips::RA allocatable if not in mips16 mode.

llvm-svn: 159971

Fix bug in computation of stack size in MipsFrameLowering.cpp.

llvm-svn: 159240

1. fix null program output after some other changes
2. re-enable null.ll test
3. fix some minor style violations

Patch by Reed Kotler.

llvm-svn: 158935

Fix coding style violations. Remove white spaces and tabs.

llvm-svn: 158471

In MipsFrameLowering::emitPrologue and emitEpilogue, call Mips::loadImmediate
to load an immediate that does not fit into 16-bit. Also, take into
consideration the global base register slot on the st

In MipsFrameLowering::emitPrologue and emitEpilogue, call Mips::loadImmediate
to load an immediate that does not fit into 16-bit. Also, take into
consideration the global base register slot on the stack when computing the
stack size.

llvm-svn: 158430

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Fix some uses of getSubRegisters() to use getSubReg() instead.

It is better to address sub-registers directly by name instead of
relying on their position in the sub-register list.

llvm-svn: 157703

Make the following changes in MipsFrameLowering.cpp:

- Stop emitting instructions needed to initialize the global pointer register.
- Stop emitting .cprestore directive.
- Do not take into account t

Make the following changes in MipsFrameLowering.cpp:

- Stop emitting instructions needed to initialize the global pointer register.
- Stop emitting .cprestore directive.
- Do not take into account the $gp save slot when computing stack size.

llvm-svn: 156691

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Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

llvm-svn: 155188

Emit all directives except for ".cprestore" during asm printing rather than emit
them as machine instructions. Directives ".set noat" and ".set at" are now
emitted only at the beginning and end of a

Emit all directives except for ".cprestore" during asm printing rather than emit
them as machine instructions. Directives ".set noat" and ".set at" are now
emitted only at the beginning and end of a function except in the case where
they are emitted to enclose .cpload with an immediate operand that doesn't fit
in 16-bit field or unaligned load/stores.

Also, make the following changes:
- Remove function isUnalignedLoadStore and use a switch-case statement to
determine whether an instruction is an unaligned load or store.

- Define helper function CreateMCInst which generates an instance of an MCInst
from an opcode and a list of operands.

llvm-svn: 153552

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Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.

llvm-svn: 152997

Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.

llvm-svn: 152016

remove blanks, and some code format

llvm-svn: 151625

Add an option to use a virtual register as the global base register instead of
reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the valu

Add an option to use a virtual register as the global base register instead of
reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register.

example:

.cpload $25 // set $gp.
...
.cprestore 16 // store $gp to stack slot 16($sp).
...
jalr $25 // function call. clobbers $gp.
lw $gp, 16($sp) // not emitted if callee-saved reg is chosen.
...
lw $2, 4($gp)
...
jalr $25 // function call.
lw $gp, 16($sp) // not emitted if $gp is not live after this instruction.
...

llvm-svn: 151402

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remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.

llvm-svn: 150805

Mark 64-bit register RA_64 unused too.


llvm-svn: 148918

Modify MipsFrameLowering::emitPrologue and emitEpilogue.

- Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit.
- Change the types of variables so that they are sufficiently larg

Modify MipsFrameLowering::emitPrologue and emitEpilogue.

- Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit.
- Change the types of variables so that they are sufficiently large to handle
64-bit pointers.
- Emit instructions to set register $28 in a function prologue after
instructions which store callee-saved registers have been emitted.


llvm-svn: 148917

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Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality c

Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.

llvm-svn: 145714

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Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit
registers and instructions when ABI is N64.

llvm-svn: 144666

Set nomacro before emitting the sequence of instructions that set global pointer
register.

llvm-svn: 144665