| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineFunctionInfo.cpp | 189 addPrivateSegmentBuffer(const SIRegisterInfo & TRI) addPrivateSegmentBuffer() argument
197 addDispatchPtr(const SIRegisterInfo & TRI) addDispatchPtr() argument
204 addQueuePtr(const SIRegisterInfo & TRI) addQueuePtr() argument
211 addKernargSegmentPtr(const SIRegisterInfo & TRI) addKernargSegmentPtr() argument
219 addDispatchID(const SIRegisterInfo & TRI) addDispatchID() argument
226 addFlatScratchInit(const SIRegisterInfo & TRI) addFlatScratchInit() argument
233 addImplicitBufferPtr(const SIRegisterInfo & TRI) addImplicitBufferPtr() argument
247 addPreloadedKernArg(const SIRegisterInfo & TRI,const TargetRegisterClass * RC,unsigned AllocSizeDWord,int KernArgIdx,int PaddingSGPRs) addPreloadedKernArg() argument
317 const SIRegisterInfo *TRI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); shiftSpillPhysVGPRsToLowestRange() local
361 const SIRegisterInfo *TRI = ST.getRegisterInfo(); allocatePhysicalVGPRForSGPRSpills() local
464 const SIRegisterInfo *TRI = ST.getRegisterInfo(); allocateVGPRSpillToAGPR() local
552 getScavengeFI(MachineFrameInfo & MFI,const SIRegisterInfo & TRI) getScavengeFI() argument
607 regToString(Register Reg,const TargetRegisterInfo & TRI) regToString() argument
618 convertArgumentInfo(const AMDGPUFunctionArgInfo & ArgInfo,const TargetRegisterInfo & TRI) convertArgumentInfo() argument
670 SIMachineFunctionInfo(const llvm::SIMachineFunctionInfo & MFI,const TargetRegisterInfo & TRI,const llvm::MachineFunction & MF) SIMachineFunctionInfo() argument
[all...] |
| H A D | SIFrameLowering.cpp | 80 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister() local
134 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI, in buildPrologSpill() argument
158 buildEpilogRestore(const GCNSubtarget & ST,const SIRegisterInfo & TRI,const SIMachineFunctionInfo & FuncInfo,LiveRegUnits & LiveUnits,MachineFunction & MF,MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,Register SpillReg,int FI,Register FrameReg,int64_t DwordOff=0) buildEpilogRestore() argument
182 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); buildGitPtr() local
202 initLiveUnits(LiveRegUnits & LiveUnits,const SIRegisterInfo & TRI,const SIMachineFunctionInfo * FuncInfo,MachineFunction & MF,MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,bool IsProlog) initLiveUnits() argument
232 const SIRegisterInfo &TRI; global() member in llvm::PrologEpilogSGPRSpillBuilder
342 PrologEpilogSGPRSpillBuilder(Register Reg,const PrologEpilogSGPRSaveRestoreInfo SI,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,const SIInstrInfo * TII,const SIRegisterInfo & TRI,LiveRegUnits & LiveUnits,Register FrameReg) PrologEpilogSGPRSpillBuilder() argument
387 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); emitEntryFunctionFlatScratchInit() local
543 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); getEntryFunctionReservedScratchRsrcReg() local
612 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); emitEntryFunctionPrologue() local
730 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); emitEntryFunctionScratchRsrcRegSetup() local
891 const SIRegisterInfo &TRI = TII->getRegisterInfo(); buildScratchExecCopy() local
922 const SIRegisterInfo &TRI = TII->getRegisterInfo(); emitCSRSpillStores() local
1008 const SIRegisterInfo &TRI = TII->getRegisterInfo(); emitCSRSpillRestores() local
1080 const SIRegisterInfo &TRI = TII->getRegisterInfo(); emitPrologue() local
1229 const SIRegisterInfo &TRI = TII->getRegisterInfo(); emitEpilogue() local
1334 const SIRegisterInfo *TRI = ST.getRegisterInfo(); processFunctionBeforeFrameFinalized() local
1450 const SIRegisterInfo *TRI = ST.getRegisterInfo(); processFunctionBeforeFrameIndicesReplaced() local
1496 const SIRegisterInfo *TRI = ST.getRegisterInfo(); determinePrologEpilogSGPRSaves() local
1571 const SIRegisterInfo *TRI = ST.getRegisterInfo(); determineCalleeSaves() local
1648 const SIRegisterInfo *TRI = ST.getRegisterInfo(); determineCalleeSavesSGPR() local
1685 assignCalleeSavedSpillSlots(MachineFunction & MF,const TargetRegisterInfo * TRI,std::vector<CalleeSavedInfo> & CSI) const assignCalleeSavedSpillSlots() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveRegUnits.h | 31 const TargetRegisterInfo *TRI = nullptr; variable
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits() argument
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed() argument
73 void init(const TargetRegisterInfo &TRI) { in init() argument
[all...] |
| H A D | LivePhysRegs.h | 51 const TargetRegisterInfo *TRI = nullptr; global() variable
60 LivePhysRegs(const TargetRegisterInfo & TRI) LivePhysRegs() argument
68 init(const TargetRegisterInfo & TRI) init() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFrameLowering.cpp | 95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
|
| H A D | MipsMachineFunction.cpp | 158 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEhDataRegsFI() local
176 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createISRRegFI() local
203 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getMoveF64ViaSpillFI() local
|
| H A D | MipsInstrInfo.h | 140 const TargetRegisterInfo *TRI, in storeRegToStackSlot()
148 const TargetRegisterInfo *TRI, in loadRegFromStackSlot()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreMachineFunctionInfo.cpp | 46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBankInfo.cpp | 30 PPCRegisterBankInfo(const TargetRegisterInfo & TRI) PPCRegisterBankInfo() argument
84 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); getInstrMapping() local
290 hasFPConstraints(const MachineInstr & MI,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,unsigned Depth) const hasFPConstraints() argument
333 onlyUsesFP(const MachineInstr & MI,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,unsigned Depth) const onlyUsesFP() argument
352 onlyDefinesFP(const MachineInstr & MI,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,unsigned Depth) const onlyDefinesFP() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MIRPrinter.cpp | 187 printRegMIR(unsigned Reg,yaml::StringValue & Dest,const TargetRegisterInfo * TRI) printRegMIR() argument
267 printCustomRegMask(const uint32_t * RegMask,raw_ostream & OS,const TargetRegisterInfo * TRI) printCustomRegMask() argument
287 printRegClassOrBank(unsigned Reg,yaml::StringValue & Dest,const MachineRegisterInfo & RegInfo,const TargetRegisterInfo * TRI) printRegClassOrBank() argument
310 convert(yaml::MachineFunction & MF,const MachineRegisterInfo & RegInfo,const TargetRegisterInfo * TRI) convert() argument
383 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); convertEntryValueObjects() local
397 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); convertStackObjects() local
530 const auto *TRI = MF.getSubtarget().getRegisterInfo(); convertCallSiteObjects() local
616 const auto *TRI = MF.getSubtarget().getRegisterInfo(); initRegisterMaskIds() local
714 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); print() local
754 const auto *TRI = SubTarget.getRegisterInfo(); print() local
905 print(const MachineInstr & MI,unsigned OpIdx,const TargetRegisterInfo * TRI,const TargetInstrInfo * TII,bool ShouldPrintRegisterTies,LLT TypeToPrint,bool PrintDef) print() argument
[all...] |
| H A D | MachineOperand.cpp | 84 const TargetRegisterInfo &TRI) { in substVirtReg() argument
93 void MachineOperand::substPhysReg(MCRegister Reg, const TargetRegisterInfo &TRI) { in substPhysReg() argument
360 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in isIdenticalTo() local
422 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in hash_value() local
456 const TargetRegisterInfo *&TRI, in tryToGetTargetInfo() argument
492 printCFIRegister(unsigned DwarfReg,raw_ostream & OS,const TargetRegisterInfo * TRI) printCFIRegister() argument
570 printSubRegIdx(raw_ostream & OS,uint64_t Index,const TargetRegisterInfo * TRI) printSubRegIdx() argument
665 printCFI(raw_ostream & OS,const MCCFIInstruction & CFI,const TargetRegisterInfo * TRI) printCFI() argument
779 print(raw_ostream & OS,const TargetRegisterInfo * TRI,const TargetIntrinsicInfo * IntrinsicInfo) const print() argument
785 print(raw_ostream & OS,LLT TypeToPrint,const TargetRegisterInfo * TRI,const TargetIntrinsicInfo * IntrinsicInfo) const print() argument
800 print(raw_ostream & OS,ModuleSlotTracker & MST,LLT TypeToPrint,std::optional<unsigned> OpIdx,bool PrintDef,bool IsStandalone,bool ShouldPrintRegisterTies,unsigned TiedOperandIdx,const TargetRegisterInfo * TRI,const TargetIntrinsicInfo * IntrinsicInfo) const print() argument
[all...] |
| H A D | MachineRegisterInfo.cpp | 604 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in disableCalleeSavedRegister() local
383 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); replaceRegWith() local
469 EmitLiveInCopies(MachineBasicBlock * EntryMBB,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII) EmitLiveInCopies() argument
520 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); isConstantPhysReg() local
578 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); isPhysRegModified() local
593 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); isPhysRegUsed() local
645 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); isReservedRegUnit() local
[all...] |
| H A D | MachineCopyPropagation.cpp | 121 markRegsUnavailable(ArrayRef<MCRegister> Regs,const TargetRegisterInfo & TRI) markRegsUnavailable() argument
133 invalidateRegister(MCRegister Reg,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII,bool UseCopyInstr) invalidateRegister() argument
165 clobberRegister(MCRegister Reg,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII,bool UseCopyInstr) clobberRegister() argument
226 trackCopy(MachineInstr * MI,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII,bool UseCopyInstr) trackCopy() argument
255 findCopyForUnit(MCRegister RegUnit,const TargetRegisterInfo & TRI,bool MustBeAvailable=false) findCopyForUnit() argument
266 findCopyDefViaUnit(MCRegister RegUnit,const TargetRegisterInfo & TRI) findCopyDefViaUnit() argument
277 findAvailBackwardCopy(MachineInstr & I,MCRegister Reg,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII,bool UseCopyInstr) findAvailBackwardCopy() argument
305 findAvailCopy(MachineInstr & DestCopy,MCRegister Reg,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII,bool UseCopyInstr) findAvailCopy() argument
338 findLastSeenDefInCopy(const MachineInstr & Current,MCRegister Reg,const TargetRegisterInfo & TRI,const TargetInstrInfo & TII,bool UseCopyInstr) findLastSeenDefInCopy() argument
369 findLastSeenUseInCopy(MCRegister Reg,const TargetRegisterInfo & TRI) findLastSeenUseInCopy() argument
383 const TargetRegisterInfo *TRI = nullptr; global() member in __anon783e8d5a0111::MachineCopyPropagation
473 isNopCopy(const MachineInstr & PreviousCopy,MCRegister Src,MCRegister Def,const TargetRegisterInfo * TRI,const TargetInstrInfo * TII,bool UseCopyInstr) isNopCopy() argument
[all...] |
| H A D | InterferenceCache.cpp | 90 const TargetRegisterInfo *TRI) { in revalidate() argument
102 const TargetRegisterInfo *TRI, in reset() argument
120 valid(LiveIntervalUnion * LIUArray,const TargetRegisterInfo * TRI) valid() argument
[all...] |
| H A D | TargetRegisterInfo.cpp | 112 printReg(Register Reg,const TargetRegisterInfo * TRI,unsigned SubIdx,const MachineRegisterInfo * MRI) printReg() argument
143 printRegUnit(unsigned Unit,const TargetRegisterInfo * TRI) printRegUnit() argument
166 printVRegOrUnit(unsigned Unit,const TargetRegisterInfo * TRI) printVRegOrUnit() argument
177 printRegClassOrBank(Register Reg,const MachineRegisterInfo & RegInfo,const TargetRegisterInfo * TRI) printRegClassOrBank() argument
282 firstCommonClass(const uint32_t * A,const uint32_t * B,const TargetRegisterInfo * TRI) firstCommonClass() argument
383 shareSameRegisterFile(const TargetRegisterInfo & TRI,const TargetRegisterClass * DefRC,unsigned DefSubReg,const TargetRegisterClass * SrcRC,unsigned SrcSubReg) shareSameRegisterFile() argument
675 dumpReg(Register Reg,unsigned SubRegIndex,const TargetRegisterInfo * TRI) dumpReg() argument
[all...] |
| H A D | LiveRangeEdit.cpp | 139 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); in allUsesAvailableAt() local
272 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in useIsKill() local
406 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); in eliminateDeadDef() local
415 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in eliminateDeadDef() local
[all...] |
| H A D | FixupStatepointCallerSaved.cpp | 92 static unsigned getRegisterSize(const TargetRegisterInfo &TRI, Register Reg) { in getRegisterSize() argument
113 const TargetRegisterInfo &TRI) { in performCopyPropagation() argument
211 const TargetRegisterInfo &TRI; global() member in __anon44967f430211::FrameIndexesCache
235 FrameIndexesCache(MachineFrameInfo & MFI,const TargetRegisterInfo & TRI) FrameIndexesCache() argument
319 const TargetRegisterInfo &TRI; global() member in __anon44967f430211::StatepointState
566 const TargetRegisterInfo &TRI; global() member in __anon44967f430211::StatepointProcessor
[all...] |
| H A D | RegUsageInfoCollector.cpp | 102 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in runOnMachineFunction() local
197 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); computeCalleeSavedRegs() local
[all...] |
| H A D | TargetFrameLoweringImpl.cpp | 85 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves() local
71 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); getCalleeSaves() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 51 spillCalleeSavedRegisters(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,ArrayRef<CalleeSavedInfo> CSI,const TargetRegisterInfo * TRI) spillCalleeSavedRegisters() argument
59 restoreCalleeSavedRegisters(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,MutableArrayRef<CalleeSavedInfo> CSI,const TargetRegisterInfo * TRI) restoreCalleeSavedRegisters() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMIChecking.cpp | 35 const TargetRegisterInfo *TRI; global() member
107 hasLiveDefs(const MachineInstr & MI,const TargetRegisterInfo * TRI) hasLiveDefs() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 46 AArch64RegisterBankInfo(const TargetRegisterInfo & TRI) AArch64RegisterBankInfo() argument
296 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); getInstrAlternativeMappings() local
523 hasFPConstraints(const MachineInstr & MI,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,unsigned Depth) const hasFPConstraints() argument
561 onlyUsesFP(const MachineInstr & MI,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,unsigned Depth) const onlyUsesFP() argument
578 onlyDefinesFP(const MachineInstr & MI,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,unsigned Depth) const onlyDefinesFP() argument
668 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); getInstrMapping() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.h | 27 const TargetRegisterInfo *TRI; variable
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/GISel/ |
| H A D | BPFRegisterBankInfo.cpp | 24 BPFRegisterBankInfo::BPFRegisterBankInfo(const TargetRegisterInfo &TRI) in BPFRegisterBankInfo()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 248 const TargetRegisterInfo *TRI = &getRegisterInfo(); in insertBranch() local
331 const TargetRegisterInfo *TRI) { in copyPhysSubRegs() argument
375 const TargetRegisterInfo *TRI = &getRegisterInfo(); in copyPhysReg() local
404 const TargetRegisterInfo *TRI = &getRegisterInfo(); copyPhysReg() local
463 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
526 loadRegFromStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register DestReg,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const loadRegFromStackSlot() argument
979 const TargetRegisterInfo *TRI = &getRegisterInfo(); expandPostRAPseudo() local
[all...] |