| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 361 Register ResultReg = createResultReg(&AArch64::GPR64spRegClass); fastMaterializeAlloca() local
384 Register ResultReg = createResultReg(RC); materializeInt() local
420 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); materializeFP() local
438 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); materializeFP() local
462 unsigned ResultReg; materializeGV() local
1064 Register ResultReg = createResultReg(&AArch64::GPR64spRegClass); simplifyAddress() local
1075 unsigned ResultReg = 0; simplifyAddress() local
1109 unsigned ResultReg; simplifyAddress() local
1215 unsigned ResultReg = 0; emitAddSub() local
1320 unsigned ResultReg; emitAddSub_rr() local
1365 unsigned ResultReg; emitAddSub_ri() local
1406 unsigned ResultReg; emitAddSub_rs() local
1450 unsigned ResultReg; emitAddSub_rx() local
1544 unsigned ResultReg; emitAdd_ri_() local
1602 unsigned ResultReg = 0; emitLogicalOp() local
1694 Register ResultReg = emitLogicalOp_ri() local
1736 Register ResultReg = emitLogicalOp_rs() local
1862 Register ResultReg = createResultReg(RC); emitLoad() local
1896 unsigned ResultReg; selectAddSub() local
1922 unsigned ResultReg; selectLogicalOp() local
1991 unsigned ResultReg = selectLoad() local
2539 unsigned ResultReg = 0; selectCmp() local
2662 Register ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg, optimizeSelect() local
2783 Register ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src2Reg, CC); selectSelect() local
2797 Register ResultReg = createResultReg(&AArch64::FPR64RegClass); selectFPExt() local
2813 Register ResultReg = createResultReg(&AArch64::FPR32RegClass); selectFPTrunc() local
2846 Register ResultReg = createResultReg( selectFPToInt() local
2892 Register ResultReg = fastEmitInst_r(Opc, TLI.getRegClassFor(DestVT), SrcReg); selectIntToFP() local
3000 Register ResultReg = createResultReg(RC); fastLowerArguments() local
3112 Register ResultReg = FuncInfo.CreateRegs(CLI.RetTy); finishCall() local
3321 unsigned ResultReg = emitLoad(VT, VT, Src); tryEmitSmallMemCpy() local
3465 Register ResultReg = createResultReg(&AArch64::GPR64spRegClass); fastLowerIntrinsicCall() local
3600 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); fastLowerIntrinsicCall() local
3626 unsigned ResultReg = fastEmit_r(VT, VT, ISD::FSQRT, Op0Reg); fastLowerIntrinsicCall() local
3822 Register ResultReg = fastLowerIntrinsicCall() local
3966 unsigned ResultReg; selectTrunc() local
4009 unsigned ResultReg = emitAnd_ri(MVT::i32, SrcReg, 1); emiti1Ext() local
4085 Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg); emitLSL_rr() local
4111 Register ResultReg = createResultReg(RC); emitLSL_ri() local
4188 Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg); emitLSR_rr() local
4214 Register ResultReg = createResultReg(RC); emitLSR_ri() local
4304 Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg); emitASR_rr() local
4330 Register ResultReg = createResultReg(RC); emitASR_ri() local
4577 Register ResultReg = createResultReg(&AArch64::GPR64RegClass); selectIntExt() local
4591 unsigned ResultReg = emitIntExt(SrcVT, SrcReg, RetVT, IsZExt); selectIntExt() local
4635 Register ResultReg = fastEmitInst_rrr(MSubOpc, RC, QuotReg, Src1Reg, Src0Reg); selectRem() local
4684 unsigned ResultReg = selectMul() local
4701 unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src1Reg); selectMul() local
4719 unsigned ResultReg = 0; selectShift() local
4775 unsigned ResultReg = 0; selectShift() local
4828 Register ResultReg = fastEmitInst_r(Opc, RC, Op0Reg); selectBitCast() local
4893 unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Lg2); selectSDiv() local
4926 unsigned ResultReg; selectSDiv() local
[all...] |
| H A D | AArch64InstrInfo.cpp | 6616 Register ResultReg = Root.getOperand(0).getReg(); genFusedMultiply() local
6681 Register ResultReg = Root.getOperand(0).getReg(); genFNegatedMAD() local
6734 Register ResultReg = Root.getOperand(0).getReg(); genIndexedMultiply() local
6847 Register ResultReg = Root.getOperand(0).getReg(); genMaddR() local
6886 Register ResultReg = Root.getOperand(0).getReg(); genSubAdd2SubSub() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 317 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad() argument
701 unsigned &ResultReg) { in X86FastEmitExtend() argument
1348 unsigned ResultReg = 0; X86SelectLoad() local
1448 unsigned ResultReg = 0; X86SelectCmp() local
1537 Register ResultReg = getRegForValue(I->getOperand(0)); X86SelectZExt() local
1595 Register ResultReg = getRegForValue(I->getOperand(0)); X86SelectSExt() local
1850 Register ResultReg = createResultReg(RC); X86SelectShift() local
1993 unsigned ResultReg = 0; X86SelectDivRem() local
2138 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); X86FastEmitCMoveSelect() local
2194 unsigned ResultReg; X86FastEmitSSESelect() local
2338 Register ResultReg = X86FastEmitPseudoSelect() local
2364 Register ResultReg = createResultReg(RC); X86SelectSelect() local
2437 Register ResultReg = fastEmitInst_rr(Opcode, RC, ImplicitDefReg, OpReg); X86SelectIntToFP() local
2471 Register ResultReg = createResultReg(RC); X86SelectFPExtOrFPTrunc() local
2534 Register ResultReg = fastEmitInst_extractsubreg(MVT::i8, InputReg, X86SelectTrunc() local
2607 unsigned ResultReg = 0; fastLowerIntrinsicCall() local
2829 Register ResultReg = createResultReg(RC); fastLowerIntrinsicCall() local
2892 unsigned ResultReg = 0; fastLowerIntrinsicCall() local
3023 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); fastLowerIntrinsicCall() local
3077 Register ResultReg = fastEmitInst_rr(Opc, RC, LHSReg, RHSReg); fastLowerIntrinsicCall() local
3176 Register ResultReg = createResultReg(RC); fastLowerArguments() local
3304 unsigned ResultReg; fastLowerCall() local
3586 Register ResultReg = FuncInfo.CreateRegs(CLI.RetTy); fastLowerCall() local
3712 Register ResultReg = createResultReg(DstClass); fastSelectInstruction() local
3741 Register ResultReg = createResultReg(&X86::GR64RegClass); X86MaterializeInt() local
3822 Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); X86MaterializeFP() local
3863 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); X86MaterializeGV() local
3917 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); fastMaterializeConstant() local
3947 Register ResultReg = createResultReg(RC); fastMaterializeAlloca() local
3983 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); fastMaterializeFloatZero() local
4041 Register ResultReg = createResultReg(RC); fastEmitInst_rrrr() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 471 Register ResultReg = selectBinaryOp() local
504 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, selectBinaryOp() local
519 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), selectBinaryOp() local
1435 Register ResultReg = getRegForValue(II->getArgOperand(0)); selectIntrinsicCall() local
1478 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), selectCast() local
1508 Register ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0); selectBitCast() local
1529 Register ResultReg = createResultReg(TyRegClass); selectFreeze() local
1686 Register ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, selectFNeg() local
1739 unsigned ResultReg; selectExtractValue() local
1959 Register ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Imm); fastEmit_ri_() local
1998 Register ResultReg = createResultReg(RC); fastEmitInst_() local
2009 Register ResultReg = createResultReg(RC); fastEmitInst_r() local
2031 Register ResultReg = createResultReg(RC); fastEmitInst_rr() local
2055 Register ResultReg = createResultReg(RC); fastEmitInst_rrr() local
2082 Register ResultReg = createResultReg(RC); fastEmitInst_ri() local
2105 Register ResultReg = createResultReg(RC); fastEmitInst_rii() local
2130 Register ResultReg = createResultReg(RC); fastEmitInst_f() local
2150 Register ResultReg = createResultReg(RC); fastEmitInst_rri() local
2173 Register ResultReg = createResultReg(RC); fastEmitInst_i() local
2190 Register ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); fastEmitInst_extractsubreg() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 299 Register ResultReg = createResultReg(RC); in fastEmitInst_r() local
321 Register ResultReg = createResultReg(RC); in fastEmitInst_rr() local
348 Register ResultReg in fastEmitInst_ri() local
373 Register ResultReg = createResultReg(RC); fastEmitInst_i() local
488 unsigned ResultReg = 0; ARMMaterializeInt() local
658 Register ResultReg = createResultReg(RC); fastMaterializeAlloca() local
833 Register ResultReg = createResultReg(RC); ARMSimplifyAddress() local
898 ARMEmitLoad(MVT VT,Register & ResultReg,Address & Addr,MaybeAlign Alignment,bool isZExt,bool allocReg) ARMEmitLoad() argument
1033 Register ResultReg; SelectLoad() local
1562 Register ResultReg = createResultReg(TLI.getRegClassFor(DstVT)); SelectIToFP() local
1589 Register ResultReg = createResultReg(TLI.getRegClassFor(MVT::f32)); SelectFPToI() local
1655 Register ResultReg = createResultReg(RC); SelectSelect() local
1766 Register ResultReg = createResultReg(&ARM::GPRnopcRegClass); SelectBinaryIntOp() local
1815 Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); SelectBinaryFPOp() local
2042 Register ResultReg = createResultReg(DstRC); FinishCall() local
2063 Register ResultReg = createResultReg(DstRC); FinishCall() local
2470 Register ResultReg; ARMTryEmitSmallMemCpy() local
2706 unsigned ResultReg; ARMEmitIntExt() local
2764 unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt); SelectIntExt() local
2806 Register ResultReg = createResultReg(&ARM::GPRnopcRegClass); SelectShift() local
2947 Register ResultReg = MI->getOperand(0).getReg(); tryToFoldLoadIntoMI() local
3070 Register ResultReg = createResultReg(RC); fastLowerArguments() local
[all...] |
| H A D | ARMInstructionSelector.cpp | 688 auto ResultReg = MIB.getReg(0); selectGlobal() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 602 return ResultReg; in fastMaterializeAlloca() local
590 Register ResultReg = createResultReg(MRI.getRegClass(Reg)); copyValue() local
621 Register ResultReg = fastMaterializeConstant() local
719 Register ResultReg = createResultReg(RC); fastLowerArguments() local
774 unsigned ResultReg; selectCall() local
963 Register ResultReg = createResultReg(RC); selectSelect() local
1079 Register ResultReg = createResultReg(&WebAssembly::I32RegClass); selectICmp() local
1140 Register ResultReg = createResultReg(&WebAssembly::I32RegClass); selectFCmp() local
1233 Register ResultReg = createResultReg(RC); selectLoad() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 324 Register ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp() local
340 Register ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca() local
361 Register ResultReg = createResultReg(RC); in materialize32BitInt() local
633 emitCmp(unsigned ResultReg,const CmpInst * CI) emitCmp() argument
752 emitLoad(MVT VT,unsigned & ResultReg,Address & Addr) emitLoad() argument
861 unsigned ResultReg; selectLogicalOp() local
898 unsigned ResultReg; selectLoad() local
979 Register ResultReg = createResultReg(&Mips::GPR32RegClass); selectCmp() local
1052 Register ResultReg = createResultReg(RC); selectSelect() local
1291 Register ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); finishCall() local
1463 Register ResultReg = createResultReg(Allocation[ArgNo].RC); fastLowerArguments() local
1815 Register ResultReg = createResultReg(&Mips::GPR32RegClass); selectIntExt() local
1940 Register ResultReg = createResultReg(&Mips::GPR32RegClass); selectDivRem() local
1959 Register ResultReg = createResultReg(&Mips::GPR32RegClass); selectShift() local
2126 Register ResultReg = createResultReg(RC); fastEmitInst_rr() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 430 Register ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress() local
448 bool PPCFastISel::PPCEmitLoad(MVT VT, Register &ResultReg, Address &Addr, in PPCEmitLoad() argument
609 Register ResultReg = 0; SelectLoad() local
1052 Register ResultReg = 0; PPCMoveToFPReg() local
1177 Register ResultReg = 0; PPCMoveToIntReg() local
1299 Register ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); SelectBinaryIntOp() local
1517 unsigned ResultReg = 0; finishCall() local
1929 Register ResultReg = createResultReg(RC); SelectIntExt() local
2123 Register ResultReg = createResultReg(RC); PPCMaterialize32BitInt() local
2195 Register ResultReg = createResultReg(RC); PPCMaterialize64BitInt() local
2283 Register ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); fastMaterializeAlloca() local
2362 Register ResultReg = MI->getOperand(0).getReg(); tryToFoldLoadIntoMI() local
[all...] |
| H A D | PPCRegisterInfo.cpp | 593 Register ResultReg; in getRegAllocationHints() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 91 Register ResultReg; member
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1032 Register ResultReg = I.getOperand(0).getReg(); selectFCmp() local
1620 unsigned ResultReg; // Register containing the desired result. selectMulDivRem() member
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 7395 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); moveScalarAddSub() local
7512 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); lowerScalarAbs() local
8011 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); splitScalar64BitBCNT() local
8053 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); splitScalar64BitBFE() local
8077 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); splitScalar64BitBFE() local
8187 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); movePackToVALU() local
[all...] |
| H A D | SIRegisterInfo.cpp | 2444 Register ResultReg = eliminateFrameIndex() local
[all...] |
| H A D | SIISelLowering.cpp | 4219 emitLoadM0FromVGPRLoop(const SIInstrInfo * TII,MachineRegisterInfo & MRI,MachineBasicBlock & OrigBB,MachineBasicBlock & LoopBB,const DebugLoc & DL,const MachineOperand & Idx,unsigned InitReg,unsigned ResultReg,unsigned PhiReg,unsigned InitSaveExecReg,int Offset,bool UseGPRIdxMode,Register & SGPRIdxReg) emitLoadM0FromVGPRLoop() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 799 for (unsigned ResultReg : ResultRegs) buildIntrinsic() local
|
| H A D | LegalizerHelper.cpp | 1802 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1Reg).getReg(0); widenScalarMergeValues() local
7057 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0); lowerMergeValues() local
|