| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupLEAs.cpp | 459 Register IndexReg = LeaI->getOperand(1 + X86::AddrIndexReg).getReg(); in checkRegUsage() local
508 Register IndexReg = I->getOperand(1 + X86::AddrIndexReg).getReg(); in optLEAALU() local
567 Register IndexReg = Index.getReg(); in optTwoAddrLEA() local
760 Register IndexReg = Index.getReg(); in processInstrForSlow3OpLEA() local
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| H A D | X86AsmPrinter.cpp | 378 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintLeaMemReference() local
475 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintIntelMemReference() local
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| H A D | X86InsertPrefetch.cpp | 86 Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg(); IsMemOpCompatibleWithPrefetch() local
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| H A D | X86InstrBuilder.h | 54 unsigned IndexReg; member
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| H A D | X86SpeculativeLoadHardening.cpp | 1338 unsigned BaseReg = 0, IndexReg = 0; tracePredStateThroughBlocksAndHarden() local
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| H A D | X86FastISel.cpp | 903 unsigned IndexReg = AM.IndexReg; X86SelectAddress() local
4021 Register IndexReg = constrainOperandRegClass(Result->getDesc(), tryToFoldLoadIntoMI() local
[all...] |
| H A D | X86MCInstLower.cpp | 685 unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg; emitNop() local
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| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.h | 41 Register IndexReg; variable
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| /llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86IntelInstPrinter.cpp | 385 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); printMemReference() local
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| H A D | X86ATTInstPrinter.cpp | 427 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); printMemReference() local
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| H A D | X86MCTargetDesc.cpp | 666 const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg); evaluateMemoryOperandAddress() local
692 const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg); getMemoryOperandRelocationOffset() local
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| H A D | X86MCCodeEmitter.cpp | 615 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); emitMemModRMByte() local
[all...] |
| H A D | X86BaseInfo.h | 1321 needSIB(unsigned BaseReg,unsigned IndexReg,bool In64BitMode) needSIB() argument
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| /llvm-project/llvm/tools/llvm-exegesis/lib/X86/ |
| H A D | Target.cpp | 296 for (const unsigned IndexReg : PossibleIndexRegs.set_bits()) { in generateLEATemplatesCommon() local
360 __anona615e0730202(unsigned BaseReg, unsigned IndexReg, BitVector &CandidateDestRegs) generateCodeTemplates() argument
420 __anona615e0730402(unsigned BaseReg, unsigned IndexReg, BitVector &CandidateDestRegs) generateCodeTemplates() argument
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 420 PPCSimplifyAddress(Address & Addr,bool & UseOffset,unsigned & IndexReg) PPCSimplifyAddress() argument
504 unsigned IndexReg = 0; PPCEmitLoad() local
653 unsigned IndexReg = 0; PPCEmitStore() local
[all...] |
| /llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 433 unsigned BaseReg = 0, IndexReg = 0, TmpReg = 0, Scale = 0; global() member in __anon56d446ff0111::X86AsmParser::IntelExprStateMachine
1297 CheckBaseRegAndIndexRegAndScale(unsigned BaseReg,unsigned IndexReg,unsigned Scale,bool Is64BitMode,StringRef & ErrMsg) CheckBaseRegAndIndexRegAndScale() argument
1751 CreateMemForMSInlineAsm(unsigned SegReg,const MCExpr * Disp,unsigned BaseReg,unsigned IndexReg,unsigned Scale,bool NonAbsMem,SMLoc Start,SMLoc End,unsigned Size,StringRef Identifier,const InlineAsmIdentifierInfo & Info,OperandVector & Operands) CreateMemForMSInlineAsm() argument
2652 unsigned IndexReg = SM.getIndexReg(); parseIntelOperand() local
3040 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; ParseMemOperand() local
[all...] |
| H A D | X86Operand.h | 67 MCRegister IndexReg; member
[all...] |
| /llvm-project/bolt/lib/Core/ |
| H A D | MCPlusBuilder.cpp | 216 uint16_t IndexReg, AllocatorIdTy AllocId) { in setJumpTable()
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| /llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 185 unsigned IndexReg; global() member
1253 MCRegister IndexReg; parseMEMOperand() local
[all...] |
| /llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelDAGToDAG.cpp | 70 SDValue IndexReg; member
[all...] |
| /llvm-project/llvm/include/llvm/MC/MCParser/ |
| H A D | MCTargetAsmParser.h | 69 StringRef IndexReg; member
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| /llvm-project/bolt/lib/Passes/ |
| H A D | IndirectCallPromotion.cpp | 389 unsigned BaseReg, IndexReg; maybeGetHotJumpTableTargets() local
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZAsmPrinter.cpp | 340 Register IndexReg = 0; emitInstruction() local
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| H A D | SystemZISelLowering.cpp | 994 bool IndexReg; global() member
8412 Register IndexReg = MI.getOperand(3).getReg(); emitCondStore() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 303 Register IndexReg) { in buildBrJT() argument
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