Lines Matching defs:IndexReg

211 /// IndexReg field of the addressing mode will be updated to match in this case.
216   AM.IndexReg = constrainOperandRegClass(MIB->getDesc(), AM.IndexReg,
733         (AM.Base.Reg == 0 && AM.IndexReg == 0)) {
752           assert(AM.Base.Reg == 0 && AM.IndexReg == 0);
815     if (AM.IndexReg == 0) {
817       AM.IndexReg = getRegForValue(V);
818       return AM.IndexReg != 0;
902     unsigned IndexReg = AM.IndexReg;
936         if (IndexReg == 0 &&
941           IndexReg = getRegForGEPIndex(PtrVT, Op);
942           if (IndexReg == 0)
955     AM.IndexReg = IndexReg;
1059         (AM.Base.Reg != 0 || AM.IndexReg != 0))
1076       assert(AM.Base.Reg == 0 && AM.IndexReg == 0);
1113     if (AM.IndexReg == 0) {
1115       AM.IndexReg = GetCallRegForValue(V);
1116       return AM.IndexReg != 0;
3861         AM.IndexReg == 0 && AM.Disp == 0 && AM.GV == nullptr)
4019     if (!MO.isReg() || MO.isDef() || MO.getReg() != AM.IndexReg)
4022     Register IndexReg = constrainOperandRegClass(Result->getDesc(),
4024     if (IndexReg == MO.getReg())
4026     MO.setReg(IndexReg);