Lines Matching defs:IndexReg

296     for (const unsigned IndexReg : PossibleIndexRegs.set_bits()) {
304           setMemOp(IT, 3, MCOperand::createReg(IndexReg));
311           RestrictDestRegs(BaseReg, IndexReg, PossibleDestRegsNow);
322                               RegInfo.getName(IndexReg), Scale, Disp)
359         [this](unsigned BaseReg, unsigned IndexReg,
419         [this](unsigned BaseReg, unsigned IndexReg,
425                  State.getRATC().getRegister(IndexReg).aliasedBits());
495       .addReg(0)           // IndexReg
509       .addReg(0)        // IndexReg
573           .addReg(0)        // IndexReg
589           .addReg(0)        // IndexReg
610           .addReg(0)        // IndexReg
923   setMemOp(IT, MemOpIdx + 2, MCOperand::createReg(0));      // IndexReg