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Searched refs:emit_fence (Results 1 – 25 of 27) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_asic.c191 .emit_fence = &r100_fence_ring_emit,
341 .emit_fence = &r300_fence_ring_emit,
355 .emit_fence = &r300_fence_ring_emit,
913 .emit_fence = &r600_fence_ring_emit,
926 .emit_fence = &r600_dma_fence_ring_emit,
1011 .emit_fence = &uvd_v1_0_fence_emit,
1214 .emit_fence = &uvd_v2_2_fence_emit,
1323 .emit_fence = &r600_fence_ring_emit,
1336 .emit_fence = &evergreen_dma_fence_ring_emit,
1637 .emit_fence = &cayman_fence_ring_emit,
[all …]
H A Dradeon.h1869 void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence); member
2811 #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)]->emit_fence((rdev), (fence))
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_ring.h140 void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr, member
245 #define amdgpu_ring_emit_fence(r, addr, seq, flags) (r)->funcs->emit_fence((r), (addr), (seq), (fla…
H A Damdgpu_vce_v3_0.c912 .emit_fence = amdgpu_vce_ring_emit_fence,
939 .emit_fence = amdgpu_vce_ring_emit_fence,
H A Damdgpu_uvd_v6_0.c1535 .emit_fence = uvd_v6_0_ring_emit_fence,
1561 .emit_fence = uvd_v6_0_ring_emit_fence,
1590 .emit_fence = uvd_v6_0_enc_ring_emit_fence,
H A Damdgpu_vce_v2_0.c621 .emit_fence = amdgpu_vce_ring_emit_fence,
H A Damdgpu_sdma_v4_0.c2269 .emit_fence = sdma_v4_0_ring_emit_fence,
2305 .emit_fence = sdma_v4_0_ring_emit_fence,
2337 .emit_fence = sdma_v4_0_ring_emit_fence,
2369 .emit_fence = sdma_v4_0_ring_emit_fence,
H A Damdgpu_jpeg_v2_5.c592 .emit_fence = jpeg_v2_0_dec_ring_emit_fence,
H A Damdgpu_jpeg_v1_0.c562 .emit_fence = jpeg_v1_0_decode_ring_emit_fence,
H A Damdgpu_uvd_v4_2.c758 .emit_fence = uvd_v4_2_ring_emit_fence,
H A Damdgpu_jpeg_v2_0.c793 .emit_fence = jpeg_v2_0_dec_ring_emit_fence,
H A Damdgpu_uvd_v5_0.c867 .emit_fence = uvd_v5_0_ring_emit_fence,
H A Damdgpu_vcn_v2_0.c1725 .emit_fence = vcn_v2_0_dec_ring_emit_fence,
1756 .emit_fence = vcn_v2_0_enc_ring_emit_fence,
H A Damdgpu_si_dma.c739 .emit_fence = si_dma_ring_emit_fence,
H A Damdgpu_uvd_v7_0.c1797 .emit_fence = uvd_v7_0_ring_emit_fence,
1830 .emit_fence = uvd_v7_0_enc_ring_emit_fence,
H A Damdgpu_vcn_v1_0.c1894 .emit_fence = vcn_v1_0_dec_ring_emit_fence,
1927 .emit_fence = vcn_v1_0_enc_ring_emit_fence,
H A Damdgpu_vcn_v2_5.c1499 .emit_fence = vcn_v2_0_dec_ring_emit_fence,
1599 .emit_fence = vcn_v2_0_enc_ring_emit_fence,
H A Damdgpu_sdma_v2_4.c1157 .emit_fence = sdma_v2_4_ring_emit_fence,
H A Damdgpu_vce_v4_0.c1094 .emit_fence = vce_v4_0_ring_emit_fence,
H A Damdgpu_cik_sdma.c1269 .emit_fence = cik_sdma_ring_emit_fence,
H A Damdgpu_sdma_v3_0.c1595 .emit_fence = sdma_v3_0_ring_emit_fence,
H A Damdgpu_sdma_v5_0.c1609 .emit_fence = sdma_v5_0_ring_emit_fence,
H A Damdgpu_gfx_v6_0.c3507 .emit_fence = gfx_v6_0_ring_emit_fence,
3531 .emit_fence = gfx_v6_0_ring_emit_fence,
H A Damdgpu_gfx_v10_0.c5183 .emit_fence = gfx_v10_0_ring_emit_fence,
5223 .emit_fence = gfx_v10_0_ring_emit_fence,
5257 .emit_fence = gfx_v10_0_ring_emit_fence_kiq,
H A Damdgpu_gfx_v7_0.c5025 .emit_fence = gfx_v7_0_ring_emit_fence_gfx,
5056 .emit_fence = gfx_v7_0_ring_emit_fence_compute,

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