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Searched refs:mla (Results 1 – 25 of 99) sorted by relevance

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/llvm-project/llvm/test/MC/AArch64/SVE2/
H A Dmla-diagnostics.s7 mla z0.h, z1.h, z8.h[0] label
12 mla z0.s, z1.s, z8.s[0] label
17 mla z0.d, z1.d, z16.d[0] label
26 mla z0.h, z1.h, z2.h[-1] label
31 mla z0.h, z1.h, z2.h[8] label
36 mla z0.s, z1.s, z2.s[-1] label
41 mla z0.s, z1.s, z2.s[4] label
46 mla z0.d, z1.d, z2.d[-1] label
51 mla z0.d, z1.d, z2.d[2] label
61 mla z0.d, z1.d, z7.d[1] label
H A Dmla.s12 mla z0.h, z1.h, z7.h[7] label
18 mla z0.s, z1.s, z7.s[3] label
24 mla z0.d, z1.d, z7.d[1] label
40 mla z0.d, z1.d, z7.d[1] label
/llvm-project/llvm/test/MC/AArch64/SVE/
H A Dmla.s12 mla z0.b, p7/m, z1.b, z31.b label
18 mla z0.h, p7/m, z1.h, z31.h label
24 mla z0.s, p7/m, z1.s, z31.s label
30 mla z0.d, p7/m, z1.d, z31.d label
46 mla z0.d, p7/m, z1.d, z31.d label
58 mla z0.d, p7/m, z1.d, z31.d label
H A Dmovprfx-diagnostics.s56 mla z3.d, p0/m, z1.d, z2.d label
107 mla z0.d, p0/m, z0.d, z2.d label
157 mla z0.d, p1/m, z1.d, z2.d label
197 mla z0.d, p0/m, z1.d, z2.d label
H A Dmla-diagnostics.s7 mla z0.h, p8/m, z1.h, z2.h label
16 mla z0.s, p7/m, z1.h, z2.h label
/llvm-project/llvm/test/MC/AArch64/
H A Dneon-mla-mls-instructions.s8 mla v0.8b, v1.8b, v2.8b
9 mla v0.16b, v1.16b, v2.16b
10 mla v0.4h, v1.4h, v2.4h
11 mla v0.8h, v1.8h, v2.8h
12 mla v0.2s, v1.2s, v2.2s
13 mla v0.4s, v1.4s, v2.4s
H A Dneon-2velem.s9 mla v0.2s, v1.2s, v2.s[2]
10 mla v0.2s, v1.2s, v22.s[2]
11 mla v3.4s, v8.4s, v2.s[1]
12 mla v3.4s, v8.4s, v22.s[3]
19 mla v0.4h, v1.4h, v2.h[2]
20 mla v0.4h, v1.4h, v15.h[2]
21 mla v0.8h, v1.8h, v2.h[7]
22 mla v0.8h, v1.8h, v14.h[6]
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dneon-mla-mls.ll8 ; CHECK-NEXT: mla v2.8b, v0.8b, v1.8b
19 ; CHECK-NEXT: mla v2.16b, v0.16b, v1.16b
30 ; CHECK-NEXT: mla v2.4h, v0.4h, v1.4h
41 ; CHECK-NEXT: mla v2.8h, v0.8h, v1.8h
52 ; CHECK-NEXT: mla v2.2s, v0.2s, v1.2s
63 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
142 ; CHECK-NEXT: mla v2.8b, v0.8b, v1.8b
154 ; CHECK-NEXT: mla v2.16b, v0.16b, v1.16b
166 ; CHECK-NEXT: mla v2.4h, v0.4h, v1.4h
178 ; CHECK-NEXT: mla v2.8h, v0.8h, v1.8h
[all …]
H A Dsve2-intrinsics-int-mul-lane.ll49 ; CHECK-NEXT: mla z0.d, z1.d, z2.d[1]
51 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.mla.lane.nxv2i64(<vscale x 2 x i64> %a,
61 ; CHECK-NEXT: mla z0.s, z1.s, z2.s[1]
63 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.mla.lane.nxv4i32(<vscale x 4 x i32> %a,
73 ; CHECK-NEXT: mla z0.h, z1.h, z2.h[1]
75 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.mla.lane.nxv8i16(<vscale x 8 x i16> %a,
125 declare <vscale x 8 x i16> @llvm.aarch64.sve.mla.lane.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16…
126 declare <vscale x 4 x i32> @llvm.aarch64.sve.mla.lane.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32…
127 declare <vscale x 2 x i64> @llvm.aarch64.sve.mla.lane.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64…
H A Dsrem-seteq-vec-nonsplat.ll14 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
44 ; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
64 ; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
87 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
110 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
134 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
160 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
190 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
218 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
246 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
[all …]
H A Dsve-int-mad-pred.ll94 ; CHECK: mla z0.b, p0/m, z1.b, z2.b
96 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.mla.nxv16i8(<vscale x 16 x i1> %pg,
105 ; CHECK: mla z0.h, p0/m, z1.h, z2.h
107 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.mla.nxv8i16(<vscale x 8 x i1> %pg,
116 ; CHECK: mla z0.s, p0/m, z1.s, z2.s
118 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.mla.nxv4i32(<vscale x 4 x i1> %pg,
127 ; CHECK: mla z0.d, p0/m, z1.d, z2.d
129 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.mla.nxv2i64(<vscale x 2 x i1> %pg,
191 declare <vscale x 16 x i8> @llvm.aarch64.sve.mla.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>,<…
192 declare <vscale x 8 x i16> @llvm.aarch64.sve.mla.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>,<v…
[all …]
H A Dsve-vecreduce-dot.ll36 ; CHECK-NEXT: mla z0.s, p0/m, z25.s, z24.s
40 ; CHECK-NEXT: mla z3.s, p0/m, z28.s, z7.s
H A Dsve-masked-int-arith.ll99 ; CHECK-NEXT: mla z0.b, p0/m, z1.b, z2.b
110 ; CHECK-NEXT: mla z0.h, p0/m, z1.h, z2.h
121 ; CHECK-NEXT: mla z0.s, p0/m, z1.s, z2.s
132 ; CHECK-NEXT: mla z0.d, p0/m, z1.d, z2.d
H A Dsrem-seteq-vec-splat.ll16 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
40 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
68 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
92 ; CHECK-NEXT: mla v2.4s, v0.4s, v1.4s
/llvm-project/llvm/test/CodeGen/Thumb2/
H A Dmve-vecreduce-mul.ll172 ; CHECK-NEXT: mla r2, r3, r12, r2
173 ; CHECK-NEXT: mla r1, lr, r1, r2
190 ; CHECK-NEXT: mla r3, r3, r12, r8
192 ; CHECK-NEXT: mla r1, lr, r1, r3
193 ; CHECK-NEXT: mla r2, r2, r9, r10
195 ; CHECK-NEXT: mla r1, r1, r5, r2
196 ; CHECK-NEXT: mla r4, r7, r11, r4
197 ; CHECK-NEXT: mla r1, r1, r6, r4
379 ; CHECK-NEXT: mla r1, r2, r1, lr
380 ; CHECK-NEXT: mla r1, r3, r0, r1
[all …]
H A Dthumb2-mla.ll11 ; CHECK: mla r0, r0, r1, r2
22 ; CHECK: mla r0, r0, r1, r2
H A Dmve-vmull-splat.ll49 ; CHECK-NEXT: mla r4, r1, r2, r12
51 ; CHECK-NEXT: mla r2, r3, r2, r5
53 ; CHECK-NEXT: mla r1, r1, r0, r4
54 ; CHECK-NEXT: mla r0, r3, r0, r2
79 ; CHECK-NEXT: mla r2, r0, r2, r12
80 ; CHECK-NEXT: mla r1, r4, r1, r2
82 ; CHECK-NEXT: mla r0, r0, r2, r5
83 ; CHECK-NEXT: mla r0, r4, r3, r0
142 ; CHECK-NEXT: mla r4, r1, r2, r12
144 ; CHECK-NEXT: mla r2, r3, r2, r5
[all …]
H A Dthumb2-mul.ll16 ; CHECK: mla r0, r2, r0, r1
/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/
H A Dforwarding-A57.s155 # CHECK-NEXT: [0,1] D=eeeeeER mla v0.2s, v1.2s, v2.2s
162 # CHECK-NEXT: [0,1] D=====eeeeeER mla v0.8b, v1.8b, v2.8b
169 # CHECK-NEXT: [0,1] D=====eeeeeER mla v0.2s, v1.2s, v2.2s
176 # CHECK-NEXT: [0,1] D=====eeeeeER mla v0.2s, v1.2s, v2.2s
217 # CHECK: [0,0] DeeeeeER. mla v0.2s, v1.2s, v2.2s
218 # CHECK-NEXT: [0,1] D=eeeeeER mla v0.2s, v1.2s, v2.2s
224 # CHECK: [0,0] DeeeeeeER . mla v0.4s, v1.4s, v2.4s
225 # CHECK-NEXT: [0,1] .D=eeeeeeER mla v0.4s, v1.4s, v2.4s
408 mla v0.2s, v1.2s, v2.2s label
413 mla v0.8b, v1.8b, v2.8b label
[all …]
/llvm-project/llvm/test/CodeGen/ARM/
H A Daddimm-mulimm.ll89 ; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1
96 ; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1
115 ; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1
128 ; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1
135 ; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1
154 ; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1
167 ; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1
208 ; CHECK-ARMV6-NEXT: mla r0, r0, r2, r1
255 ; CHECK-ARMV7-NEXT: mla r0, r0, r2, r1
269 ; CHECK-THUMBV7M-NEXT: mla r0, r0, r2, r1
[all …]
H A Dgep-optimization.ll11 ; CHECK-AT2: mla r0, r1, [[REG1]], r0
35 ; CHECK-AT2: mla r0, r1, [[REG1]], r0
59 ; CHECK-AT2: mla r0, r1, [[REG1]], r0
H A Durem-seteq-illegal-types.ll627 ; ARM5-NEXT: mla r4, r0, r2, lr
628 ; ARM5-NEXT: mla r0, r1, r12, r4
655 ; ARM6-NEXT: mla r0, r0, r2, lr
656 ; ARM6-NEXT: mla r0, r1, r12, r0
685 ; ARM7-NEXT: mla r0, r0, r2, lr
686 ; ARM7-NEXT: mla r0, r1, r12, r0
708 ; ARM8-NEXT: mla r0, r0, r2, lr
709 ; ARM8-NEXT: mla r0, r1, r12, r0
731 ; NEON7-NEXT: mla r0, r0, r2, lr
732 ; NEON7-NEXT: mla r
[all...]
/llvm-project/llvm/test/tools/llvm-mca/AArch64/Neoverse/
H A DV2-forwarding.s48 # LLVM-MCA-BEGIN mla
50 mla v0.4s, v1.4s, v2.4s label
51 mla v0.4s, v1.4s, v2.4s label
52 mla v0.4s, v0.4s, v1.4s label
213 # LLVM-MCA-BEGIN Z mla.b
215 mla z0.b, p0/m, z1.b, z2.b label
216 mla z0.b, p0/m, z1.b, z2.b label
217 mla z0.b, p0/m, z0.b, z1.b label
220 # LLVM-MCA-BEGIN Z mla.d
222 mla z0.d, p0/m, z1.d, z2.d label
[all …]
/llvm-project/llvm/test/MC/ARM/
H A Dmul-v4.s14 @ ARMV4: mla r0, r1, r2, r3 @ encoding: [0x91,0x32,0x20,0xe0]
18 mla r0, r1, r2, r3 label
/llvm-project/llvm/lib/CodeGen/
H A DREADME.txt10 mla r4, r3, lr, r4
19 mla r4, r3, lr, r4
27 mla r4, r3, lr, r4

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