1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64 -mattr=+sve,+dotprod < %s | FileCheck %s 3 4define i32 @test(<vscale x 32 x i8> %bin.rdx, <vscale x 32 x i8> %bin.rdx2) { 5; CHECK-LABEL: test: 6; CHECK: // %bb.0: 7; CHECK-NEXT: sunpklo z4.h, z2.b 8; CHECK-NEXT: sunpklo z5.h, z0.b 9; CHECK-NEXT: sunpkhi z0.h, z0.b 10; CHECK-NEXT: sunpkhi z2.h, z2.b 11; CHECK-NEXT: sunpklo z6.h, z1.b 12; CHECK-NEXT: sunpkhi z1.h, z1.b 13; CHECK-NEXT: sunpklo z7.h, z3.b 14; CHECK-NEXT: sunpkhi z3.h, z3.b 15; CHECK-NEXT: ptrue p0.s 16; CHECK-NEXT: sunpkhi z24.s, z5.h 17; CHECK-NEXT: sunpklo z5.s, z5.h 18; CHECK-NEXT: sunpklo z25.s, z4.h 19; CHECK-NEXT: sunpklo z26.s, z0.h 20; CHECK-NEXT: sunpkhi z4.s, z4.h 21; CHECK-NEXT: sunpklo z27.s, z2.h 22; CHECK-NEXT: sunpkhi z0.s, z0.h 23; CHECK-NEXT: sunpkhi z2.s, z2.h 24; CHECK-NEXT: sunpklo z28.s, z6.h 25; CHECK-NEXT: sunpkhi z6.s, z6.h 26; CHECK-NEXT: mul z5.s, p0/m, z5.s, z25.s 27; CHECK-NEXT: sunpkhi z25.s, z1.h 28; CHECK-NEXT: sunpklo z1.s, z1.h 29; CHECK-NEXT: mul z26.s, p0/m, z26.s, z27.s 30; CHECK-NEXT: mul z4.s, p0/m, z4.s, z24.s 31; CHECK-NEXT: sunpkhi z24.s, z3.h 32; CHECK-NEXT: mul z0.s, p0/m, z0.s, z2.s 33; CHECK-NEXT: sunpkhi z2.s, z7.h 34; CHECK-NEXT: sunpklo z7.s, z7.h 35; CHECK-NEXT: sunpklo z3.s, z3.h 36; CHECK-NEXT: mla z0.s, p0/m, z25.s, z24.s 37; CHECK-NEXT: mad z2.s, p0/m, z6.s, z4.s 38; CHECK-NEXT: mad z1.s, p0/m, z3.s, z26.s 39; CHECK-NEXT: movprfx z3, z5 40; CHECK-NEXT: mla z3.s, p0/m, z28.s, z7.s 41; CHECK-NEXT: add z0.s, z2.s, z0.s 42; CHECK-NEXT: add z1.s, z3.s, z1.s 43; CHECK-NEXT: add z0.s, z1.s, z0.s 44; CHECK-NEXT: uaddv d0, p0, z0.s 45; CHECK-NEXT: fmov w0, s0 46; CHECK-NEXT: ret 47 %a = sext <vscale x 32 x i8> %bin.rdx to <vscale x 32 x i32> 48 %b = sext <vscale x 32 x i8> %bin.rdx2 to <vscale x 32 x i32> 49 %c = mul <vscale x 32 x i32> %a, %b 50 %r = call i32 @llvm.vector.reduce.add.nxv32i32(<vscale x 32 x i32> %c) 51 ret i32 %r 52} 53declare i32 @llvm.vector.reduce.add.nxv32i32(<vscale x 32 x i32> ) 54