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Searched refs:hw_addr (Results 1 – 10 of 10) sorted by relevance

/dpdk/drivers/raw/ntb/
H A Dntb_hw_intel.c155 reg_val = rte_read32(hw->hw_addr + XEON_GEN4_PPD1_OFFSET); in intel_ntb4_check_ppd()
182 hw->hw_addr = (char *)hw->pci_dev->mem_resource[0].addr; in intel_ntb_dev_init()
269 xlat_addr = hw->hw_addr + xlat_off; in intel_ntb_mw_set_trans()
270 limit_addr = hw->hw_addr + limit_off; in intel_ntb_mw_set_trans()
281 xlat_addr = hw->hw_addr + xlat_off; in intel_ntb_mw_set_trans()
284 limit_addr = hw->hw_addr + limit_off; in intel_ntb_mw_set_trans()
293 xlat_addr = hw->hw_addr + xlat_off; in intel_ntb_mw_set_trans()
348 reg_val = rte_read16(hw->hw_addr + reg_off); in intel_ntb_get_link_status()
374 reg_addr = hw->hw_addr + reg_off; in intel_ntb_gen3_set_link()
400 reg_addr = hw->hw_addr + XEON_NTBCNTL_OFFSET; in intel_ntb_gen4_set_link()
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/dpdk/drivers/net/qede/base/
H A Decore_hw.h122 u32 hw_addr,
134 u32 hw_addr);
149 u32 hw_addr,
164 u32 hw_addr,
324 u8 abs_ppfid, u32 hw_addr, u32 val);
336 u8 abs_ppfid, u32 hw_addr);
H A Decore_hw.c204 struct ecore_ptt *p_ptt, u32 hw_addr) in ecore_set_ptt() argument
209 offset = hw_addr - win_hw_addr; in ecore_set_ptt()
217 if (hw_addr < win_hw_addr || in ecore_set_ptt()
219 ecore_ptt_set_win(p_hwfn, p_ptt, hw_addr); in ecore_set_ptt()
261 struct ecore_ptt *p_ptt, u32 hw_addr, u32 val) in ecore_wr() argument
268 bar_addr = ecore_set_ptt(p_hwfn, p_ptt, hw_addr); in ecore_wr()
272 bar_addr, hw_addr, val); in ecore_wr()
281 hw_addr, val); in ecore_wr()
284 u32 ecore_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 hw_addr) in ecore_rd() argument
291 bar_addr = ecore_set_ptt(p_hwfn, p_ptt, hw_addr); in ecore_rd()
[all …]
H A Decore_dev.c6241 u32 hw_addr, void *p_eth_qzone, in ecore_set_coalesce() argument
6257 ecore_memcpy_to(p_hwfn, p_ptt, hw_addr, p_eth_qzone, eth_qzone_size); in ecore_set_coalesce()
/dpdk/drivers/compress/octeontx/
H A Dotx_zip.c8 zip_reg_read64(uint8_t *hw_addr, uint64_t offset) in zip_reg_read64() argument
10 uint8_t *base = hw_addr; in zip_reg_read64()
15 zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val) in zip_reg_write64() argument
17 uint8_t *base = hw_addr; in zip_reg_write64()
/dpdk/drivers/crypto/ccp/
H A Dccp_dev.h172 #define CCP_READ_REG(hw_addr, reg_offset) \ argument
173 ccp_pci_reg_read(hw_addr, reg_offset)
175 #define CCP_WRITE_REG(hw_addr, reg_offset, value) \ argument
176 ccp_pci_reg_write(hw_addr, reg_offset, value)
/dpdk/drivers/common/idpf/base/
H A Didpf_controlq_api.h165 u8 *hw_addr; member
/dpdk/drivers/net/cxgbe/base/
H A Dadapter.h635 u8 hw_addr[]) in t4_os_set_hw_addr() argument
639 rte_ether_addr_copy((struct rte_ether_addr *)hw_addr, in t4_os_set_hw_addr()
/dpdk/drivers/net/txgbe/
H A Dtxgbe_ethdev_vf.c216 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; in eth_txgbevf_dev_init()
/dpdk/doc/guides/platform/
H A Dmlx5.rst392 mlxdevm port function set pci/<DBDF>/<SFID> hw_addr <MAC>