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27595cd8 |
| 15-Apr-2024 |
Tyler Retzlaff <roretzla@linux.microsoft.com> |
drivers: move alignment attribute on types for MSVC
Move location of __rte_aligned(a) to new conventional location. The new placement between {struct,union} and the tag allows the desired alignment
drivers: move alignment attribute on types for MSVC
Move location of __rte_aligned(a) to new conventional location. The new placement between {struct,union} and the tag allows the desired alignment to be imparted on the type regardless of the toolchain being used for both C and C++. Additionally, it avoids confusion by Doxygen when generating documentation.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com> Acked-by: Morten Brørup <mb@smartsharesystems.com>
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e849b88f |
| 02-Mar-2023 |
David Marchand <david.marchand@redhat.com> |
crypto/ccp: fix PCI probing
This driver has been converted from a vdev driver to a pci driver some time ago. This conversion is buggy as it tries to probe any pci devices present on a system for *e
crypto/ccp: fix PCI probing
This driver has been converted from a vdev driver to a pci driver some time ago. This conversion is buggy as it tries to probe any pci devices present on a system for *each* probe request from the PCI bus.
Rely on the passed PCI device and only probe what is requested.
While at it: - stop copying the pci device object content into a local private copy, - rely on the PCI identifier and remove internal ccp_device_version identifier, - ccp_list can be made static,
With this done, all the code parsing Linux sysfs can be dropped.
Fixes: 889317b7ecb3 ("crypto/ccp: convert driver from vdev to PCI") Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>
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1f37cb2b |
| 28-Jul-2022 |
David Marchand <david.marchand@redhat.com> |
bus/pci: make driver-only headers private
The pci bus interface is for drivers only. Mark as internal and move the header in the driver headers list.
While at it, cleanup the code: - fix indentatio
bus/pci: make driver-only headers private
The pci bus interface is for drivers only. Mark as internal and move the header in the driver headers list.
While at it, cleanup the code: - fix indentation, - remove unneeded reference to bus specific singleton object, - remove unneeded list head structure type, - reorder the definitions and macro manipulating the bus singleton object, - remove inclusion of rte_bus.h and fix the code that relied on implicit inclusion,
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Rosen Xu <rosen.xu@intel.com>
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7be78d02 |
| 29-Nov-2021 |
Josh Soref <jsoref@gmail.com> |
fix spelling in comments and strings
The tool comes from https://github.com/jsoref
Signed-off-by: Josh Soref <jsoref@gmail.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
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92cb1309 |
| 20-Oct-2021 |
Akhil Goyal <gakhil@marvell.com> |
cryptodev: move device-specific structures
The device specific structures - rte_cryptodev and rte_cryptodev_data are moved to cryptodev_pmd.h to hide it from the applications.
Signed-off-by: Akhil
cryptodev: move device-specific structures
The device specific structures - rte_cryptodev and rte_cryptodev_data are moved to cryptodev_pmd.h to hide it from the applications.
Signed-off-by: Akhil Goyal <gakhil@marvell.com> Tested-by: Rebecca Troy <rebecca.troy@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
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889317b7 |
| 26-Jul-2021 |
Amaranath Somalapuram <asomalap@amd.com> |
crypto/ccp: convert driver from vdev to PCI
drop all the code duplicating the PCI bus driver developed for enable IOMMU in vdev.
Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>
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#
b3bf2367 |
| 07-Feb-2020 |
David Marchand <david.marchand@redhat.com> |
crypto/ccp: fix queue alignment
Caught by compiling with -fno-common. A ____cacheline_aligned symbol can be found in the crypto/ccp driver object files.
Looking at this driver source, the ____cache
crypto/ccp: fix queue alignment
Caught by compiling with -fno-common. A ____cacheline_aligned symbol can be found in the crypto/ccp driver object files.
Looking at this driver source, the ____cacheline_aligned (kernel?) alignment macro is undefined. The compiler treats this as a symbol definition and generates a global symbol.
Fixes: ef4b04f87fa6 ("crypto/ccp: support device init") Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
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#
72775857 |
| 22-Nov-2019 |
Amaranath Somalapuram <asomalap@amd.com> |
crypto/ccp: fix scheduling of burst
CCP driver was scheduling only one CCP in a single burst(enqueue). Effective throughput was limited to 1 CCP performance. Scheduling multiple ccp within one burst
crypto/ccp: fix scheduling of burst
CCP driver was scheduling only one CCP in a single burst(enqueue). Effective throughput was limited to 1 CCP performance. Scheduling multiple ccp within one burst will increase the ccp performance. this changes will divide the enqueue packets equally among the multiple CCP
Fixes: e0d88a394e ("crypto/ccp: support run-time CPU based auth") Cc: stable@dpdk.org
Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>
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#
d9a9e561 |
| 19-Mar-2018 |
Ravi Kumar <ravi1.kumar@amd.com> |
crypto/ccp: support AES
Added CCP cipher support for following algorithms: AES-CBC-128/192/256 AES-CTR-128/192/256 AES-ECB-128/192/256
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
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#
585d4037 |
| 19-Mar-2018 |
Ravi Kumar <ravi1.kumar@amd.com> |
crypto/ccp: support hwrng
CCP engines support true hardware random generation feature. This patch implements api to read random number from CCP to be used within PMD.
Signed-off-by: Ravi Kumar <rav
crypto/ccp: support hwrng
CCP engines support true hardware random generation feature. This patch implements api to read random number from CCP to be used within PMD.
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
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70f0f8a8 |
| 19-Mar-2018 |
Ravi Kumar <ravi1.kumar@amd.com> |
crypto/ccp: support burst enqueue/dequeue
Added support for burst oriented data path.
CCP PMD selects appropriate CCP engine available on the platform and schedule the batch of crypto ops to a sele
crypto/ccp: support burst enqueue/dequeue
Added support for burst oriented data path.
CCP PMD selects appropriate CCP engine available on the platform and schedule the batch of crypto ops to a selected hardware queue of the respective crypto engine.
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
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29610e41 |
| 19-Mar-2018 |
Ravi Kumar <ravi1.kumar@amd.com> |
crypto/ccp: support session related ops
Added crypto session specific basic crypto ops callback functions. Added different crypto engine types and definitions.
Signed-off-by: Ravi Kumar <ravi1.kuma
crypto/ccp: support session related ops
Added crypto session specific basic crypto ops callback functions. Added different crypto engine types and definitions.
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
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3c20cf98 |
| 19-Mar-2018 |
Ravi Kumar <ravi1.kumar@amd.com> |
crypto/ccp: support basic PMD ops
Added device specific basic crypto ops callback functions.
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
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ef4b04f8 |
| 19-Mar-2018 |
Ravi Kumar <ravi1.kumar@amd.com> |
crypto/ccp: support device init
CCP PMD is a virtual crypto PMD which schedules a number of available actual CCP hardware engines underneath. The PMD manages all devices by its own. The PMD supports
crypto/ccp: support device init
CCP PMD is a virtual crypto PMD which schedules a number of available actual CCP hardware engines underneath. The PMD manages all devices by its own. The PMD supports CCP_5a and CCP_5b versions of crypto engines and this patch adds support to initialize and use such devices.
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
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