Home
last modified time | relevance | path

Searched +full:16 +full:- +full:bits (Results 1 – 25 of 1153) sorted by relevance

12345678910>>...47

/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsInstrFormats.td1 //===-- MicroMipsInstrFormats.td - microMIPS Inst Formats -*- tablegen -*--===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
40 // Base class for MicroMIPS 16-bit instructions.
47 field bits<16> Inst;
48 field bits<16> SoftFail = 0;
49 bits<6> Opcode = 0x0;
[all …]
H A DMicroMips32r6InstrFormats.td1 //=- MicroMips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
19 //===----------------------------------------------------------------------===//
23 //===----------------------------------------------------------------------===//
31 //===----------------------------------------------------------------------===//
35 //===----------------------------------------------------------------------===//
38 bits<10> offset;
40 bits<16> Inst;
[all …]
H A DMipsMSAInstrFormats.td1 //===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 let Inst{31-26} = 0b011110;
16 let Inst{31-26} = 0b010001;
20 let Inst{31-26} = 0b000000;
30 class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst {
31 bits<5> ws;
32 bits<5> wd;
33 bits<3> m;
[all …]
H A DMipsInstrFormats.td1 //===-- MipsInstrFormats.td - Mips Instruction Formats -----*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
14 // opcode - operation code.
15 // rs - src reg.
16 // rt - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
17 // rd - dst reg, only used on 3 regs instr.
18 // shamt - only used on shift instructions, contains the shift amount.
19 // funct - combined with opcode field give us an operation code.
[all …]
H A DMips32r6InstrFormats.td1 //=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exceptio
[all...]
H A DMicroMipsDSPInstrFormats.td1 //===-- MicroMipsDSPInstrFormats.td - Instruction Formats --*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
24 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
25 bits<5> rd;
26 bits<5> rs;
27 bits<5> rt;
29 let Inst{31-26} = 0b000000;
30 let Inst{25-21} = rt;
31 let Inst{20-16} = rs;
[all …]
H A DMipsDSPInstrFormats.td1 //===- MipsDSPInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
23 def HasDSP : Predicate<"Subtarget->hasDSP()">,
25 def HasDSPR2 : Predicate<"Subtarget->hasDSPR2()">,
27 def HasDSPR3 : Predicate<"Subtarget->hasDSPR3()">,
39 class Field6<bits<6> val> {
40 bits<6> V = val;
64 // ADDU.QB sub-class format.
65 class ADDU_QB_FMT<bits<5> op> : DSPInst {
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepInstrFormats.td1 //===----------------------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
12 bits <5> Vu32;
13 let Inst{12-8} = Vu32{4-0};
14 bits <5> Rt32;
15 let Inst{20-16} = Rt32{4-0};
16 bits <5> Vdd32;
17 let Inst{4-0} = Vdd32{4-0};
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRFixupKinds.h1 //===-- AVRFixupKinds.h - AVR Specific Fixup Entries ------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
27 /// A 32-bit AVR fixup.
30 /// A 7-bit PC-relative fixup for the family of conditional
31 /// branches which take 7-bit targets (BRNE,BRGT,etc).
33 /// A 12-bit PC-relative fixup for the family of branches
34 /// which take 12-bit targets (RJMP,RCALL,etc).
35 /// \note Although the fixup is labelled as 13 bits, it
40 /// This way there is 13-bits of precision.
[all …]
/freebsd-src/sys/i386/include/
H A Dtss.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
43 int tss_link; /* actually 16 bits: top 16 bits must be zero */
45 int tss_ss0; /* actually 16 bits: top 16 bits must be zero */
47 int tss_ss1; /* actually 16 bits: top 16 bits must be zero */
49 int tss_ss2; /* actually 16 bits: top 16 bits must be zero */
61 int tss_es; /* actually 16 bits: top 16 bits must be zero */
62 int tss_cs; /* actually 16 bits: top 16 bits must be zero */
63 int tss_ss; /* actually 16 bits: top 16 bits must be zero */
64 int tss_ds; /* actually 16 bits: top 16 bits must be zero */
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td1 //==- SystemZInstrFormats.td - SystemZ Instruction Formats --*- tablegen -*-==//
5 // SPDX-License-Identifier: Apache-2.
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td1 //===-- CSKYInstrFormats.td - CSKY Instruction Formats -----*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 class AddrMode<bits<5> val> {
10 bits<5> Value = val;
16 def AddrMode32WD : AddrMode<3>; // ld32.w, st32.w, ld32.d, st32.d, +16kb
27 field bits<32> SoftFail = 0;
33 let TSFlags{4 - 0} = AM.Value;
42 class CSKY32Inst<AddrMode am, bits<6> opcode, dag outs, dag ins, string asmstr,
45 field bits<32> Inst;
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrFormats.td1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
13 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
15 field bits<32> Inst;
16 field bits<32> SoftFail = 0;
22 let Inst{0-5} = opcode;
28 bits<1> PPC970_First = 0;
29 bits<1> PPC970_Single = 0;
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrFormats.td1 //===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
13 class SourceMode<bits<2> val> {
14 bits<2> Value = val;
33 field bits<48> Inst;
34 field bits<48> SoftFail = 0;
46 class IForm<bits<4> opcode, DestMode ad, bit bw, SourceMode as, int size,
51 bits<4> rs;
[all …]
/freebsd-src/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A Dlldb-x86-register-enums.h1 //===-- lldb-x86-register-enums.h -------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
128 k_num_gpr_registers_i386 = k_last_gpr_i386 - k_first_gpr_i386 + 1,
129 k_num_fpr_registers_i386 = k_last_fpr_i386 - k_first_fpr_i386 + 1,
130 k_num_avx_registers_i386 = k_last_avx_i386 - k_first_avx_i386 + 1,
131 k_num_mpx_registers_i386 = k_last_mpxc_i386 - k_first_mpxr_i386 + 1,
136 k_num_dbr_registers_i386 = k_last_dbr_i386 - k_first_dbr_i386 + 1,
176 lldb_r8d_x86_64, // Low 32 bits of r8
177 lldb_r9d_x86_64, // Low 32 bits of r9
[all …]
/freebsd-src/sys/dev/etherswitch/arswitch/
H A Darswitchreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
43 #define BITM(_count) ((1UL << (_count)) - 1)
44 #define BITS(_shift, _count) (BITM(_count) << (_shift)) macro
59 /* DIR-615 E4 U-Boot */
89 #define AR8X16_REG_SW_MAC_ADDR0_BYTE4 BITS(8, 8)
91 #define AR8X16_REG_SW_MAC_ADDR0_BYTE5 BITS(0, 8)
95 #define AR8X16_REG_SW_MAC_ADDR1_BYTE0 BITS(24, 8)
97 #define AR8X16_REG_SW_MAC_ADDR1_BYTE1 BITS(16, 8)
98 #define AR8X16_REG_SW_MAC_ADDR1_BYTE1_S 16
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrFormats.td1 //===- XtensaInstrFormats.td - Xtensa Instruction Formats --*- tablegen -*-===//
7 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9 //===----------------------------------------------------------------------===//
11 // Base class for Xtensa 16 & 24 bit Formats
32 field bits<24> Inst;
33 field bits<24> SoftFail = 0;
36 // Base class for Xtensa 16 bit Format
40 field bits<16> Inst;
41 field bits<16> SoftFail = 0;
45 class RRR_Inst<bits<4> op0, bits<4> op1, bits<4> op2, dag outs, dag ins,
[all …]
/freebsd-src/contrib/llvm-project/clang/lib/Headers/
H A Dmmintrin.h1 /*===---- mmintrin.h - MMX intrinsics -----
[all...]
H A Demmintrin.h1 /*===---- emmintrin.h - SSE2 intrinsics -----
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-devkit8000-lcd-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "omap3-devkit8000-common.dtsi"
15 compatible = "panel-dpi";
18 enable-gpios = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;
22 remote-endpoint = <&dpi_lcd_out>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 remote-endpoint = <&lcd_in>;
35 data-lines = <24>;
41 regulator-min-microvolt = <1800000>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d-pico-hobbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "imx7d-pico.dtsi"
8 model = "TechNexion PICO-IMX7D Board using Hobbit baseboard";
9 compatible = "technexion,imx7d-pico-hobbit", "fsl,imx7d";
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "gpio-led";
23 compatible = "simple-audio-card";
24 simple-audio-card,name = "imx7-sgtl5000";
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrFormats.td1 //===- ARCInstrFormats.td - ARC Instruction Formats --------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 field bits<64> Inst;
15 field bits<64> SoftFail = 0;
21 "\n return isUInt<"#BSz#">(N->getSExtValue());"> {
27 "\n return isInt<"#BSz#">(N->getSExtValue());"> {
31 // e.g. s3 field may encode the signed integers values -1 .. 6
[all …]
/freebsd-src/sys/x86/include/
H A Dfpu.h1 /*-
43 int32_t en_cw; /* control word (16bits) */
44 int32_t en_sw; /* status word (16bits) */
45 int32_t en_tw; /* tag word (16bits) */
48 uint16_t en_opcode; /* opcode last executed (11 bits) */
61 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
68 uint8_t xmm_bytes[16];
[all...]
/freebsd-src/share/man/man3/
H A Dqmath.331 .Nd fixed-point math library based on the
39 data types and APIs support fixed-point math based on the
66 .Bq 2, 4, 6, 8, 16, 32, 48
67 bits of precision after the binary radix point,
72 The number of bits available for the integral component is not explicitly
73 specified, and implicitly consumes the remaining available bits of the chosen Q
79 None of the operations is affected by the floating-point environment.
86 .Bl -column "isgreaterequal" "bessel function of the second kind of the order 0"
124 .Xr Q_PRECEQ 3 compare bits
134 .Ss Functions which manipulate the control/sign data bits
[all …]
/freebsd-src/sys/contrib/openzfs/lib/libspl/
H A Datomic.c10 * or https://opensource.org/licenses/CDDL-1.0.
39 ATOMIC_INC(16, uint16_t)
55 ATOMIC_DEC(16, uint16_t)
65 void atomic_add_##name(volatile type1 *target, type2 bits) \
67 (void) __atomic_add_fetch(target, bits, __ATOMIC_SEQ_CST); \
71 atomic_add_ptr(volatile void *target, ssize_t bits)
73 (void) __atomic_add_fetch((void **)target, bits, __ATOMIC_SEQ_CST);
77 ATOMIC_ADD(16, uint16_t, int16_t)
87 void atomic_sub_##name(volatile type1 *target, type2 bits) \ in ATOMIC_ADD()
89 (void) __atomic_sub_fetch(target, bits, __ATOMIC_SEQ_CS in ATOMIC_ADD()
350 atomic_store_64(volatile uint64_t * target,uint64_t bits) atomic_store_64() argument
[all...]

12345678910>>...47