Lines Matching +full:16 +full:- +full:bits
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
43 #define BITM(_count) ((1UL << (_count)) - 1)
44 #define BITS(_shift, _count) (BITM(_count) << (_shift)) macro
59 /* DIR-615 E4 U-Boot */
89 #define AR8X16_REG_SW_MAC_ADDR0_BYTE4 BITS(8, 8)
91 #define AR8X16_REG_SW_MAC_ADDR0_BYTE5 BITS(0, 8)
95 #define AR8X16_REG_SW_MAC_ADDR1_BYTE0 BITS(24, 8)
97 #define AR8X16_REG_SW_MAC_ADDR1_BYTE1 BITS(16, 8)
98 #define AR8X16_REG_SW_MAC_ADDR1_BYTE1_S 16
99 #define AR8X16_REG_SW_MAC_ADDR1_BYTE2 BITS(8, 8)
101 #define AR8X16_REG_SW_MAC_ADDR1_BYTE3 BITS(0, 8)
129 #define AR8X16_VLAN_VID_SHIFT 16
139 #define AR8216_ATU_OP BITS(0, 3)
148 #define AR8216_ATU_PORT_NUM BITS(8, 4)
151 #define AR8216_ATU_ADDR5 BITS(16, 8)
152 #define AR8216_ATU_ADDR5_S 16
153 #define AR8216_ATU_ADDR4 BITS(24, 8)
157 #define AR8216_ATU_ADDR3 BITS(0, 8)
159 #define AR8216_ATU_ADDR2 BITS(8, 8)
161 #define AR8216_ATU_ADDR1 BITS(16, 8)
162 #define AR8216_ATU_ADDR1_S 16
163 #define AR8216_ATU_ADDR0 BITS(24, 8)
167 #define AR8216_ATU_CTRL2_DESPORT BITS(0, 5)
171 #define AR8216_ATU_CTRL2_AT_PRIORITY BITS(10, 2)
176 #define AR8216_ATU_CTRL2_AT_STATUS BITS(16, 4)
177 #define AR8216_ATU_CTRL2_AT_STATUS_S 16
179 * For at least the AR9340 -
181 * 1-7: dynamic, valid
193 #define AR8216_ATU_CTRL_AGE_TIME BITS(0, 16)
218 #define AR8X16_MIB_AT_HALF_EN (1 << 16)
232 #define AR8X16_MDIO_CTRL_REG_ADDR_SHIFT 16
274 #define AR8X16_PORT_CTRL_MIRROR_TX (1 << 16)
280 #define AR8X16_PORT_VLAN_DEST_PORTS_SHIFT 16
302 #define AR8X16_PORT_RATE_LIM_IN_SHIFT 16
359 #define AR8X16_PORT_MASK_ALL ((1<<AR8X16_NUM_PORTS)-1)
362 #define AR8X16_MAX_VLANS 16
394 #define AR8327_PAD_PHYX_GMII_EN (1 << 16)
398 #define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2)
400 #define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2)
435 #define AR8327_MAX_FRAME_SIZE_MTU BITS(0, 14)
451 #define AR8327_PORT_VLAN0_DEF_SVID BITS(0, 12)
453 #define AR8327_PORT_VLAN0_DEF_CVID BITS(16, 12)
454 #define AR8327_PORT_VLAN0_DEF_CVID_S 16
458 #define AR8327_PORT_VLAN1_OUT_MODE BITS(12, 2)
466 #define AR8327_ATU_DATA0_MAC_ADDR3 BITS(0, 8)
468 #define AR8327_ATU_DATA0_MAC_ADDR2 BITS(8, 8)
470 #define AR8327_ATU_DATA0_MAC_ADDR1 BITS(16, 8)
471 #define AR8327_ATU_DATA0_MAC_ADDR1_S 16
472 #define AR8327_ATU_DATA0_MAC_ADDR0 BITS(24, 8)
476 #define AR8327_ATU_DATA1_MAC_ADDR4 BITS(0, 8)
478 #define AR8327_ATU_DATA1_MAC_ADDR5 BITS(8, 8)
480 #define AR8327_ATU_DATA1_DEST_PORT BITS(16, 7)
481 #define AR8327_ATU_DATA1_DEST_PORT_S 16
483 #define AR8327_ATU_DATA1_PRI BITS(24, 3)
491 #define AR8327_ATU_FUNC_DATA2_STATUS BITS(0, 4)
497 #define AR8327_ATU_FUNC_DATA2_ATU_VID BITS(8, 12)
501 #define AR8327_ATU_FUNC_OP BITS(0, 4)
513 #define AR8327_ATU_FUNC_PORT_NUM BITS(8, 4)
519 #define AR8327_ATU_FUNC_ATU_INDEX BITS(16, 5)
520 #define AR8327_ATU_FUNC_ATU_INDEX_S 16
521 #define AR8327_ATU_FUNC_TRUNK_PORT_NUM BITS(22, 3) /* for CHANGE_TRUNK */
526 #define AR8327_VTU_FUNC0_EG_MODE BITS(4, 14)
536 #define AR8327_VTU_FUNC1_OP BITS(0, 3)
547 #define AR8327_VTU_FUNC1_VID (1 << 16, 12)
548 #define AR8327_VTU_FUNC1_VID_S 16
553 #define AR8327_FWD_CTRL0_MIRROR_PORT BITS(4, 4)
557 #define AR8327_FWD_CTRL1_UC_FLOOD BITS(0, 7)
559 #define AR8327_FWD_CTRL1_MC_FLOOD BITS(8, 7)
561 #define AR8327_FWD_CTRL1_BC_FLOOD BITS(16, 7)
562 #define AR8327_FWD_CTRL1_BC_FLOOD_S 16
563 #define AR8327_FWD_CTRL1_IGMP BITS(24, 7)
567 #define AR8327_PORT_LOOKUP_MEMBER BITS(0, 7)
568 #define AR8327_PORT_LOOKUP_IN_MODE BITS(8, 2)
570 #define AR8327_PORT_LOOKUP_STATE BITS(16, 3)
571 #define AR8327_PORT_LOOKUP_STATE_S 16
578 #define AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN (1 << 16)