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Searched defs:SrcReg (Results 1 – 25 of 168) sorted by relevance

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/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp136 Register SrcReg = Src.getReg(); runOnMachineFunction() local
156 Register SrcReg = Src2.getReg(); runOnMachineFunction() local
173 Register SrcReg = Src1.getReg(); runOnMachineFunction() local
184 Register SrcReg = Src.getReg(); runOnMachineFunction() local
206 Register SrcReg = Src.getReg(); runOnMachineFunction() local
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/llvm-project/llvm/unittests/CodeGen/GlobalISel/
H A DKnownBitsTest.cpp21 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
41 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
80 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
114 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
152 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
189 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
228 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
256 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
285 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
317 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
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H A DKnownBitsVectorTest.cpp35 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
76 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
112 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
148 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
186 Register SrcReg = FinalCopy->getOperand(1).getReg(); in TEST_F() local
218 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
256 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
289 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
322 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
476 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
509 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
542 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
571 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
606 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
998 Register SrcReg = FinalCopy->getOperand(1).getReg(); TEST_F() local
1050 Register SrcReg; TEST_F() local
1495 Register SrcReg; TEST_F() local
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/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h68 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineAnyExt() local
127 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineZExt() local
202 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); tryCombineSExt() local
268 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); tryCombineTrunc() local
565 replaceRegOrBuildCopy(Register DstReg,Register SrcReg,MachineRegisterInfo & MRI,MachineIRBuilder & Builder,SmallVectorImpl<Register> & UpdatedDefs,GISelChangeObserver & Observer) replaceRegOrBuildCopy() argument
636 Register SrcReg = Concat.getReg(StartSrcIdx); findValueFromConcat() local
784 Register SrcReg = MI.getOperand(1).getReg(); findValueFromExt() local
810 Register SrcReg = MI.getOperand(1).getReg(); findValueFromTrunc() local
843 Register SrcReg = Def->getOperand(Def->getNumOperands() - 1).getReg(); findValueFromDefImpl() local
1061 Register SrcReg = MI.getSourceReg(); tryCombineUnmergeValues() local
1243 Register SrcReg = MergeI->getOperand(Idx + 1).getReg(); tryCombineUnmergeValues() local
1270 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); tryCombineExtract() local
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/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp34 MCRegister SrcReg, bool KillSrc, in copyPhysReg() argument
47 Register SrcReg = MI->getOperand(1).getReg(); expandMEMCPY() local
126 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool IsKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
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H A DBPFMISimplifyPatchable.cpp191 MachineBasicBlock &MBB, MachineInstr &MI, Register &SrcReg, in processCandidate()
226 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
331 Register SrcReg = MI.getOperand(1).getReg(); in removeLD() local
/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBankInfo.cpp122 Register SrcReg = MI.getOperand(1).getReg(); getInstrMapping() local
157 Register SrcReg = MI.getOperand(1).getReg(); getInstrMapping() local
167 Register SrcReg = MI.getOperand(0).getReg(); getInstrMapping() local
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MIPeepholeOpt.cpp212 __anon0cefc1b50302(MachineInstr &MI, OpcodePair Opcode, unsigned Imm0, unsigned Imm1, Register SrcReg, Register NewTmpReg, Register NewDstReg) visitAND() argument
276 Register SrcReg = MI.getOperand(2).getReg(); visitORR() local
385 __anon0cefc1b50502(MachineInstr &MI, OpcodePair Opcode, unsigned Imm0, unsigned Imm1, Register SrcReg, Register NewTmpReg, Register NewDstReg) visitADDSUB() argument
431 __anon0cefc1b50702(MachineInstr &MI, OpcodePair Opcode, unsigned Imm0, unsigned Imm1, Register SrcReg, Register NewTmpReg, Register NewDstReg) visitADDSSUBS() argument
534 Register SrcReg = MI.getOperand(1).getReg(); splitTwoPartImm() local
598 Register SrcReg = SrcMI->getOperand(1).getReg(); visitINSviGPR() local
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H A DAArch64RedundantCopyElimination.cpp186 MCPhysReg SrcReg = PredI.getOperand(1).getReg(); in knownRegValInBlock() local
382 Register SrcReg = IsCopy ? MI->getOperand(1).getReg() : Register(); in optimizeBlock() local
/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp215 return emitInst(Opc).addReg(SrcReg).addReg(MemReg).addImm(MemOffset); in emitInstStore() argument
806 emitStore(MVT VT,unsigned SrcReg,Address & Addr) emitStore() argument
907 unsigned SrcReg = 0; selectStore() local
997 Register SrcReg = selectFPExt() local
1076 Register SrcReg = getRegForValue(Src); selectFPTrunc() local
1112 Register SrcReg = getRegForValue(Src); selectFPToInt() local
1458 unsigned SrcReg = Allocation[ArgNo].Reg; fastLowerArguments() local
1591 Register SrcReg = getRegForValue(II->getOperand(0)); fastLowerIntrinsicCall() local
1721 unsigned SrcReg = Reg + VA.getValNo(); selectRet() local
1785 Register SrcReg = getRegForValue(Op); selectTrunc() local
1801 Register SrcReg = getRegForValue(Src); selectIntExt() local
1823 emitIntSExt32r1(MVT SrcVT,unsigned SrcReg,MVT DestVT,unsigned DestReg) emitIntSExt32r1() argument
1842 emitIntSExt32r2(MVT SrcVT,unsigned SrcReg,MVT DestVT,unsigned DestReg) emitIntSExt32r2() argument
1857 emitIntSExt(MVT SrcVT,unsigned SrcReg,MVT DestVT,unsigned DestReg) emitIntSExt() argument
1866 emitIntZExt(MVT SrcVT,unsigned SrcReg,MVT DestVT,unsigned DestReg) emitIntZExt() argument
1888 emitIntExt(MVT SrcVT,unsigned SrcReg,MVT DestVT,unsigned DestReg,bool IsZExt) emitIntExt() argument
1902 emitIntExt(MVT SrcVT,unsigned SrcReg,MVT DestVT,bool isZExt) emitIntExt() argument
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/llvm-project/llvm/lib/CodeGen/
H A DPHIEliminationUtils.cpp22 unsigned SrcReg) { in findPHICopyInsertPoint()
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.h26 inline static unsigned getCRFromCRBit(unsigned SrcReg) { in getCRFromCRBit()
H A DPPCFastISel.cpp618 const TargetRegisterClass *RC = MRI.getRegClass(SrcReg); in PPCEmitStore() argument
150 copyRegToRegClass(const TargetRegisterClass * ToRC,unsigned SrcReg,unsigned Flag=0,unsigned SubReg=0) copyRegToRegClass() argument
735 unsigned SrcReg = 0; SelectStore() local
963 Register SrcReg = getRegForValue(Src); SelectFPExt() local
981 Register SrcReg = getRegForValue(Src); SelectFPTrunc() local
1017 PPCMoveToFPReg(MVT SrcVT,unsigned SrcReg,bool IsSigned) PPCMoveToFPReg() argument
1082 Register SrcReg = getRegForValue(Src); SelectIToFP() local
1153 PPCMoveToIntReg(const Instruction * I,MVT VT,unsigned SrcReg,bool IsSigned) PPCMoveToIntReg() argument
1209 Register SrcReg = getRegForValue(Src); SelectFPToI() local
1728 unsigned SrcReg = SelectRet() local
1748 unsigned SrcReg = Reg + VA.getValNo(); SelectRet() local
1807 PPCEmitIntExt(MVT SrcVT,unsigned SrcReg,MVT DestVT,unsigned DestReg,bool IsZExt) PPCEmitIntExt() argument
1887 Register SrcReg = getRegForValue(Src); SelectTrunc() local
1906 Register SrcReg = getRegForValue(Src); SelectIntExt() local
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/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp234 Register SrcReg = Src.getReg(); computeKnownBitsImpl() local
465 Register SrcReg = MI.getOperand(1).getReg(); computeKnownBitsImpl() local
511 Register SrcReg = MI.getOperand(NumOps - 1).getReg(); computeKnownBitsImpl() local
528 Register SrcReg = MI.getOperand(1).getReg(); computeKnownBitsImpl() local
534 Register SrcReg = MI.getOperand(1).getReg(); computeKnownBitsImpl() local
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/llvm-project/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp45 MCRegister SrcReg, bool KillSrc, in copyPhysReg() argument
116 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
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/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchOptWInstrs.cpp477 isSignExtendedW(Register SrcReg,const LoongArchSubtarget & ST,const MachineRegisterInfo & MRI,SmallPtrSetImpl<MachineInstr * > & FixableDef) isSignExtendedW() argument
483 __anon2b759e6f0202(Register SrcReg) isSignExtendedW() argument
682 Register SrcReg = MI.getOperand(1).getReg(); removeSExtWInstrs() local
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H A DLoongArchInstrInfo.cpp42 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & DL,MCRegister DstReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument
111 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool IsKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
187 Register SrcReg = LoongArch::R0; movImm() local
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/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp274 Register SrcReg = I.getOperand(1).getReg(); selectCopy() local
759 selectTurnIntoCOPY(MachineInstr & I,MachineRegisterInfo & MRI,const unsigned DstReg,const TargetRegisterClass * DstRC,const unsigned SrcReg,const TargetRegisterClass * SrcRC) const selectTurnIntoCOPY() argument
780 const Register SrcReg = I.getOperand(1).getReg(); selectTruncOrPtrToInt() local
844 const Register SrcReg = I.getOperand(1).getReg(); selectZext() local
909 const Register SrcReg = I.getOperand(1).getReg(); selectAnyext() local
1213 const Register SrcReg = I.getOperand(1).getReg(); selectExtract() local
1263 emitExtractSubreg(unsigned DstReg,unsigned SrcReg,MachineInstr & I,MachineRegisterInfo & MRI,MachineFunction & MF) const emitExtractSubreg() argument
1301 emitInsertSubreg(unsigned DstReg,unsigned SrcReg,MachineInstr & I,MachineRegisterInfo & MRI,MachineFunction & MF) const emitInsertSubreg() argument
1345 const Register SrcReg = I.getOperand(1).getReg(); selectInsert() local
1404 Register SrcReg = I.getOperand(NumDefs).getReg(); selectUnmergeValues() local
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/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp212 unsigned SrcReg = getCompareSourceReg(Compare); in convertToBRCT() local
256 unsigned SrcReg = getCompareSourceReg(Compare); in convertToLoadAndTrap() local
511 unsigned SrcReg = getCompareSourceReg(Compare); optimizeCompareZero() local
614 Register SrcReg = Compare.getOperand(0).getReg(); fuseCompareOperations() local
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H A DSystemZPostRewrite.cpp83 Register SrcReg = MBBI->getOperand(2).getReg(); in selectLOCRMux() local
158 Register SrcReg = MI.getOperand(2).getReg(); in expandCondMove() local
H A DSystemZCopyPhysRegs.cpp78 Register SrcReg = MI->getOperand(1).getReg(); visitMBB() local
/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp37 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
93 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument
/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCDuplexInfo.cpp190 MCRegister DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
536 unsigned DstReg, SrcReg; subInstWouldBeExtended() local
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/llvm-project/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp155 Register SrcReg = MI.getOperand(2).getReg(); in expandArith() local
188 Register SrcReg = MI.getOperand(2).getReg(); in expandLogic() local
498 Register SrcReg = MI.getOperand(1).getReg(); in expand() local
531 Register SrcReg = MI.getOperand(1).getReg(); in expand() local
662 Register SrcReg = MI.getOperand(1).getReg(); in expand() local
707 Register SrcReg = MI.getOperand(1).getReg(); in expand() local
740 Register SrcReg = MI.getOperand(1).getReg(); in expand() local
772 Register SrcReg = MI.getOperand(1).getReg(); in expand() local
840 Register SrcReg = MI.getOperand(1).getReg(); in expandLPMWELPMW() local
952 Register SrcReg = MI.getOperand(1).getReg(); in expandLPMBELPMB() local
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/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVOptWInstrs.cpp396 isSignExtendedW(Register SrcReg,const RISCVSubtarget & ST,const MachineRegisterInfo & MRI,SmallPtrSetImpl<MachineInstr * > & FixableDef) isSignExtendedW() argument
402 __anon627afe430202(Register SrcReg) isSignExtendedW() argument
644 Register SrcReg = MI.getOperand(1).getReg(); removeSExtWInstrs() local
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