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Searched defs:Outs (Results 1 – 25 of 52) sorted by relevance

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/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.h104 const SmallVectorImpl<ISD::OutputArg> &Outs, CCAssignFn Fn, in PreAnalyzeCallOperands() argument
114 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
168 PreAnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> & Outs,CCAssignFn Fn) PreAnalyzeReturn() argument
177 AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> & Outs,CCAssignFn Fn) AnalyzeReturn() argument
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H A DMipsCCState.cpp99 const SmallVectorImpl<ISD::OutputArg> &Outs, const Type *RetTy) { in PreAnalyzeReturnForF128() argument
121 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForVectorFloat() argument
144 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> & Outs,std::vector<TargetLowering::ArgListEntry> & FuncArgs,const char * Func) PreAnalyzeCallOperands() argument
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp17 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> & Outs) PreAnalyzeCallOperands() argument
H A DPPCCCState.h57 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
/llvm-project/llvm/lib/Support/
H A DInitLLVM.cpp27 llvm::raw_ostream *Outs = &llvm::outs(), *Errs = &llvm::errs(); CleanupStdHandles() local
/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp99 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
113 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
126 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
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/llvm-project/llvm/unittests/Analysis/
H A DTBAATest.cpp55 raw_svector_ostream Outs(ErrorMsg); in TEST_F() local
/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp442 AnalyzeVarArgs(CCState & State,const SmallVectorImpl<ISD::OutputArg> & Outs) AnalyzeVarArgs() argument
556 AnalyzeRetResult(CCState & State,const SmallVectorImpl<ISD::OutputArg> & Outs) AnalyzeRetResult() argument
590 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; LowerCall() local
727 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
737 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
807 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
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/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp291 SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; LowerCall() local
465 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
474 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp267 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
633 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context, in CanLowerReturn() argument
646 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h65 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp411 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; LowerCall() local
533 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
543 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
605 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool IsVarArg,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
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/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp408 auto &Outs = CLI.Outs; LowerCall() local
537 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp237 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context, in CanLowerReturn() argument
792 auto &Outs in IsEligibleForTailCallOptimization() local
247 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
258 LowerReturn_32(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_32() argument
343 LowerReturn_64(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_64() argument
826 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; LowerCall_32() local
1181 fixupVariableFloatArgs(SmallVectorImpl<CCValAssign> & ArgLocs,ArrayRef<ISD::OutputArg> Outs) fixupVariableFloatArgs() argument
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/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp944 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1018 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
1328 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
1342 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
/llvm-project/llvm/utils/TableGen/Common/GlobalISel/
H A DPatternParser.cpp351 const DagInit *Outs = Def->getValueAsDag("OutOperands"); parsePatFragImpl() local
/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp429 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context, in CanLowerReturn() argument
438 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
509 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; LowerCall() local
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp96 SmallVector<ISD::OutputArg, 4> Outs; in set() local
/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp663 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
737 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
1996 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; LowerCall() local
2734 const SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; IsEligibleForTailCallOptimization() local
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/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp137 canLowerReturn(MachineFunction & MF,CallingConv::ID CallConv,SmallVectorImpl<CallLowering::BaseArgInfo> & Outs,bool IsVarArg) const canLowerReturn() argument
/llvm-project/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp354 elideCopiesAndPHIs(MachineInstr * MI,SmallVectorImpl<MachineInstr * > & Outs) elideCopiesAndPHIs() argument
/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h507 canLowerReturn(MachineFunction & MF,CallingConv::ID CallConv,SmallVectorImpl<BaseArgInfo> & Outs,bool IsVarArg) canLowerReturn() argument
/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h294 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments() argument
/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1487 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; LowerCall() local
1696 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
1710 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
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/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp234 callIsStructReturn(const SmallVectorImpl<ISD::OutputArg> &Outs) { in callIsStructReturn() argument
524 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1064 CanLowerReturn(CallingConv::ID CCID,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
1073 LowerReturn(SDValue Chain,CallingConv::ID CCID,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
1226 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,Type * RetTy,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
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